SU1295454A1 - Readout device - Google Patents

Abstract

The search refers to analog computing and can be used in hardware built on charge-coupled integrated circuits. The aim of the invention is to simplify the device to count. A june that contains two storage cells, three amplifiers and three key elements. To achieve this goal, the input of the third key element is connected to the output of the first amplifier, and the output to the second input of the first storage element. Due to this, the transmission path of the signal from input to output is reduced compared to the prototype with the same other parameters of reading devices, 2 cells.

Description

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11295454

The invention relates to analog computing technology and can be used in equipment built on the basis of integrated circuits with charge coupling.

The aim of the invention is to improve the accuracy and simplify the reader.

FIG. 2 is a functional diagram of the reader i in FIG. 2 - timing diagrams for the operation of the device.

The reader contains the first 1 and second 2 cumulative elements made on the capacitors, the first 3, the second 4 and the third 5 amplifiers, the first 6, the second 7 and the third 8 key elements. The device has information input 9, bias input 10, information output 11, first 12, second 13 and third 14 control inputs. The control signals of the reader can be formed by a control unit 15 consisting of an AND-OR element 16, an element OR-NOT 7, an element AND 18, and an element 19 delay. The control unit 15 has a read control (sampling) input 20 of the readout level and a read control (sampling) input 21 of the information level of the input signal.

The device works as follows.

The input 9, when reading signals from integrated circuits with charge coupling (AES), receives a signal, a possible view of which is shown in FIG. 2 (id) In the time interval

20

state, and the second 7 and third 8 key elements - in the closed. At these time intervals — the time intervals between samples — dividers are formed in the reader for the input signal, which consist of the pass-through capacitance of the second key element 7 and the capacity of the second capacitor 2j and also in series: x capacitance of the first capacitor i and the pass capacity of the third key element 8 and the resistance of the open first key element 6.

To select the voltage of the readout level of the input signal, a control pulse is formed at the first time segment (Fig. 2, a signal which 9

An appropriate propagation delay is transmitted to the third control input 14 of the reader. For the duration of the control pulse, the third key element 8 is opened, and the first capacitor 1 is recharged through the open first 6 and third 8 key elements. Upon termination of the control pulse U, j at the third control input of the sc; device, the third key element 8 turns on and the first capacitor j maintains the voltage corresponding to the voltage of the reference level 35 of the input signal U on the first time lot. This voltage is approximately equal to the input voltage 10.

When sampling information level30

for which the input signal is read in 40, first the i-element of the AECS is closed, the first key element 6 can be selected,

There are two sections: the first, during which a reading level voltage is formed in the output signal of the AECS, and the second, at which the information level (i.U; voltage, which is to be read, is formed relative to the reading voltage level.

At time intervals, when the signals present at the input are not nested, the control unit 15 forms a high level of the control signal at the first control input 12 of the reader, and a low level of the control signal at the second 13 and third 14 control inputs which support the first key element 6 in the open

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state, and the second 7 and third 8 key elements - in the closed. At these time intervals — the time intervals between samples — dividers are formed in the reader for the input signal, which consist of the pass-through capacitance of the second key element 7 and the capacity of the second capacitor 2j and also in series: x capacitance of the first capacitor i and the pass capacity of the third key element 8 and the resistance of the open first key element 6.

To select the voltage of the readout level of the input signal, a control pulse is formed at the first time interval (Fig. 2, a signal which 9

An appropriate propagation delay is transmitted to the third control input 14 of the reader. For the duration of the control pulse, the third key element 8 is opened, and the first capacitor 1 is recharged through the open first 6 and third 8 key elements. Upon termination of the control pulse U, j at the third control input of the sc; device, the third key element 8 turns on and the first capacitor j maintains the voltage corresponding to the voltage of the reading level 5 of the input signal U on the first time lot. This voltage is approximately equal to the input voltage 10.

When sampling information level

five

0

The second 7 and third 8 key elements are opened and a signal iU; is formed using the first capacitor 1; the voltage difference between the information and reporting levels corresponding to the voltage difference: in the second and first time sections of Fig. 2 and input the second amplifier 4, which recharges the second capacitor 2. The signal is then transmitted to the output of the device by the third amplifier 5 of FIG. 2, (1) g At the end of the sample, 5 s. Of sampling, the key elements of the 6-B switch in the reverse order, while ensuring the safety of the voltages on the first and second capacitors.

with,

31295454

Thus, the reader performs processing of the input signal using the double correlated method of sampling and has a transmission coefficient determined by the ratio

The device has two accumulator elements, each of which is made on a capacitor, three amplifiers and three key elements, the first output of the first capacitor is connected to the input of the second amplifier and to the output of the first clavier element, whose input 15 is the bias input of the device, the first output of the second the capacitor is connected to the bus of the zero potential of the device, and the second

V -V V f.

to „-к ,, с, + г + с

C + Cji

(,,,

where (, | С ,,, - the capacity of the first and second capacitors;

K, K ,,, K, - transfer coefficients

first, second and third amplifiers;

Inclusion of the first capacitor 1 and the third key element 8.

Claims (1)

5 claims fO With iCj, - input capacitance of the second 4 and third 5 amplifiers; C, C - pass-through capacitances of the first 6 and second 7 key switches of the third amplifier and to the output I I the output elements in the closed 20 of the second key element, the input of the state of which is connected to the output of the second input 10 of the bias device, the control amplifier can be used for the second and the third key compensation of the bias voltage of the second elements The corresponding 4 and third 5 amplifiers, the 25 control inputs of the device, and the switching of key elements, the input of the first amplifier and the output of the third and six residual voltages on the first amplifier are informational inputs output device, characterized in that 30 to improve accuracy and simplify the apparatus, the second terminal of the first 6 and second 7 of key elements in the open state. If the AESC is connected to the reader with shielded cable, the first amplifier 3 should be placed in close proximity. capacitor is connected to the output of the third key element, the input of which is connected to the output of the first from the AESC, as well as change the follow-up amplifier. Inclusion of the first capacitor 1 and the third key element 8. 5 claims 15 fO the input of the third amplifier and the output I the second key element, the input of which is connected to the output of the second capacitor is connected to the output of the third key element, the input of which is connected to the output of the first (Rig 2