SU1288855A2 - Rectifier converter - Google Patents

Abstract

The invention relates to electrical engineering and is complementary to the author. St. No. 1101990. The aim of the invention is to increase accuracy. Phase shifting blocks 7 and 8 form control pulses, respectively, of thyristors 13, 14 and 11, 12. Synchronously with thyristors 13 and 14, an additional thyristor 16 is turned on, which passes to the input

Description

In the case of thyristors 11, 12, the additional thyristor 15 is switched to the open state and a negative polarity pulse is fed to the input of the filter 17. If, as a result of the drift of the parameters of the adder 6 and the phase-shifting unit 8, the control pulse thyristors 11, 12 are delayed, alternating pulses of various duration are formed at the input of the filter 17 and a positive polarity signal appears at the output of the filter 17,

one

The invention relates to electrical engineering and is an improvement of the known device according to the model, No. 1101990,

The purpose of the invention is to improve accuracy by eliminating asymmetry.

The drawing shows a diagram of the device.

The device contains a power transformer 1 with primary 2 and secondary 3 and-4 windings, additional secondary winding 5 of transformer 1, adder 6, phase-shifting blocks 7, V, blocks 9, 10 of potential isolation, bridge rectifier, including thyristors 11-14, additional thyristors 15 and 16, aperiodic filter 17, terminals 18 and 19 for connecting the gate converter to the network, terminals 20 for connecting the control signal source, zero potential bus 21, load 22 VP,

The adder 6 has a linear static input-output characteristic and is designed to sum the input signal of the EP with a correction effect coming from the output of the filter 17, Phase shifting blocks 7 and 8 form thyristor control pulses P-14 Position of the control pulses in time relative to the input voltage of the thyristors 11- 14 is determined by the level of the signal at the input of blocks 7 and 8.

It is believed that with increasing input signal of positive polarity

8855

given to the input of the link 6. and summed with the control signal. This leads to a reduction in asymmetry due to a pulse shift at the output of the thyristor 11 in the direction of decreasing the thyristor switch-on node 12.14. If the control pulse is ahead of the desired control angle, the signal at the output of the filter 17 will become negative, as a result of the output signal of the adder 6 and control pulse asymmetry decreases, sludge.

the relative duration of the on state of the thyristors 11-14 increases and that the load 22 is active,

The device works as follows

way

Blocks 7 and 8 are synchronized with the mains voltage of the converter due to a sinusoidal signal,

formed on windings 3 and 4, Block 7 generates control pulses of thyristors 13 and 14 within 0–180 el, grad, and block 8 is designed to generate a control signal for thyristors II and 12 in the range of 180–360 electr. hail, In the time interval of forming a positive half-wave network voltage, a control pulse is generated at the output

block 9 and the thyristors 13 and 14 go into the open state, the time interval corresponding to the negative half-voltage of the network voltage, the control pulse appears

at the output of block 10 and thyristors 11

and 12 open. Thus, a rectified voltage is formed at load 23, the value of which depends on the amplitude of the signal at

terminal 20,

Synchronously with the thyristors 13 and 14 of the power bridge, an additional thyristor 16 is turned on, which passes a signal to the input of the filter 17,

similar impulse in the load circuit 22, When the thyristors 11 and 12 are turned on, the additional thyristor 15

is transferred to the open state and a negative polarity pulse arrives at the input of the filter 17. With strict control pulses, the average value of the signal at the input

filter 17 is zero.

It is assumed that as a result of the drift of the parameters of the adder 6 and block 8, the driving pulse of thyristors 11 and 12 is delayed, which entails a decrease in the average value of rectified voltage. At the same time, alternating pulses of various durations are formed at the input of the filter 17 and a positive polarity signal appears at the output of the filter 17, which is fed to the input of the adder 6 and added to (added) the control signal of the VI. The latter entails a reduction in asymmetry due to a pulse shift at the output of block 8 in the direction of decreasing the switching angle of thyristors 12 and 14. If the pulse at the output of block 10 is ahead of the desired control angle of the power thyristors, the signal at the output of filter 17 becomes negative, which entails a decrease output level of the adder 6, V

As a result, the asymmetry of the control pulses of the power thyristors decreases.

It is assumed that at the time ut

the control pulse lags behind, thyristors 13 and 14. Then, at the output of filter 17, a signal appears. Editing M. Blanar

Compiled by S. Luzanov

Tehred L. Serdyukova Corrector L. Patay

Order 7820/55 Circulation 683 Subscription

VNIIPI USSR State Committee

for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5

Production and printing company, Uzhgorod, st. Proektna, 4

solid polarity, under the action of which the level of the input signal of block 8 is reduced. As a result, the control angle of thyristors 11 and 12 is increased and the symmetry of the control pulses is restored. The leveling of the rectified voltage (current) in the load circuit of the VP can be stabilized by known methods by introducing appropriate feedback loops.

The use of a predictable device allows one to increase the control accuracy, reduce the control asymmetry, and improve the harmonic composition of the input current and output voltage of the VP.

Claims (1)

Invention Formula Valve Converter Aut. St. No. 1101990, characterized in that in order to improve accuracy, by eliminating control asymmetry, it is equipped with two thyristors, an aperiodic filter and adder, the power transformer is provided with an additional winding, and the control signal source is connected to the control input of the first phase-shifting unit through the first input of the adder, the second input connected to the output of the aperiodic filter, the input of which. through the anti-parallel connected thyristors is connected to the output of the auxiliary winding of the power transformer .