SU1236390A1 - Method and apparatus for digital measuring of duration of electric pulses - Google Patents

Abstract

The invention may be used in apparatus for measuring the duration of electrical pulses. The purpose of the invention is to improve the measurement accuracy. According to the method, measurable impulse (MI) controls the onset of the formation of a counting MI arriving at regular intervals of time. The value of the duration of measurement, the range of MI is determined by multiplying the number of calculated CM by the duration of one period of time. Counting IMs are formed using a logical AND-NOT operation on IMs, obtained as a result of this operation, and delayed by a time equal to or greater than the rise time of the front measured by IM. Then, in addition, a logical sum of the measured MI and the additionally inverted MI, obtained during the NAND operation, is formed. In this case, the generated logical sum is used as the second signal in the logical NAND operation to control the formation of the calculating MI. A device that implements the method contains the element AND-NOT 1, the counter 2 THEM, the element 3 delay, the inverter. 4, RSHI element 5. 1 c.p. f-ly, 1 ill. о со (Л с: N) QO QD

Description

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The invention relates to a measuring technique and can be used in electrical measuring equipment for various purposes for measuring the duration of electrical pulses,

The purpose of the invention is to improve the accuracy of measuring the pulse duration.

The essence of the method is that the measured pulse controls the beginning of the formation of counting pulses arriving at equal predetermined time intervals, and the duration of the measured pulses is determined by multiplying the number of counted pulses by the duration of one period of time, the countable pulses. as a result of the logical operation of NAND over a pulse obtained during the operation and delayed by a time equal to or greater than the rise time of the measured pulse. Then, a logical sum of an immersible pulse and an additionally inverted pulse, obtained during the implementation of the NAND operation, are formed, and the generated logic sum is used to control the formation and completion of the process of forming the counting pulses.

The drawing shows a block diagram of a device that implements the proposed method,

The device contains the element 1. AND-, the counter 2 pulses, the element 3 delay, the inverter 4, the element OR 5, the output of the element AND-NOT 1 is connected to the input of the counter 2, the input of the element 3 zadlerski and the input of the inverter 4, the output of the element 3 delay connected The first input of the element is NAND 1, the inverter 4 code is connected to the first input of the element OR 5, the second input of which is the input of the device and the output is connected to the second input of the element 1.

The device works as follows.

In the initial state, at the output of the NAND-1 element, the level of a logical unit is formed, which is converted by the inbertor 4 into the level of a logical zero and is fed to the first input of the OR-5 element. To the second input of the element OR 5 in the initial state

then the nickname is given a logical zero level. At the output of the element OR 5 in the initial state, a level of logical zero is formed, which is fed to the second input of the element AND-NOT 1 and prohibits generation in the circuit; output of the NAND 1 element - delay element 3 - the first input of the NAND 1 element, With the arrival of the measured pulse. output of element 1 by AND-NOT through the switching delay time T, element AND-NOT 1 is the logical zero level. This time-level through time T, determined by the element 3-delay, arrives at the first input of the input element AND-NOT 1 ,. displacing the passage of the measured pulse from the second input of the element AND-NOT 1 to its output and forming the output through time 1 level of the logical unit. After a time interval T of the delay element 3 of the delay at the first input of the element AND-NOT 1, the level of the logical unit arrives again. Then the process is repeated until the sum of the measured pulse at the second input of the element J1I 5 and the pulse generated by the inverter 4 at the first input of the element. Counter 2 records the number of pulses in p with a logical level H: /. IM ,. formed at the height of element 1.

The estimated duration of the measured pulse is t 2 (+ 1) n with a constant error (T +) for any measured pulse.

Claims (2)

1. A method of discrete measurement of the duration of electric and dust, concluding with that the measured pulse is controlled by the onset of the formation of counting pulses arriving at equal predetermined time intervals, and the duration of the measured full pulses is determined by multiplying the number of counting pulses for the duration of one period of time, and the counting pulses are obtained as a result of a logical AND operation NOT over the impulse obtained during the implementation of the NAND operation and delayed by the time equal to 1236363904 or more time rise pulse counter and the element of the front measured pulse. About t-ki, and the output of the element AND-NOT aptly and with the fact that, with the purpose of the keys to the input of the counter; increase the accuracy of measurements, to the auxiliary input of the delay element, the output of which form a logical sum, which is connected with the first input to the element of the additionally inverted AND AND NOT name, which differs pulse, obtained by implementing that the element OR is entered into it I-НЁ operations, н measured pulse, inverter, and an output of an element which is used as the second AND through the inverter is connected to the signal in the logical operation NAND, fO input of the element OR, the second input 2. The device for the discrete of which is the input device, measure the duration of the electrical output connected to the second input pulses containing the element AND NONE element AND NONE.