SU1223235A1 - Device for checking program execution time - Google Patents

Abstract

The invention relates to digital computing and can be used in a digital computer for temporal control of programs. The invention is an extension of the functionality of the device due to the provision of measurement of program execution time. The device contains a serially connected counter, a trigger, an AND element, the second input of which is the first input of the device, an OR element, a second input connected to the output of the counter, and a control unit, the first output connected to the first input of the counter. The device is an introduction to the device of a mode analysis unit, a mode setting unit and a display unit connected to known units. 2 Il.

Description

The invention relates to digital computing and can be used to temporarily monitor real-time programs.

The purpose of the invention is to expand the functionality of the device by providing measurement of the program execution time.

FIG. 1 shows the structure of the proposed device; in fig. 2 is a functional diagram of a control unit and a mode analysis unit.

The device contains a control block 1, a counter 2, a trigger 3, elements AND A and OR 5, the first input 6, the mode analysis block 7, the mode setting block 8, the display block 9, the second 10, the third 11, the fourth 12 and the fifth 13 inputs , the first 14 and the second 15 outputs.

Block 8 consists of set points: operation mode 16, measurement command 17, end 18 and initial 19 addresses.

The control unit 1 (Fig. 2) contains elements OR 20 and 21, elements AND 22-25 and an interrupt counter 26.

The mode analysis block 7 (Fig. 2) contains comparison circuits 27 and 28, elements OR 29-31, element NO 32, elements AND 33-36, and triggers 37 and 38.

The device works as follows.

In the mode of monitoring the execution time of programs from the setpoint adjuster 16 operating mode, which is a switch, the third input of the mode analysis unit 7 receives a logical signal 1. This signal goes through the OR 29 element to the trigger input 37 and sets it to the zero state, prohibiting issue through elements 33 and 34 into the counter 2 signals from circuits 27 and 28 of the comparison. In addition, this signal goes through the element OR 31 to the element AND 36, interrupting the transfer of 2 counting pulses from the first input 6 of the device to the counter. At the same time, the signal of logical 1 enters control unit 1 on AND 22, 24, and 25 elements and AND 23 group of elements, allowing the transmission through them of the corresponding commands and parameters described below.

In the normal course of program execution, through the group of elements AND 23 0 of control block 1 from the digital computer, the code of the permissible time for the execution of the next program is periodically entered into counter 2. The code is recorded in counter 2 when a Record command is output from the digital computer to the third input 11 of the device.

counter 2 through elements And 22 and

OR 20 block 1. Before writing the next time code from the digital computer to the fifth input 13 of the device, the command Set O, on which the trigger

3 and the interrupt counter 26 are reset. The recalculated pulses (time stamps) come from the digital computer to the first input 6 of the device and through the AND 36 element

The mode analysis unit 7 is output to the second (counting) input of counter 2 and is filled in before a new time code is received from the digital computer.

If a malfunction occurs in the program, as a result of which the time code is not updated, then counter 2 overflows. Through the elements of OR 5 and 25, the nepet signal from the first output of counter 2 is fed to the second output of the device 15 via an interrupt in the digital computer.

If the digital computer correctly responded to the interrupt signal, then through block 1 the time code is entered into counter 2

executing the processing program

interrupts and device operation is repeated with this program. If the digital computer has incorrectly responded to the interrupt signal, then each subsequent counting counter 2 overflows, the counting pulse from the first input 6 begins to pass through the AND 4, OR 5 and And 25 elements to the second output 15 of the device, trying

trigger the digital computers and launch interrupt programs. If such attempts fail, then the interrupt counter 26 overflows and the overflow signal as a fault command is output to the digital computer via the output 14 of the device.

In the mode of measuring the program execution time from the setpoint adjuster 16 of operation, the mode analysis signal 7 is given a logical signal O, which prohibits the transmission to the control unit 1 of the corresponding signals

cutting a group of elements And 23 and elements And 22, 24 and 25. In block 7 of mode analysis, this signal, after inverting on element 32, permits the transmission through command And 35 of the command Measurement from unit 17 of unit 8. With control unit 19 and 18 of unit 8 , representing the key registers, set the starting and ending addresses of the measured e-th program, which are received at the first inputs of the corresponding circuits 27 and 28 of the block 7, At the second, the inputs of the circuits 27 and 28 of the comparison with the second input 10 of the device The current address of the executable computer command.

Operation of the device in this mode starts with a pulse command. Measurement issued from the setpoint 17 of block 8, which is a button. .This command through the element And 35 block 7 sets

A trigger 37 in the unit state as well as through the OR element 20 of unit 1 is output to the recording input of counter 2, ensuring that a zero code is output from the output of the AND 23 group of elements and preparing the counter 2 for measuring time. When the current address coincides with the specified starting address of the program being measured, the output of the comparison circuit 27 will be a logical 1 signal, which through the AND 33 element sets the trigger 38 to the single state. The signal from the output of the trigger 38 through the OR element 31 arrives at the AND 36 element and allows 2 counts pulses to be output to the counting input of the counter, which begin to fill it. At the moment of coincidence of the current address with the specified end address of the program being measured, a logical 1 signal appears at the output of the comparison circuit 28, which through triggering the AND 34 and OR 30 sets the trigger 38 to the zero state, prohibiting the output through AND 36 recalculated pulses into the counter 2. The contents of the counter 2, which is the code of the measured program execution time, indicate on indicator 9.

Thus, in comparison with the known, the proposed device for time control of programs provides the ability to measure the time of program execution, which is

ten

232334

enlarges the functionality and expands its areas of application, allowing it to be used not only in the normal operation modes of a digital computer, but also to evaluate the temporal efficiency of programs under operating conditions and during debugging of programs.

The advantage of the proposed device is the elimination of the need to make changes to the program when measuring its execution time, which is required when using software measurement methods — program time.

In addition, the proposed device allows to obtain a high accuracy of time measurement, depending only on the period of the recalculated pulses, as well as to measure not only the entire program, but also its individual sections, up to a single command.

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Claims (1)

Formula of gain thirty 50 A device for monitoring the execution time of programs, containing a counter, a trigger, an AND element, an OR element and a control unit, the counter overflow output is connected to the first input of the OR element, with a single trigger input whose output is connected to the first input of the AND element, input time of the device is connected with the second input of the element I, the control unit contains the first element I, the output of which is connected to the information input of the counter, characterized in that, in order to expand the functional capabilities of the device by providing Measurements echeni time the program is executed, it introduced a display unit, and the mode setting unit block anali-  for the modes, and the first and second elements OR, the second, third and fourth elements AND and the interrupt counter are entered into the control block, the mode analysis block contains the first and second 55 The first, second, third and fourth elements AND, the first, second, third OR elements, the NOT element, the first and second triggers, the outputs of the start address, the end address and the measurement mode of the mode setting block are connected respectively to the input the first to compare the number of the first scheme comparison of the anashiz mode block, with the input of the first comparative number of the second comparison circuit of the mode analysis block, with the first input of the first element AND mode analysis block, the output setting of the device operation mode is connected to the first inputs of the first, second and third OR elements and through the NOT element to the second by cocking the first element AND mode-analysis block, with the first inputs of the first, second, third and fourth elements AND the control block, the address input of the device is connected to the inputs of the second compared number of the first and second Chemical comparison of the mode analysis block whose outputs are connected to the first inputs of the second and third elements AND, respectively, the output of the second element AND the mode analysis block is connected to the single input of the first trigger, the output of which is connected to the second input of the second element OR mode analysis unit element And block analysis modes connected with the second inputs of the first and second elements OR, the outputs of which are connected to zero inputs, respectively, of the second and first triggers of the analysis mode, the output of the first t The rigger of the mode analysis block is connected to the second input of the third element OR, the output of which is connected to the first input of the fourth element AND mode analysis block, the output of the first element AND mode analysis block is connected to the first inputs of the first and second OR elements of the control unit and the single input of the second trig- gera of the mode analysis block, the output of the second trigger of the mode analysis block is connected to the second inputs of the second and third elements AND the mode analysis block, the time stamp input of the device is connected to the second input a quarter Element And block of LIZ modes, the output of the fourth element And mode analysis block is connected to the counting input of the counter, the information output of which is connected to the information input of the indication unit, the inputs of the recording feature, the program execution time code and the initial installation of the device are connected to the second inputs of the second first and third elements 0 And the control unit, the outputs of the second and third elements And the control unit is connected to the first 1 inputs  respectively, the first and second elements OR of the control unit, the output of the first and second elements OR of the control unit are connected respectively to the write input of the counter and to the zero input of the trigger, the output of the AND element is connected to the second input The Q element OR, whose output is connected to the second input of the fourth element AND and the counting input of the interrupt counter of the control unit, the input of the initial installation of the device is connected to the set input of the interrupt counter of the control unit, the outputs of the interrupt counter and the fourth element And the control unit are respectively the output of the failure and the end measurement properties. l /   74 / / 7 sixteen 12 13 /four 15 1 Tags Editor A. Shandor Order 1715/52 Circulation 671 Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Branch PPP Patent, Uzhgorod, st. Design, Compiled by I. Sigalov Tehred L.Oleynik Proofreader A.Ferents