SU1205062A1 - Meter of complex impedance parameters - Google Patents

Description

The invention relates to information-measuring equipment, devices for measuring complex impedance parameters, namely, to a group of these devices, which is based on measuring the parameters of complex impedances by direct conversion.

The aim of the invention is to expand the limits of measurement.

In the drawing ;, the block diagram of the proposed meter is shown.

The impedance parameter meter contains a generator 1 connected to the input of the synchronous etector 2, measuring circuit 3, the output of which is connected to the information input of a controlled DC amplifier (UFD) through the synchronous detector 4, and the reference voltage driver 6,. analog-to-digital converter (ADC) 7, the information inputs of which are connected respectively to the inputs of the synchronous detector 2 and, controlled by DCA 5, and the output to the digital reading unit 8, the counter 9 limits, connected to the measuring circuit 3, the auxiliary counter 10 connected to the control input of the controlled DCU 5, adder 11 connected to the inputs of the counter 9 limits and the auxiliary counter 10, and you: to the digital reading unit 8, a comparator of 12 voltages, the inputs of which are connected to the output measuring center pi 3 and 13 supply reference voltage, and an output - to the counter 9 limits dial code 14, whose output is connected to the input of the ADC 7.

The measuring circuit 3 consists of a DC amplifier 15, in the feedback of which a sample adjustable measure (Zo) 16 is turned on. The measured object (Z) 17 is connected between the amplifier input 15 and the generator 1 output.

Measuring parameters of complex resistance works as follows.

In the initial state, the counter 9 limits and the auxiliary counter 10 are reset.

The generator 1 signal goes to the measuring circuit 3, to the output of which a 12 voltage comparator is connected, which compares the output voltage U of the measuring circuit 3 with the voltage of the source 13 and outputs the signal for switching the counter 9 limits in such a way that by switching the reference measures ZQ the output voltage U is always kept within the specified dynamic range of 0.1 and If the capacitance and resistance of the object are to be measured according to the parallel circuit J

substitutions, the measured parameters Cn and RV are determined by the relations:

X

-

one

uJR,

N

with

20

RV R,

I

N lUn

No

lUr

 Rel4

When measuring inductance and resistance using a parallel replacement circuit, capacitance using a serial replacement circuit and other parameters, the meter works as follows

in a way.

For example, suppose capacitor parameters are measured. In this case, when measuring the capacitance C ,, the voltage at the output of the synchronous detector 2 is in the same dynamic range as the voltage U, at the output of the measuring circuit. In this case, the code of the A / D converter 7 is changed to a selected range of 0.1 N K ,,.

If the ADC 7 code is not in

specified limits, this indicates an incorrectly selected measuring range. The correct operation of the meter is then restored by measuring the state of the counter 9 limits and an exemplary measure of the measuring circuit 3.

If the capacitor resistance R is measured, then the voltage RgUx on

output of the synchronous detector 4 at a correctly selected measurement range varies in the dynamic range O 4 R "U, which corresponds to the change in resistance

R x min BEFORE infinity. However, ADC 7 cannot generate an Ng code larger than N (J, which sharply limits the measuring range. For

extending the measuring range R into the proposed meter are introduced a DC amplifier 5 with a variable gain, varying in ten steps, and an auxiliary counter 10 controlling the amplifier.

Suppose that the resistance of the capacitor is large, therefore NU Nf „). In this case, in the course of the measurement, an overflow signal is generated, which arrives at the additional counter 10 and changes its state to one. This leads to an increase in the gain of the 5 DC amplifier by a factor of ten and, consequently, to a tenfold decrease.

relationship

RcUx

at the exit

ADC 7 and its corresponding code N. If, with an increased gain of the DC amplifier, the counter of the ADC 7 still overflows, the state of the auxiliary counter 10 changes by one again and increases the gain of the amplifier 5 constant

its current is ten times. This process is repeated until the output code of the ADC 7 Nq n is less than NV .. In this case, the number n recorded in the additional counter 10 shows how much the order of the number Np is needed to be compared with the nominal measuring range ). For a correct indication of the order of the measurement result, a (logical) adder 1 1 is used, summing up the counter codes 9 limits and the auxiliary counter 10. When the ATP is overflow 7 and

changing the gain of the DC amplifier 5, it is necessary to take into account the pre-existing code K accumulated by this time, the ADC 7, and the measurement start with the installation

ADC 7 code equal to one tenth of the maximum. For this purpose, a sensor 14 of the code is introduced into the proposed meter, with the help of which a code whose numerical value is equal to 0.1 Nnnav is set to the information inputs of the A1DP 7. An overflow signal is given to the input of its record.

Editor A.Lezhnina

Compiled by V.Savinov Tehred S.Migunova

Order 8523/47

Circulation 747 Subscription

VNIIPI USSR State Committee

for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5

Branch PIP Patent, Uzhgorod, ul. Project, 4

Proofreader V. But ha

Claims (1)

COMPLEX RESISTANCE METER, comprising an analog-to-digital converter, the code output of which is connected to the first input of the digital reading unit, a generator connected to the input of the measuring circuit, the first input of the first synchronous detector and the input of the voltage driver, the first output of which is connected to the reference input of the first synchronous detector, and the second output with the reference input of the second synchronous detector, the output of the measuring circuit is connected to the first inputs of the second synchronous detector and voltage regulator, the second input of which is connected to the output of the reference voltage source, and the output to the input of the limit meter, the output of which is connected to the control input of the measuring circuit, the output of the first synchronous detector is connected to the first input of the analog-to-digital converter, characterized in that, for the purpose of expanding the limits of measurements, it is equipped with a controlled DC amplifier, an auxiliary counter, an adder and a code generator, the first input being controlled. a DC _amplifier connected to the output of the second synchronous detector 58 Nogo, its output - to the second input of the analog-to-digital preob-. a developer, and its control input with the first input of the adder and the output of the auxiliary counter, the input of which is connected to the output of the e / / -field and the installation input of an analog-digital converter, the information input of which is connected to the output of the code setter, the second input of the adder is connected to the output of the limit counter, and its output is with the second input of the digital reading unit. '1205062