SU1171815A1 - Device for solving differential equations - Google Patents

Abstract

A device for solving differential equations containing two registration units, the first and second groups of n multipliers, the first group of n integrators, the output of each i-ro integrator is connected to the input i + l and to the first inputs of the corresponding multipliers of the first and second groups, the task block initial conditions, the output of which is connected to the input of the first integrator of the first group, the outputs of the multipliers of the first group are connected to the corresponding, their inputs of the adder, the output of co-. The latter is connected to the input of the first device registration unit, characterized in that, in order to increase accuracy, a second group of n integrators, (n + 1) keys and a linear conversion shaping unit, made in the form of a matrix of resistors, whose first terminals are connected, are entered into it among themselves in the same lines, and the second conclusions of the large-scale resistors are interconnected in the columns of the same name, the outputs of the multipliers of the second group are connected to the first conclusions of the large-scale resistors of the corresponding rows, the second conclusions are whose corresponding columns are connected to the integrator inputs of the second group, the outputs of which are connected to the input group of the second registration unit and through the first make contacts respectively (L n switches are connected to the second inputs of the corresponding multipliers of the first group, which are connected via the corresponding second contacts of these n keys with a zero potential bus, which through the first closing contact of the n-fl key is connected to the second inputs of the multipliers of the second group, which through the second closing contact kt (n-i-l) -ro connected to the input key tron devices. 00 ate

Description

The invention relates to the field of computing, namely, analog and hybrid computing devices, intended for the study of nonlinear dynamic objects using the apparatus of differential transformations, and can also be used for analytical approximation of real signals. The aim of the invention is to improve the accuracy and expand the functionality of the device. The drawing shows the proposed device. The device contains integrators 1 (1), 1 (2), 1 (3), ..., 1 (n + 1) of the first group, integrators 2 (1), 2 (2), 2 (3), ... 2 (n + 1) of the second group, multipliers 3 (1), 3 (2), 3 (3), ..., 3 (np-1) of the first group, multipliers 4 (1), 4 (2), 4 (3), ..., 4 (p4-1) of the second group, keys, ch 5,6 (1), 6 (2), 6 (3), ..., 6 (0 + 1), adder 7, the linear conversion shaping unit 8, made in the form of a PCP matrix of the scale resistors, the initial conditions setting unit 9, the 10 and AND registration units. The proposed device is intended for modeling direct and inverse differential transformations of functions. H / cix (t) j..i ((dt -o (t) gaX. (K) (), (2) where X (k) is the Yusha of the differential spectrum of a function; XCt) is a function that performs a differential transformation ; X (Y-function, reconstructed from a limited differential spectrum; H-scale constant; K-integer variable, k 0, l ..., n. The device operates as follows. In the direct differential transformation mode, the signal representing the function x (t) is fed to the input of the device connected to the two-position key 5. Simultaneously with the input signal, integrators 1 (1), 1 begin to work (2), 1 (3)., .., 1 (p-1) of the first group, forming signals of the form (jf) at my outputs - These signals passed through the multipliers 4 (1), 4 (2), 4 ( 3), ..., 4 (n + 1) of the second group will be multiplied by x (t). The products x (t) (d) .. will go to the inputs of block 8, where they will be converted according to the conductivities of this block into linear combinations that arrive in the form of currents at the inputs of the integrators 2 (1), 2 (2), 2 (3), ..., 2 (n + 1) of the second group, which must work in the integration mode for some time .t. synchronous with the scan signal x (t) and signals (ir). At the outputs of the integrators 2 (1), 2 (2), 2 (3), ..., 2 (n +1) of the second group, signals corresponding to the components x (k of the differential spectrum x (t)) will be generated. In the second differential transformation, the keys 6 (1), 6 (2), 6 (3), ..., 6 (n + 1) are in the position where the output signals of the integrators 2 (1), 2 (2), 2 (3), ..., 2 (n + 1) of the second group are not received at the inputs of the multipliers 3 (1), 3 (2), 3 (3), ..., 3 (n + 1) of the first group, and Thus, at the output of the adder 7, the signal x (t) is absent. The use of block 8 together with integrators 1 (1), 1 (2), 1 (3), ..., 1 (n + 1) of the first group and multiplier mi 4 (1), 4 (2), 4 (3), ..., 4 (n + 1) of the second group for mathematical processing of the function x (t) Tiered by integrating on integrators 2 (1), 2 (2), 2 (3), .. ., 2 (n + 1) of the second group allows to determine the components of the spectra x (k) without performing the operation of multiple differentiation, as required by formula (1) of the direct differential transformation. , 6 (2), 6 (3), ..., 6 (n + 1) are set in opposite states so that the combined inputs of the multipliers 4 (1), 4 (2), 4 (3), .. ., 4 (n + 1) of the second group is given a zero signal. This leads to the fact that the integrators 2 (1), 2 (2), 2 (3), ..., 2 (n-fl) of the second group are in the storage mode of the components of the differential spectrum x (k). If this spectrum is known in advance and is not the result of mathematical processing of the real signal x (t), then it should be specified on integrators 2 (1), 2 (2), 2 (3), ..., 2 (n + 1 a) of the second group, as is done when setting the initial conditions for integrating differential equations. The output signals of the integrators 1 (1), 1 (2), 1 (3), ..., 1 (n + 1) of the first group together with the signals of the differential spectrum x (k simultaneously arrive at multipliers 3 (P, 3 (2) , 3 (3), ..., 3 (n + 1) of the first group and then to the adder 7, restore the approximate value of the function x (t). The described alternation of the modes of operation of the device, at which the direct differential transformation (1) during the time T, and then the inverse differential transformation (2), allows the use of the proposed device besides its main purpose ( direct and inverse differential transform functions) also for storing analog functions, implementing functions of the delayed argument, and performing a time scale transform operation.

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Claims (1)

A DEVICE FOR SOLVING DIFFERENTIAL EQUATIONS, containing two registration units, the first and second groups of η multipliers, the first group of η integrators, the output of each i-ro integrator is connected to the input i 4-1 and to the first inputs of the corresponding multipliers of the first and second groups, block setting initial conditions, the output of which is connected to the input of the first integrator of the first group, the outputs of the multipliers of the first group are connected to the corresponding inputs of the adder, the output of which is connected to the input of the first device registration unit, I distinguish This is because, in order to increase accuracy, a second group of η integrators, (n + 1) keys, and a linear transformation forming unit made in the form of a matrix of resistors are introduced into it, the first conclusions of which are interconnected in the same lines, and the second conclusions scale resistors are interconnected in the same columns, the outputs of the multipliers of the second group are connected to the first conclusions of the scale resistors of the corresponding rows, the second conclusions of the corresponding columns of which are connected to the inputs of the integrators of the second group the outputs of which are connected to the group of inputs of the second registration unit and are connected to the second inputs of the corresponding multipliers of the first group through the first make contacts of the corresponding η keys, which are connected through the corresponding second make contacts of these η keys to the zero potential bus, which through the first make contact is n + 1 the key is connected to the second inputs of the multipliers of the second group, which are connected to the input of the device through the second make contact of the (n + 1) th key.