SU1141390A1 - Pulse parametric d.c.voltage stabilizer - Google Patents

Abstract

1. PULSE PARAMETRIC STABILIZER OF CONSTANT VOLTAGE, containing in series a key transistor and an LCD filter, a comparator connected to the power bus. the first input is connected to the source of the reference voltage, and the output is connected to the R input of an RST flip-flop, the T input of which is connected to the output of its generator, characterized in that, in order to expand the function of the first possibilities by increasing the range of variation of the input voltage , a controlled integrator is inputted, the input of which is connected to the connection point of the key transistor and LCD filter, the output is connected to the second input of the comparator, and the control input is connected to the Q output of the RST flip-flop whose Q output is connected to the control input of the C chevogo transistor. five

Description

2. The stabilizer of claim 1, which is based on the fact that the controlled integrator is made on an analog switch and two RC circuits of a series-connected resistor and a capacitor, the outputs of the resistors of the KS circuits are connected to the input of the controlled integrator, the output of the capacitor is first The RC circuit is connected to the common bus, and

the output of the capacitor of the second RC circuit with the connection point of the resistor and the capacitor of the first RC circuit, the connection point of the resistor and the capacitor of the second RC circuit is connected to the output of the controlled integrator, an analog switch is connected in parallel with the capacitor of the second RC circuit, the control input of which is connected to the integrator control input .

The invention relates to electrical engineering and can be used in power supply devices for various equipment.

A parametric DC voltage regulator is known, containing a key transistor and an LCD filter chopper connected in series and connected to the power bus. The capacitor of this capacitor is connected to the terminals for connecting the load, the integrator whose input is connected to the common point of the key transistor and the LCD chokes filter and relay. element, whose input is connected to the output of the integrator, and the output - to the input of the key transistor. The disadvantage of this device is a change in a wide range of its operating frequency when the voltage of the input voltage changes. This necessitates an increase in the mass and dimensions of the LCD filter, and consequently, the entire device. In addition, this causes the appearance of a wide spectrum of interference affecting the powered equipment.

The closest to the invention according to the technical essence is a pulsed. Parametric constant voltage regulator containing a key transistor and an LCD filter connected in series in the power channel, the capacitor of which is connected to the terminals for connecting the load, the integrator, one input of which is connected to the common point of the key the transistor and the throttle of the LCD filter, another input - with the source of the reference voltage, a comparator, the master oscillator, two trigger

ra and a logic element, with one input of the comparator connected to the source of the reference voltage, the other input to the output of the integrator,. the output of the master oscillator is connected to the input of the first trigger, the output of which is connected to the input of the second trigger and one of the inputs of the logic element, the other input of the logic element is connected to the output of the second trigger, the second input is connected to the output of the comparator, and the output the logic element is connected to the input of the key transistor 2.

A disadvantage of the known device is that it is capable of operating only in one of the areas of the ratio of input and output voltage:

or when Ug | ,, 1/2 Uj, then the logical element must perform the function

either with U; (,, y -r- Ugy, then the logical element must perform the function AND-NOT.

This property of the stabilizer excludes the possibility of its application in the event of a change in the input voltage over a wide range. X, which limits the functionality of this parametric stabilizer.

The aim of the invention is to enhance the functionality of a pulsed parametric constant voltage regulator by increasing the range of variation of the input voltage.

The goal is achieved by the fact that a pulsed parametric constant voltage regulator containing a key transistor 3 connected in series to a power bus and an LCD filter, a comparator connected by a first source to a reference voltage source and an output to an R-input RST-trigger The T input of which is connected to the output of the master oscillator, a controlled integrator is additionally introduced, the input of which is connected to the point, the key transistor is connected, and the Cp filter is connected to the second input of the comparator, and the control input It is connected to the Q-output of the RST-flip-flop, the Q-output of which is connected to the control input of the key transistor. In this case, the controlled integrator is made on an analogue key and two RC circuits of a series-connected resistor and a capacitor, the terminals of the resistors of the RC circuits are connected to the input of the controlled integrator, the output of the capacitor of the first EC circuit is connected to the common bus, the second RC circuit with the connection point of the resistor and the capacitor of the first RC circuit; the connection point of the resistor and the capacitor of the second RC circuit is connected to the output of the controlled integrator, parallel to the capacitor of the second RC circuit, an analog switch, control input tim which is connected to the control input of the controlled integrator FIG. 1 shows a diagram of a pulsed parametric dc voltage regulator; in fig. 2 - voltage plots at individual points of the device, explaining the work of a pulsed parametric voltage constant-voltage regulator. The device contains a key transistor 1, choke 2 LCD-filter: pa 3, connected in series in; power bus between. pin 4 for connecting to the input source and pin 5 for connecting the load. Diode 6 and the capacitor 7 of the LCD filter are connected to the common bus 8. The base of the key transistor 1 is connected to the iQ output of the RST flip-flop 9, the T input of which is connected to the leading edge of the master oscillator 10, the O-output of the trigger 9 is connected to the control input 11 of the controlled integrator 12, a; The R input is connected to the output of the comparator 13. The first input of the comparator 13 is connected to the output of the source 14 i of the reference voltage, and the second input is connected to the output 15 of the controlled 3904 integrator 12, whose input 16 is connected to the junction of the key transistor 1 and the LCD filter 3. Managed integrator 12 contains two consecutive RC circuits from resistor 17 with capacitor 18 and resistor 19 with capacitor 20. The connection point of resistors 17 and 19 is input 16 of Managed integrator 12. Condenser 18 is connected to common bus 8 and to point connection resistor A 17 and a capacitor 18 are connected to a capacitor 20. The connection point of a resistor 19 and a capacitor 20 is the output 15 of a controlled integrator 12, and parallel to the capacitor 20 an analog switch 21 is connected, the control input of which is connected to the control input 11 of a controlled integrator 12. Pulse parametric DC voltage regulator melts as follows. If at the input 4 of the stabilizer some input voltage E, until the next control impulse 9 arrives at the T input RST trigger 9 (and in FIG. 2), the output of the master oscillator 10 at the 0 output of the RST trigger 9 has an O signal ( UQ in Fig. 2), and Q output signal 1. When the key transistor 1 is closed, the diode 6 of the LCD filter 3 is open, and the input 16 of the controlled integrator 12 receives a low level signal (Ug in Fig. 2) . Since the Q output of the RST flip-flop 9 to the control input 11 of the controlled integrator 12 sends a signal 1 analog switch 21 open, the capacitor 20 is discharged, and the output 15 of the controlled integrator 12 has a voltage (and "" t in FIG. 2) due to the voltage on the charged 1 capacitor 18. Level. (0) is less than the UQP level from the output of the source 14 of the reference voltage, therefore, there is no signal at the top of the comparator 13 (Ui / nafig, 2). With the arrival of the next pulse from the generator 10, the RST flip-flop 9 is set to position 1, i.e. the Q signal is installed at its Q-output, and the O signal is output at the 0-output. The key transistor 1 is unlocked, the Ufty i E level is applied to the input 16 of the controlled integrator 12, the analog switch 21 of the controlled integrator 12 is closed and the capacitor charge starts 20 through the resistor 19. The signal level at the output 15 of the controlled integrator 12 begins to increase from the value U (0) to the value Uj, with a speed proportional to the value of the input voltage E. At the time when the reference voltage level Ugn and the voltage are equal at the entrance of 15 controls The integrator 12 triggers the comparator 13, forms a pulse at its output that acts on the R input of the RST flip-flop and puts it into state O. At this, the key transistor 1 is locked, the capacitor 20 is discharged and the process repeats. Since the rate of increase in voltage at the output 15 of the controlled integrator 12 is proportional to the value of the input voltage E, the time t during which the key transistor 1 is open depends on the value of the input voltage. As the input voltage rises to .E value, the voltage value (0) 2 on the capacitor 18 of the controlled integrator 12 increases, the voltage rise rate on the capacitor 20 increases and, accordingly, the open time of the key Transistor 1, i.e. t ITOM maintains the equality of the volt-second pulse areas E.t and the voltage at the output of the pulsed parametric stabilizer remains constant. When the input voltage decreases to the value E, the voltage UHKT (0) to condensate 18 decreases, the voltage rise rate on the capacitor 20 decreases, and the open state of the key transistor 1 increases accordingly, becoming equal to t, t. This maintains the equality of the volt-second areas, Egtj E.t., and the voltage at the output of the stabilizer remains unchanged. The time constant of an EC circuit consisting of a resistor 17 and a capacitor 18 is much longer than the RC time constant consisting of a resistor 19 and a capacitor 20. Therefore, in the steady state, the voltage across the capacitor 18 can be almost constant n m not containing a sawtooth component. At the same time, the voltage at the output 15 of the controlled integrator 12, after the formation of the working pulse and before the next working pulse, is forcibly held by the open analog switch 21 at a level equal to the voltage on the capacitor 18, i.e. at level (O). Thus, the condition of equality of the voltages at the output of the integrator at the beginning and at the end of each period is automatically fulfilled by applying a controlled integrator, while the identity and, | y - Uon is preserved at any value of the ratio of the length of the pulse, of the pulse rate and the period from Thu T . rm, a, 2 stabilize-. The torus operates stably both with ALA / Ug and Ugfci, 1/2 U. The possibility of stable operation of a parametric dc voltage regulator under conditions of significant changes in voltage of the supply mains makes it possible to successfully use the device for powering rapioelectronic equipment highly stable power supply and not allowing an increase or decrease in the supply voltage, even with significant changes in input voltage.

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Claims (2)

1. A PULSE PARAMETRIC VOLTAGE STABILIZER, containing a key transistor and an LCD filter sequentially connected to the power bus, a comparator connected to the reference voltage source by the first input, and an RST trigger whose R input is connected to the rear output of the output generator, characterized in that, in order to expand functionality by increasing the range of input voltage, a controlled integrator is introduced, the input of which is connected to the junction point of the key transistor pa and LCD-filter output is connected to the second input of the comparator and a control input connected to the Q-output RST-flop, Q-Bbixofl is connected to the control input of the transistor. 5 SU ,,,, 1141390 2. The stabilizer pop. ^ characterized in that the controlled integrator is made on an analog key and two RC circuits from a resistor and a capacitor connected in series, the terminals of the RC resistors are connected to the input of the controlled integrator, the capacitor output of the first RC circuit is connected to a common bus, and the capacitor output of the second RC -chains with the connection point of the resistor and capacitor of the first RC circuit, the connection point of the resistor and capacitor of the second RC circuit connected to the output of the controlled integrator, is the analog switch connected to the capacitor of the second RC circuit? the control input of which is connected to the control input of the integrator.