SU1422258A1 - Timer - Google Patents

Description

The invention relates to a pulse technique and is intended to be used in automatic devices for setting cyclic time intervals.

The purpose of the invention is to increase the economy and reliability of the time relay, as well as expanding the scope of the example by ensuring that time is kept up for short-term power outages by eliminating the Tofca control of the output amplifier during the timing of the time delay.

and (forming a pulse OUTPUT

th signal

Due to the fact that the proposed time relay additionally introduces pe3HCTqp and a transistor amplifier that is in the open state for a short time of the pulse output signal, the duration of which is determined by the discharge time of the smoothing capacitor and RC circuit capacitor to a certain level, and in the closed state during the countdown time due to the duration of the generator pulse period and the counter conversion factor j the total current consumption is significantly reduced as due to forming a pulsed output signal, and by eliminating the control current of the output amplifier during a time delay that is sufficient to maintain a time delay during short-term interruptions of the supply voltage.

The drawing shows the functional timing of the relay.

The time relay contains the first 1 and second 2 voltage inputs, connected respectively to the first load terminal 3, shunted by diode 4 in reverse polarity, and the first lining of the smoothing capacitor 55 in parallel with which a parametric voltage regulator connected to the sequentially connected resistor 6, the zener diode 7 and the second resistor 8, the initial state setting unit 9, performed on transistor 105 whose collector is connected to a parallel KS circuit (resistor 11, capacitor 12, and the bases the emitter ne

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0 5 Q

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the transistor is shunted by a second parametric stabilizer resistor 8, a pulse generator 13 connected in series, a counter 14, the second input of which is connected to the collector of the transistor 10 of the initial state setting unit 9 and the HE element 15 with an open collector output, an output amplifier 16 on a three-electrode semiconductor device, the output of which is connected to the second output of the load 3, and the transistor 17, the base and the collector of which through resistors 18 and 19 are connected respectively to an open collector output of elements This is NOT 15 and the output of the output amplifier 16, which through a resistor 20 is connected to the first lining of the smoothing capacitor 5l and the emitter of transistor 17 is connected. It is connected to the first resistor 6 - a parametric voltage regulator and the second section of the smoothing capacitor 5, which are connected via a resistor 21 to the first output 1 of the supply voltage.

Rel-e works as follows.

When the supply voltage is applied, the transistor 10 is closed, at the second input of the counter 14, the signal corresponds to the level of Log.1, which sets it to its initial state-, at the output of the element NOT 15, the signal of Log.1, (Transistor 17 and three-electrode semiconductor device 16 are closed, load 3 is de-energized.

After the capacitor 5 is charged, the current through the Zener diode 7 reaches the value of the stabilization current, the transistor 10 opens, removes the signal Log.1 from the second input of the counter 14,

The countdown of the specified time delay begins by recalculating the pulses of the generator 13. The time delay ends after filling the counter 14 and the output of the element NOT 15 produces a signal Log.O,

The transistor 17 and the three-electrode semiconductor device 16 open and feed the signal to the load 13, the capacitor 12 and the capacitor 5 begin to discharge when the current through the zener diode 7 becomes less than the stabilization current, the transistor 10 closes, resulting in Level Log.1 at the second input counter 14 and install it to the original

state, As a result of this, the signal Log.1 appears at the output of the HE 15. The transistor 17 and the three-electrode semiconductor device 16 are closed, de-energizing the load 13. After that, the capacitor 5 is again charged, the current through the Zener diode 7 reaches the stabilization current, the transistor 10 opens, removing the Log signal, 1 from the second input of the counter 14, From this the moment the countdown begins. The relay operates cyclically.

F

formula of invention

A time relay containing a pulse generator connected in series, a counter and an element NOT with an open collector output, a second input of the counter connected to the output of the unit, setting the initial state performed on a transistor with a resistor in the collector circuit, a parametric voltage source stabilizer on the serial circuits from the first resistor, zener diode and the second resistor, connected in parallel to the smoothing capacitor, one lining of which is connected to the second power supply bus, emitte th transistor unit :: SET and starting state, between which and

0

five

The first power supply source is connected to an output amplifier with an executive body as a load; the base of the transistor of the initial state unit is connected to one output of the Zener diode of the parametric voltage regulator, to the other output of which is connected

Q is the output of the initial state unit registrar, the third resistor connected by the first output to the first power supply bus, and the second output to the second plate of the smooth 5 capacitor, which is a & so that, in order to increase efficiency and reliability, and further expand the scope of use by ensuring that the time delay is maintained during short-term power supply voltage interruptions, a transistor amplifier and three additional resistors are inserted into it the amplifier is connected to the second output of the first resistor, the base through the first additional resistor is connected to the open collector output of the element NO, the collector through

0 second additional resistor with the input of the output amplifier connected -. go through the third additional resistor to the second power supply bus.

Claims (1)

Claim A time relay containing a pulse generator connected in series, a counter and an element NOT with an open collector output, the second counter input is connected to the output of the unit. setting the initial state, performed on a transistor with a resistor in the collector circuit, a parametric voltage regulator of the power supply on the serial circuit from the first resistor, a zener diode and a second resistor, connected in parallel with a smoothing capacitor, one lining of which is connected to the second bus of the power source, the emitter of the transistor of the initial installation unit the state between which and the first bus of the power source includes an output amplifier with an executive body as a load, the base the transistor of the initial state setting unit is connected to one zener diode of a parametric voltage stabilizer, the other output of which is connected to the free terminal of the initial state setting unit register, the third resistor is connected by the first output to the first bus of the power source and the second output to the second lining of the smoothing capacitor, about The key is that, in order to increase efficiency and reliability. as well as expanding the scope of application by ensuring the continuity of the time delay during short-term power supply voltage interruptions, an amplifier on the transistor and three additional resistors are introduced into it, while the emitter of the amplifier transistor is connected to the second output of the first resistor, the base through the first additional resistor - with the open collector output of the element NOT, the collector through the second additional resistor with the input of the output amplifier connected through the third additional resistor a second power source bus.