SU1136116A1 - Device for measuring and checking technical parameters - Google Patents

Abstract

A DEVICE FOR MEASURING AND CONTROL OF TECHNOLOGICAL PARAMETERS, containing the first sensor of the monitored parameter, serially connected DC amplifier, first key, integrator and zero-organ, serially connected reference frequency generator, second key and first pulse counter, third key, the output of which is connected to the integrator input, and the source of the reference voltage, characterized in that, in order to improve the accuracy of the monitored parameter and the reliability of the device, a second sensor is inserted into it of the parameter to be parameterized, the control pulse distribution unit containing the first trigger, the control pulse distributor, the first and second elements AND the first element NOT, the comparator, the memory register, the second and third pulse counters, the control unit containing the third and fourth elements AND, the second element NOT, the second and third triggers, the fifth and sixth elements AND and the first element OR, the adjustable source of the reference voltage, the self-tuning block containing the seventh element AND, the fourth and fifth triggers, the eighth and ninth elements And the second element OR, the tenth element And, the first and second elements of the delay and the switch; The first and second sensors of the monitored parameter and the voltage source are connected to the measurement inputs of which the switch is connected to the input of the DC amplifier; the output of the second element OR is connected to the input of the adjustable voltage source whose output is connected to the first input of the third key, the output of the zero-organ is connected to the second input of the integrator, the counting input of the fourth trigger, the input of the first element NOT, the first inputs of the fifth and sixth elements AND, the comparator and the tenth element This And, the first output of the first pulse counter CO is connected to the information input of the register, memory, the second input of the comparator and the first inputs of the third, fourth and seventh And elements, and the second output to the counting input of the first, trigger, non-inverting output of which is connected to the input the pulse distributor and the second with the 9th input of the first key, and the inverting output - to the first inputs of the first and second elements. And, as well as to the second inputs of the zero-organ and the seventh element And, the output of which is connected to the counting input of the fifth trigger, the output of the first element is NOT connected to the second input of the first element And whose output is connected to the second input of the third key, the first output of the distributor impulses are connected to the second input of the second element I and the first control input of the switch, the second output with the first inputs of the second and third pulse counters, the installation inputs of the fourth and fifth triggers and the second control input of the switch and, third, you | stroke - the third a control vho-, switch house and a second input

Description

the tenth element and, the output of the second element and is connected to the input, the second element is NOT and the second inputs of the fifth Ishesh element And, the output of the tenth element And is connected to the input of the first delay element, the output of which is connected to the second input. The second key and the input of the second delay element, the output of which is connected to the installation input of the memory register, the outputs of the third and fourth elements And are connected respectively to the counting inputs of the second and third triggers, and the output of the second element is NOT connected to the installation inputs of the third and fourth triggers, non-inverting output the second trigger is connected to the third input of the fifth element AND, the inverting output of the third trigger - to the third input of the sixth element AND, the output of the fifth and sixth elements AND are connected respectively naturally

with the first and second inputs of the first element OR, the first output of the comparator is connected to the second input of the second counter, and the second output of the comparator is connected to the second input of the third counter, the second counter is connected to the fourth input of the fifth element I, and the outputs of the third counter to the fourth the input of the sixth element And, the non-inverting output of the fourth trigger is connected to the first input of the eighth element And, and the inverting output - to the first input of the ninth element And, the non-inverting output of the fifth trigger is connected to the second input of the ninth trigger, and the inverting output is with the second input of the eighth element AND, the inverting output of which is connected to the first input of the second element OR, and the output of the ninth element AND to the second input of the second element OR.

This invention relates to automat. It can also be used to build signaling and control systems.

A device is known which digitally converts a monitored parameter, compares it with a predetermined value and issues a command to a control circuit consisting of a setpoint generator, a differential amplifier, a sawtooth generator, two comparators, a pulse generator, a counter, a digital-analog device and a decade switch 1.

The disadvantages of such a device are the need for periodic calibrations, a decrease in the accuracy of measurement and temperature control during operation, after calibration, due to the instability of the characteristics of the differential amplifier and the saw-voltage generator, and the low immunity to impulse and perioric interference, since the differential amplifier and Comparators do not provide effective interference suppression, lack of monitoring of the sensor’s calibration characteristic and, therefore, low tional reliability urtroystva.

The closest in technical essence to the present invention is a digital thermometer comprising a sensor connected in succession, a DC amplifier, a first switch, an integrator, a zero-organ, a second

a key, a pulse counter and a digital reading device, a reference frequency generator, the output of which is connected to the second input of the second key, the reference voltage source connected in series and the third key, the output of which is connected to the integrator input, the control device 2.

The disadvantages of the known device are the need for periodic calibrations, reduced measurement accuracy during operation, after calibration, due to the instability of the characteristics of the DC amplifier and the integrator, the presence of the temperature component of the measurement error at the time the device is turned on and when operating in a wide temperature range. environment, lack of monitoring sensor calibration characteristics and, therefore, low functional reliability.

The purpose of the invention is to improve the measurement accuracy of the monitored parameter and the reliability of the device.

The goal is achieved in that a device for measuring and monitoring technological parameters, comprising a first sensor of a monitored parameter, a series-connected DC amplifier, a first key, an integrator and a zero-body, a series-connected reference frequency generator, a second key and the first pulse counter, the third the key, the output of which is connected to the integrator input, and the reference voltage source, is introduced the second sensor of the monitored parameter, the control pulse distribution unit, containing first first trigger, pulse control distributor, first and second elements AND and first element NOT, comparator, memory register, second and third pulse counters, control unit containing the third and fourth elements AND, second element NOT, second and third triggers , the fifth and sixth And elements, and the first OR element, an adjustable source of reference voltage, an auto-tuning block, containing the seventh AND element, the fourth and fifth And triggers, the eighth and ninth And elements, and the second OR element, the tenth And element, first and second delay elements and a switch, to the measuring inputs of which the first and second sensors are connected to the monitored parameter and the source of the reference voltage, and the switch output is connected to the input of the DC amplifier, the output of the second element OR is connected to the input of the adjustable reference source, the output of which is connected to the first input of the third key, the output of the null organ is connected to the second input of the integrator, the counting input of the fourth trigger, the input of the first element NOT, the first inputs of the fifth and sixth elements AND, the comparator and ten And, the first output of the first pulse counter is connected to the information input of the memory register, the second input of the comparator and the first inputs of the third, fourth and seventh And elements, and the second output to the counting input of the first trigger, which is connected to the input of the pulse distributor and the second input of the first key, and the inverting output to the first inputs of the first and second elements And, as well as to the second inputs of the zero-organ and the seventh element And, the output of which is connected to the counting input of the fifth trigger, output n The first element is NOT connected to the second input of the first element, whose output is connected to the second input of the third key, the first output of the pulse distributor is connected to the second input of the second element And and the first control input of the switch, the second output to the first inputs of the second, and the third pulse counters, the setup inputs of the fourth and fifth trigger and the second control input of the switch, the third output with the third control input of the switch and the second input of the ten element And, the output of the second element And is connected to the input the second element NO and the second inputs of the fifth and sixth elements AND, the output of the tenth element AND are connected to the input of the first delay element, the output of which is connected to the second input of the second key and the input of the second delay element whose output is connected to the installation input of the memory register , the outputs of the third and fourth elements of And are connected respectively to the numerical inputs of the second and third triggers, and the output of the second element is NOT connected to the installation inputs of the third and fourth triggers, non-inverting output of the second trigger connected to the third input of the fifth element And, inverting the output of the third trigger to the third input of the sixth element And, the outputs of the fifth and sixth elements And are connected respectively to the first and second inputs of the first element OR, the first output of the comparator is connected to the second input of the second counter, and - the second output of the comparator is connected to the second input of the third counter, the output of the second counter is connected to the fourth input of the fifth element I, and the output of the third counter to the fourth input of the sixth element And non-inverting the output of the fourth trigger The gera is connected to the first input of the eighth element I, and the inverting one to the first input of the ninth element I, the non-inverting output of the fifth trigger connected to the second input of the ninth trigger, and the inverting output to the second input of the eighth element I whose inverting output is connected to the first input of the second element OR, and the output of the ninth element AND to the second input of the second element OR. Figure 1 shows the structural diagram of the proposed device; figure 2 - the timing diagram of his work; 3-5, block diagrams of a pulse distribution unit, a control unit and an auto-tuning unit, respectively. The device (Fig. 1) contains a switch 1, a direct current amplifier 2, a first switch 3, an integrator 4, a zero-body 5, a reference frequency generator 6, a second switch 7, a first pulse counter 8, a pulse distribution unit 9, the tenth element And 10, comparator AND, register 12, second counter 13 pulses, third counter 14 pulses, control unit 15, third key 16, adjustable reference voltage source 17, auto-tuning unit 18, reference voltage source 19, first controlled sensor 20 parameter, the second sensor 21 of the monitored parameter. The pulse distribution unit 9 (FIG. 3) contains the first trigger 22, the pulse distributor 23, the first element AND 24, the second element AND 25, and the first element NOT 26. The control unit 15 (figure 4) contains the third element And 27, the fourth element And 28, the second trigger 29, the third trigger 30, the second element 31, the fifth and sixth 33 elements AND and the first OR 34. The device (FIG. 1) also contains the first 35 and second 36 elements of the back. The self-tuning block 18 (FIG. 5) contains the seventh And 37 elements, the fourth 38 and the fifth 39 triggers, the eighth 40 and ninth 41 elements And the second element OR 42. The device operates automatically with continuous repetition of the same operation cycles. The operation cycle consists of three clock cycles: auto-tuning, measuring the signal U, the first sensor 20 of the monitored parameter, measuring the signal llj of the second sensor-ka 21 of the monitored parameter. The generation of the operation cycles is provided by the pulse distribution unit 9 (Fig. 3). The signals from the outputs of the trigger 22 control the first 3 and third 16 keys, and the signals c in the strokes of the distributor 23 pulses form operation cycles. Element I 25 is designed to receive a signal in the time interval At time i (Fig. 2), the voltage Uj corresponding to a given value of the monitored parameter (signaling level or regulation) from the output of the reference voltage source 19 via switch 1, amplifier 2 direct current and the first switch 3 is supplied to the input of integrator 4. As a result, the integrator output voltage starts to increase linearly. After a time interval T determined by the filling time of the first pulse counter 8, having a capacitance N, the pulse from the reference frequency generator 6, the second output of the first pulse counter will receive a signal that triggers 22 TRIGGER 22 of the pulse distribution unit 9. The signals from the outputs of the trigger 22 open the first key 3 and close the third key 16. The INPUT of the integrator 4 from the adjustable source 17 of the reference voltage. The voltage U is applied (, having the polarity opposite to the polarity Itj. The voltage at the output of the integrator 4 decreases linearly At the instant of time ig to match, the output voltage {) of the integrator 4 of the zero level at the output of the null organ 5 appears a signal that sets integrator 4 to the initial state and opens the third key 16 through the first HE and 26 elements. Simultaneously, the signal from the output n The ul-organ 5 enters the self-tuning block 18 (FIG. 5), which only works in the time interval i, -tj and cocks the fourth trigger 38. In the same time interval, the signal from the first pulse-control counter 8 arrives at the self-tuning block 18. At the moment of filling the first counter of 8 pulses with the number of pulses Nj corresponding to the voltage U, a signal appears at the output of the seventh element And 37, which raises the fifth flip-flop 39 (Fig. 5). If the fourth trigger 38 is triggered before the fifth trigger 39, then a negative polarity pulse appears at the output of the eighth element AND 40, otherwise the positive polarity output of the ninth element And 41 appears with a duration equal to the time interval between triggered fourth 38 and p of 39 flip-flops. These pulses change the voltage of the adjustable source 17 of the reference voltage so that the fourth 38 and fifth 39 triggers are triggered simultaneously, i.e. the time interval T is adjusted to the value corresponding to the measured voltage and. Since, con si, the integrator 4 charge process under consideration is equal to where TQ is the time interval corresponding to voltage T is the time interval determined by the filling time the first pulse counter 8, the output voltage of the adjustable source 17 of the reference voltage; the output voltage of the source 19 of the reference voltage. At the same time, To f where N "is the number of pulses filling the first counter of 8 pulses, corresponding to voltage 0 -, frequency of the generator 6 supports; Noah frequency. In the time intervals to - i, the zero-body 5 is set by the signal from the output of the pulse distribution unit 9 to the iodine state. The first counter of 8 pulses, which continuously throughout the cycle receives pulses from the generator 6 of the reference frequency, is automatically set to the zero state at times ig, t, i - g 4 and the moments at its second output appear the triggering trigger of the first trigger 22. At time i, the voltage IJ is connected to the input of the integrator 4, and the measurement cycle of the signal of the first sensor 20 of the monitored parameter begins. At the moment the zero-body 5 triggers, the equality is valid where T is the time interval corresponding to the voltage (If 0 (is the voltage from the first sensor 30 of the monitored parameter. I convert the expression (3), use equalities (1) and (2), and dependence t --Ii - f .., where N. is the number of pulses accumulated by the counter of 8 pulses at the time of the zero-body 5 triggering and corresponding to the voltage j, we get ", 5t From the formula (5) it can be seen that the conversion coefficient voltage V. The number of pulses does not depend on the parameters of the amplifier 2 constant current integrator 4, the reference frequency generator 6. This allows an increase in the measurement accuracy of the parameter being monitored. The signal from the output of the null organ 5 triggers the first 35 and second 36 delay elements, and the output signal from the first delay element 35 deactivates the passage of pulses from the output of the reference frequency generator 6 through the second switch 7 to the input of the first counter is 8 pulses, and the signal from the output of the second delay element 36 at time ig allows writing the code of the number of pulses N to the memory register 12, since the time -tg is allowed to pass the signal from the output of the null organ 5 through the tenth element AND 10. Information from the output of the memory register 12 is fed to an external device. At time ig, the measurement pulse of the second sensor 21 of the monitored parameter starts , proceeding similarly to the second clock cycle, but at the same time the first 35 and second 36 delay elements are not triggered. In the second and third cycle, at the time of the zero-organ 5 triggering, the imparator 11 checks the relationship between N. and N, n, where TSg is the number of pulses corresponding to the voltage Un, and accordingly gives a counting pulse to the second 13 or third counter 14 pulses. If and, and N is more or less than ff, then the output of the second 13 or third 14 pulse counter, respectively, during the time period ijQ - tf will be a signal that the measured parameter is exceeded or decreased from the specified one. During the period of time ("the second 13 and third 14 pulse counters are set to the initial state with a signal from the output of the pulse distribution unit 9. For a period of time 10, the output of the 15 unit will have an internal signal Failure of the sensors if, for Nj-, N (Xlg or N with N9 will accordingly fulfill the condition H,; N3 or W, M, where Ng is the number corresponding to the tolerance of the signals of the sensors 20 and 21 of the controlled parameter from each other. The circuit of the control unit 15 (figure 4), providing the described algorithm works The output signal from the pulse distribution unit 9 during the pro-interval iq-io allows the second 29 and third 30 triggers to be triggered by the counting inputs from the signals from the third 27 and fourth 28 elements, respectively, and the signal from the zero output Body 5 through the fifth 32 and sixth 33 elements I. The signal at the output of the third element I 27 appears When the first counter has 8 pulses, the number of pulses is accumulated, and when the counter accumulates 8 pulses of the number of pulses, the signal will be at the fourth fifth element nta AND 28. The initial state of the second 29 and third 30 flip-flops is such that the signal from the second flip-flop of the second flip-flop 29 permits, and from the third flip-flop 30 prohibits the passage of the signal from the zero-output 5 through the fifth 32 and sixth 33 elements, respectively. On the input of the first element OR 34, a sensor fault appears,. if at NJ Nd - Wg or M. M + Id ne outs respectively second

13 or the third 14 pulse counter there will be no signal prohibiting the passage of the signal from the output of the nullorgan 5 through the fifth 32 and sixth 33 elements I.

Thus, the advantages of the proposed device compared

The known accuracy is increased accuracy, the possibility of long-term operation without calibration with significant changes in the ambient temperature, high speed by eliminating the warm-up time, and increased reliability.

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Claims (1)

DEVICE FOR MEASURING AND MONITORING TECHNOLOGICAL PARAMETERS, comprising a first sensor of a monitored parameter, a DC amplifier connected in series, a first key, an integrator and a zero-organ, a reference frequency generator connected in series, a second switch and a first pulse counter, and a third switch with an output connected to the input integrator, and a reference voltage source, characterized in that, in order to improve the accuracy of the controlled parameter and the reliability of the device, a second sensor is introduced into it of the second parameter, a control pulse distribution unit containing a first trigger, a control pulse distributor, first and second elements и and a first element NOT, a comparator, a memory register, second and third pulse counters, a control unit containing a third and fourth elements AND, a second element NOT , the second and third triggers, the fifth and sixth elements AND, and the first OR element, an adjustable voltage reference source, an auto-tuning unit containing the seventh element And, the fourth and fifth triggers, the eighth and ninth elements And, and the second element NT OR, tenth element AND, first and second delay elements and a switch / To the measurement inputs of which are connected the first and second sensors of the monitored parameter and the reference voltage source, and the output of the switch is connected to the input of the DC amplifier, the output of the second OR element is connected to the input the house is an adjustable reference voltage source, the output of which is connected to the first input of the third key, the zero-organ output is connected to the second input of the integrator, the counting input of the fourth trigger, the input of the first element is NOT, first and the inputs of the fifth and sixth elements AND, the comparator and the tenth element AND, the first output of the first pulse counter is connected to the information input of the register, memory, the second input of the comparator and the first inputs of the third, fourth and seventh elements AND, and the second output to the counting input of the first a trigger whose non-inverting output is connected to the input of the pulse distributor and the second input of the first key, and the inverting output is connected to the first inputs of the first and second elements. And, as well as to the second inputs of the zero-organ and the seventh element And, the output of which is connected to the counting input of the fifth trigger, the output of the first element is NOT connected to the second input of the first element And, the output of which is connected to the second input of the third key, the first output of the pulse distributor is connected with the second input of the second element And and the first control input of the switch, the second output with the first inputs of the second and third pulse counters, the installation inputs of the fourth and fifth triggers and the second control input of the switch, the third you | Progress - with the third control input of the switch and the second input SU. _And P 36116> of the tenth element And, the output of the second 'element And is connected to the input of the second element NOT and the second inputs of the fifth and sixth elements And, the output of the tenth element And is connected to the input of the first delay element, the output of which is connected to the second input of the second key and the input of the second delay element whose output is connected to the installation input of the memory register, the outputs of the third and fourth elements AND are connected respectively to the counting inputs of the second and third triggers, and the output of the second element is NOT connected to the installation inputs of the third and of the fourth trigger, the non-inverting output of the second trigger is connected to the third input of the fifth element AND, the inverting output of the third trigger is connected to the third input of the sixth element Y, the output of the fifth and sixth elements And are connected respectively to the first and second inputs of the first element OR, the first output of the comparator is connected to the second input of the second counter, and the second output of the comparator to the second input of the third counter, the output of the second counter is connected to. the fourth input of the fifth element And, and the outputs of the third counter with the fourth input of the sixth element And, the non-inverting output of the fourth trigger is connected to the first input of the eighth element And, the inverting one is to the first input of the ninth element And, the non-inverting output of the fifth trigger is connected to the second input the ninth trigger, and the inverting output is with the second input of the eighth AND element, the inverting output of which is connected to the first input of the second OR element, and the output of the ninth And element is connected to the second input of the second OR element.