SU1130896A1 - Device for determining time intervals between adjacent peaks of signals reproduced from magnetic record medium - Google Patents

Abstract

DEVICE predetermined intervals between adjacent peaks SIGNALS VOSPRSHZVODIMYH With a magnetic recording medium comprising a magnetic reproducing head, conjugated to a magnetic recording medium and connected to an amplifier reproducing the source of reference voltage levels, the first and second comparators, the first, second, third and fourth drivers, first, second and third OR elements, clock generator, counter, first, second and third memory blocks, multiplier, first adder and division block, and the output of the playback amplifier is connected to the second inputs of the first and second comparators, the first inputs of which are connected respectively to the outputs of the positive and negative voltage levels of the source of the reference voltage levels, the output of the first comparator is connected to the inputs of the first and second drivers, and the output of the second comparator with the inputs of the third and the fourth formers, the first element OR combines the outputs of the first and fourth formers, and the second element OR the outputs of the second and third formers, p At the same time, the output of the first element OR is connected to the synchronizing input of the first memory block, and the output of the third element OR to the reset input of the counter, the clock pulse output is connected to the counter input of the counter, the outputs of which are connected to the information inputs of the first and second blocks memory, output 1 of these memory blocks are connected respectively to the first groups of inputs of the smart device and the first adder, to the second groups of which S are connected the outputs of the third memory block, the outputs of the multiplier and the first adder with Uniform respectively to the inputs of the dividend and divisor unit. characterized in that, in order to increase the fidelity of the playback result by increasing the accuracy of the optics of the time intervals between adjacent peaks from the reproduced signals, the inverter unit, the second and third adders, and the fourth memory unit, and the output the first OR element is connected to one input of the third OR element and with the synchronization inputs of the third and fourth memory blocks; the output of the second OR element is connected to the synchronization input of the second memory block and to the other input th third OR gate, the output connected to the input clock pulse generator vkody second block memory connected to the data inputs of the third block of memory, the outputs of the block through the block dividing inverters coupled to the second

Description

a group of inputs of the second adder, which is connected with the first group of inputs to the outputs of the first memory block, and the outputs to the information inputs of the fourth memory block.

the outputs connected to the first group of inputs of the third adder, the second and third groups of inputs of which are connected respectively to the outputs of the division unit and the outputs of the third memory unit.

The invention relates to instrumentation and computing, in particular, to a magnetic recording technique, namely, devices for reproducing information from a magnetic recording medium.

A data reproducing apparatus is known comprising a magnetic head, a linear amplifier, a filter, a gating pulse shaper, a differentiator, a comparator, an inverter, a delay unit, an equivalence circuit, a matching circuit, and the unbalanced state of this device is low noise immunity, as distortions of the input signals will inevitably lead to spurious output signals and a reduction in the fidelity of the reproduction result.

The closest to the invention to the technical essence is a device that implements a method for determining the temporal position of the peaks of signals reproduced from a magnetic recording medium, containing a magnetic recording medium, a magnetic head, a reproduction amplifier, a source of reference levels, two comparators, four formers, three elements pulses, counter, three memory blocks, multiplier, adder, dividing unit, delay line, logic unit I. B; the device is connected in series magnetic a head and a playback amplifier, the output of which is connected to the first inputs of the first and second comparators, the second inputs of which are connected to the outputs of the positive and negative levels of the source of the reference levels, respectively. The output of the first comparator is connected to the inputs of the first and second drivers, and the output of the second comparator is connected to the inputs of the third and fourth, third drivers. The output of the first driver is connected to the inputs of the first and third e-e5 cops OR. The output of the second shaper is connected to the second input of the third element OR, to the synchronizing input of the second memory block and the first input of the second element OR. The output of the third driver is connected to the third input of the third element OR, which synchronizes the input of the third memory block and the second input of the second element OR. Fourth exit

The shaper is connected to the fourth input of the third OR element and the second input of the first OR element, the output of which is connected to the sync input of the first memory block. Output

0 of the third element OR is connected to the reset input of the counter, to whose counting input the output of the clock generator is connected. The output of the counter is connected to the information inputs of all--blocks of memory. The output of the first memory block is connected to the first input of the multiplier, the output of which is connected to the input of a divisible division block. The output of the third memory block

0 is connected to the second inputs of the adder and multiplier. The output of the second memory unit is connected to the first input of the adder, the output of which is connected to the input of the divider of the dividing unit, output

- which is connected to the first input of the AND block, the output of the second OR element is connected to the delay line input, the output of which is connected to the second input of the AND logic element block I. The output of the AND block is the output of the device, the output signals from which correspond to the signal peaks reproduced with a carrier l magnetic recording 2j. A disadvantage of the known device is an increase in the error in determining the time interval, the value of which is composed of two values of the error when determining the position of two signal peaks relative to the time moments of the signal level with the reference voltage levels, and the error of the time limits of these time points that as a result, reduces the fidelity of the reproduction result. The purpose of the invention is to increase the fidelity of the reproduction result by increasing the accuracy of determining the time intervals between adjacent peaks of the reproduced signals. This goal is achieved by the fact that in the device for determining the time intervals between adjacent peaks of signals reproduced from a magnetic recording medium containing a magnetic reproduction head,. conjugated with a magnetic record carrier and connected to a playback amplifier, source of voltage reference levels, first and second comparators, first, second, third and fourth drivers, first, second and third elements OR, clock generator, counter, first, second and a third memory block, a multiplier, a first accumulator and a division unit, the output of the playback amplifier being connected to the second inputs of the first and second comparators, the first inputs of which are connected respectively to the positive and negative outputs. the voltage source of the reference voltage levels, the output of the first comparator is connected to the inputs of the first and second formers, and the output of the second comparator with the inputs of the third and fourth formers, the first OR element combines the outputs of the first and fourth formers, and the second element OR outputs the second and third drivers, while the output of the first element OR is connected to the synchronizing input of the first memory block and the output of the third element OR to the reset input of the counter, a clock pulse generator the output is connected to the counter input of the counter, whose codes are connected to the information inputs of the first and second memory blocks, the outputs of these memory blocks are connected respectively to the first group of multiplier inputs and the first adder, and the third block outputs are connected to the second groups of inputs the memory, the outputs of the multiplier and the first adder are connected respectively to the inputs of the dividend and divider of the dividing unit, the inverter block, the second and third adders and the fourth memory block are entered, and the output of the first element OR dinene with one input of the third OR element and with the synchronization inputs of the third and fourth memory blocks, the output of the second OR element is connected to the synchronization input of the second memory block and another input of the third OR element, the output connected to the input of the clock generator, outputs of the second memory block These are connected to the information inputs of the third memory block, the codes of the division block are connected via a block of inverters to the second group of inputs of the second adder, which is connected to the outputs of the first block by the first group of inputs Single memory, and outputs - to the data inputs of the fourth memory block tich', outputs connected to inputs of the first group of the third adder, the second and third groups of inputs of which are connected respectively to the outputs of the block division, and outputs the third block of memory. FIG. Figure 1 shows the signal plots, referring to the principle of determining the time intervals between adjacent peaks of the reproduced signal; in fig. 2 is a block diagram of the proposed device; in fig. 3 - signal plots explaining the operation of this device. FIG. 1 the time interval between the coincidence of the reproduced signal with a positive reference level and the coincidence of this signal with a negative reference level is denoted by i, the time interval between two adjacent matches of the reference levels of the same polarity with the reproduced signal 2, the time interval between the coincidence of the reproduced signal with a negative reference level and the coincidence of this signal with a positive reference level tj, the interval of time between the coincidences of the reproduced signal with lux) x equals, and the moment equation of time

of that signal to the peak value of t, the time interval between the moment of an alert of the reproduced signal and the same value and the coincidence of that signal with any of the 5 levels -ij.

Thus, the time interval between adjacent peaks of the reproduced signal is defined as

i - {5 i 4 ° its location is necessary to determine

the values of the intervals t, i, and ty in the first case, i.p.ij, i- the second case.

The proposed device (FIG. 2) 15 contains a magnetic recording medium 1 coupled to a magnetic reproduction head 2, a reproduction amplifier 3, a source 4 of reference voltage levels, the first 5 and the second 20 6 comparators, the first .7, the second 8, the third. and fourth 10 forwarders, first 11, second 12 and third 13 OR elements, 14 clock pulse generator, counter 15, first 16.25 second 17 and third 18 memory blocks, multiplier 19, first adder 20, dividing unit 21, block 22 inverters, the second adder 23, the fourth memory block 24 and the third adder 25. o

The output of the magnetic reproduction head 2 is connected to the reproduction amplifier 3, which is connected to. the second inputs of the first 5 and second 6 comparators, the first inputs of which are associated respectively with the outputs of the positive and negative voltage levels of the source 4 reference voltage levels.

The output of the first comparator 5 is connected with the input of the first 7 and second 8 drivers, and the output of the second comparator 6 - with the third 9 and quarter 10 drivers. The outputs of the first 7 and fourth 10 formers are connected to the inputs of the first element OR 11, and the second 8 and third 9 formers are connected to the inputs

the second element OR 12. I

The code of the first element OR 11 soy-SO is dinene with the first input of the third element OR 13, as well as with the synchronization inputs of the first 16, third 18, and fourth 24 memory blocks. The output of the second element OR 12 under 55 is keyed to the second input of the third element OR 13 and to the synchronizing input of the second memory block 17.

The output of the third element OR 13 is connected to the input of the generator 14 takTovyh pulses and with the reset INPUT of the counter 15. The output of the clock generator is connected to the counting input of the counter 15, the outputs of which are connected to the information inputs of the first 16 and second 17 memory blocks. The outputs of the first memory block 16 are connected to the first groups of inputs of multiplier 19 and the second adder 23. The outputs of the second memory block 17 are connected to the information inputs of the third memory block 18 and to the first group of inputs of the first adder 20. The outputs of the third memory block 18 are connected the second groups of inputs of the multiplier 19 and the first adder 20 and the third group of inputs of the third adder 25. The outputs of the multiplier 19 are connected to the inputs of the dividend divider 2 division, and the outputs of the first adder 20 - to the divider inputs of divider 21 division, the outputs of which are connected The inputs of the inverter unit 22 and the second group of inputs of the third adder 25. The outputs of the inverter unit 22 are connected to the second group of inputs of the second adder 23, the outputs of which are connected to the information inputs of the fourth memory block 24, the outputs of which are connected to the first group of inputs of the third adder 25, output which is the output of the device

The device works as follows.

The signal from the magnetic recording medium 1 reproduced by the magnetic head 2 is amplified in the reproduction amplifier 3, and from its output the amplified signal Hfig. SL) comes to the first 5 and second 6 comparators, in which signals are formed when comparing the reproduced signal (Fig. 3) with positive and negative voltage levels, specified by the source 4 reference levels

voltage (plot B and Fig 3). t

First, second, third and fourths

shapers produce short pulses along the leading and trailing edges of the output signals of the comparators (diagrams D, E, F and G in Fig. 3), while the pulses corresponding to the end of time intervals i are formed at the output of the first element OR 11 (Fig. 1), and the output of the second element OR 12 is the pulses corresponding to the end of the time intervals ij (FIG. 1). Through the third element OR 13 these pulses (Fig. 3N) enter the input of the clock generator 14 to the reset input of the counter 15. Pulse frequency generator 14 active pulses far exceeds the frequency of the pulses generated from the reproduced signal by the formers and comparators.The counter 15 counts the signals of the clock pulse generator between two adjacent reset pulses. The information signals from the output of the counter 15 (Fig. LC) are fed to the first or second blocks 16 or 17 of the memory After that, the state of the counter takes on a zero value, ready for a new count. The information signals from the output of the counter 15 are recorded in the first memory block 16, if a signal The output of the first element OR 11, and in the second memory block 17, if the synchronization input received a signal from the code of the second element OR 12, the information signals from the output of the second memory block 17 are copied to the third memory block 18, if the sync input received a signal from the output of the first element OR 11. The inputs of the multiplier 19 are given signals from the outputs of the first 16 and third 18 memory blocks, in which information about the time intervals ij and -tj are stored, and the output of the multiplier 19 generates signals corresponding to t, i 2 input The s of the first adder 20 receives signals from the outputs of the second 17 and third 18 memory blocks, in which information about the time slots-1 and tj is stored. At the output of the first adder 20, signals are generated corresponding to the value of i - | + i. The split unit 21 divides the values of the signals from the output 1 968 of the multiplier 19 by the value of the signals from the output of the first adder 20. At the output of the split unit 21, signals are generated corresponding to the time interval value. The signals from the output of the split unit 21 are fed to the inputs of the inverter unit 22, in which signal values are inverted. Signals from the output of the inverter unit 22 and from the output of the first memory block 16 are fed to the inputs of the second adder 23, as well as the signal of the logical unit to the lower bit (subtraction is replaced by addition in the reverse code, while the slope | is reduced by the forward code and subtracted in the reverse code), and the output of the second adder 23 generates signals corresponding to the time interval value. The signals from the output of the adder 23 are fed to the fourth memory block 24, if its input signal is received from the output of the element OR 11. The third The second adder 25 is supplied with signals from the outputs of the third 18 and fourth 24 memory blocks and from the outputs of the division unit 21. At the output of the third adder 25, signals are formed (conventionally shown in Fig. 3, the moments of formation of the output signals), in odd cycles corresponding to the value of the time interval between adjacent peaks of the output signal - tj + -t + i, and in even cycles of operation of the device f t5 + + t . The use of the invention makes it possible to directly determine the intervals between adjacent peaks of the reproduced signals with a smaller error, which improves the accuracy of determining their temporal position and, thus, increases the accuracy of the reproduction result.

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Claims (1)

DEVICE FOR DETERMINING TIME INTERVALS BETWEEN NEARBY SIGNAL PEAKS PLAYABLE FROM A MAGNETIC RECORDING MEDIA, comprising a magnetic playback head coupled to a magnetic recording medium and connected to a playback amplifier, a voltage source of the first, second, second, second and second components first, second and third elements OR, clock generator, counter, first, second and third memory blocks, a multiplier, a first adder and a division block, the output being the playback amplifier is connected to the second inputs of the first and second comparators, the first inputs of which are connected respectively to the outputs of the positive and negative voltage levels of the source of the reference voltage levels, the output of the first comparator is connected to the inputs of the first and second drivers, and the output of the second comparator to the inputs of the third and fourth drivers , the first OR element combines the outputs of the first and fourth formers, and the second element OR the outputs of the second and third formers, while q of the first OR element is connected to the synchronizing input of the first memory block, and the output of the third OR element is connected to the counter reset input, the clock pulse generator is connected to the counter input of the counter, the outputs of which are connected to the information inputs of the first and second memory blocks, the outputs of these memory blocks are connected respectively, to the first groups of inputs of the softener and the first adder, to the second groups of the inputs of which the outputs of the third memory block are connected, the outputs of the multiplier and the first adder are connected, respectively about with the inputs of the divisible and divisor unit. division, characterized in that !, in order to increase the fidelity of the playback result by increasing the accuracy of determining the time intervals between adjacent peaks of the reproduced signals, an inverter block, a second and third adder, and a fourth memory block are introduced into it, and the output of the first OR element is connected to one input the third OR element and with the synchronizing inputs of the third and fourth memory blocks, the output of the second OR element is connected to the synchronizing input of the second memory block and to the other input of the third element nt OR, by the output of a clock generator connected to the input, the outputs of the second memory block are connected to the information inputs of the third memory block, the outputs of the division block through the inverter block are connected to the second group of inputs of the second adder, which is connected to the outputs of the first memory block by the first group of inputs, and the outputs - to the information inputs of the fourth memory block, outputs connected to the first group of inputs of the third adder, the second and third groups of inputs of which are connected respectively to the outputs of the division unit and outputs of the third memory block.