SU1123086A1 - Device for adjusting reversible rectifier - Google Patents

Abstract

A DEVICE FOR CONTROLLING A REVERSIBLE RECTIFIER, containing a pulse generator with a variable HbjM resistor, connected to the c4eiT input of the counter, the outputs of which are connected to the inputs of the gateway and the second switch, respectively, two delay elements, the output of which is intended to be connected via a corresponding amplifier with a relay and one the inputs of the common element H-NOT, the trigger, from l and .4 and it with the fact that, in order to expand the functional possibilities, it is equipped with four additional AND-NOT elements, three resis proof operation, the third and fourth switches, and a capacitor element, or wherein the trigger is configured as a J K flip-flop with an established. through the resistor to the positive bus, the power supply, and through the capacitor and the connected third switch parallel to the negative power bus, the setting input of the Trigger device and the output of the common INE element are connected to the inputs of the OR element, the output of which is connected to the setting input of the pulse counter , the counting input of the 3K trigger, via a closing switch, the contact of one of the relays is connected to the output of the first switch and through the closing contact of another relay to the output of the second switch, one of the two One JK trigger is connected to the first inputs of the first and fourth additional AND NAND elements, and the other to the first inputs of the second and third additional AND elements, the second inputs of the first and third, second and fourth additional INE elements are interconnected and each pair of these inputs is connected via a resistor to the positive power bus and through the fourth switch to the negative power bus, the outputs of the first and second additional AND-NOT elements are connected to the input of one element support, and the outputs of the third and fourth additional elements of the EE - to the input of another delay element.

Description

The invention relates to electrical engineering, in particular, to control devices for reversible rectifiers 7 and can be used in reversible rectifying units that automatically reverse current in the load after a predetermined time. A device is known to contain (its two pulse generators with adjustable frequency, output and other power amplifiers, delay elements, OR-NOT elements, trigger, switches and pulse counters having a setup input and 1 outputs, $ this device to the output of each of the generators pulses are connected to one pulse counter, the outputs of one of which are connected via a switch to the first trigger input, and the output of the other to the second trigger output via another switch. In addition, to each of the outputs, trigger through serially connected - intermediate power amplifier, delay element and element OR are NOT connected to one output amplifier: the power of the first of which the output is connected to the setup input of the second pulse counter and the rectifier thyristor control system, and the second to the installation input of the first pulse counter and to the system for controlling the thyristors of the rectifier bodies 1 j .. However, this device inefficiently uses generators and pulse counters, because during operation of one of the However, the other counter is inhibited and does not perform its functions. In addition to the t-oh, after each power supply to this device, the trigger is set to any of the steady states. As a result of this, the rectifier begins to work, not always with the same output voltage, e8i, which is required by the rectifier load. The closest to the technical essence of the proposed is a device containing a variable frequency pulse generator, to the output of which is connected the input of the counter of ketches, one output of which through the first switch is connected to the nepBOw trigger floor and the other part of the output through the second switch k to the second input of the trigger. To each of the trigger outputs, via a delay element, one connection is connected, one output of which is connected to one relay and one element of which is connected to the setup input of the Impulse counter. However, the known device / does not always ensure the inclusion of the high voltage watches in operation with the polarity of the output voltage that the load of the rectifier requires. This is due to the use of a trigger in the device, which, when energized, can be set to Any of stable states, and the device, depending on the state of the trigger, allows the thyristors to work either providing or not providing the necessary output polarity rectifier voltage In addition, the device does not allow the reversible rectifier to operate with one pre-selected polarity of the output voltage, which limits the technical capabilities of the reversible rectifier. The purpose of the invention is to expand the functionality of the device. The goal is achieved by the fact that a device containing a pulse generator with a variable resistor connected to the counter input of the counter, the outputs of which are connected to the inputs of the first and second switches, respectively, are two delay elements whose outputs are intended to be connected via an appropriate amplifier with a relay and one of inputs ottojero element AND-NOT, trigger, equipped with four additional elements AND-NOT, three resistors, the third and fourth switches, a capacitor and an OR element, and three the generator is made in the form of an AC trigger with a setup input that is connected via a resistor to the polsitelnuyu bus, power, and through a capacitor and a connected third switch parallel to it - to the negative power bus, the setup input of the CLC trigger and the output of the common element AND are NOT connected to the inputs of the OR element, the output of which is connected to the installation input of the pulse counter, the counting input OK of the trigger through the closing contact of one of the relays connected to the output of the first Switch and through the closing contact of the other relay to the output the second switch, one of the outputs of the ZK-flip-flop is connected to the first inputs of the first and fourth Additional Elements AND-NOT, and the other to the first inputs of the second and third Additional Elements AND-NOT, the second inputs of the first and third, second and fourth additional elements AND -NON-respectively, interconnected and each pair of the indicated voltage switches is connected through a resistor to the positive power bus and through the fourth switch to the power center, the outputs of the first and second additional elements AND NOT The key to the input of one

The delay elements, and the third-party outputs, the fourth additional I-NOT elements, to the input of another support element.

The drawing shows the basic electrical circuit of the device;

The control unit contains a generator of 1 pulses, to the output of which the input of the counter of 2 pulses is connected, one part of the outputs of which is connected to the inputs of the first switch 3, and the other part - to the inputs of the second switch 4, L (C-flip-flop 5, through additional elements 6 and 7 AND-NOT, element 8 delay and amplifier 9 are connected relay 10 and the first input element 11 AND-NOT, and through additional elements 12 and 13 AND-NOT element 14 delay and amplifier 15 relay 16 and the second input element 11 INE, the output of which is the installation input of the Dk-trigger 5 Connected to the inputs are {1enta 17 OR, connected to the installation input of counter 2, pulses, resistors 18-20, third and fourth switches 21 and 22, capacitor 23, positive 24 and negative 25 of the power bus. In the device, the ZK-trigger 5 counters through the closing contact 26 of the relay 10 is connected to the output of the first switch 3, and through the closing contact 27 of the relay 16 to the output of the second switch 4, the setup input of the 3K flip-flop 5 through the resistor 18 is connected to the positive power bus 24 and through the capacitor 23 and parallel to it The third switch 21 is connected to the negative power supply bus 25, 3 and K inputs of the Trigger 5 is connected to the positive power bus 24, one of the outputs of the 3k trigger 5 is connected to the first inputs of the additional elements 6 and 13 NAND, and the other to the first inputs of additional elements 7 and 12, the second inputs of additional elements 6 and 12 AND-NOT through resistor 20, and additional elements 7 and 13 AND-NOT through a resistor. 19 are connected to the positive power supply bus 24 j and through the fourth transponder 22 to the negative power bus 25. To control the rectifier, the output of element 11 is NOT connected to the rectifier thyristor control system. . ; The operation of the device will be considered in the case of the initial position of the switches 21 and 22 (see drawing).

After supplying the power supply device to the setup input of the trigger 5, the signal O is fed through the switch 21, which leads to the appearance of the signal O on the forward

output CA-trigger 5 and signal 1 on the inverse output. These signals are sent to the first inputs, respectively, of elements 6,.,., 13, 7 and 12 AND-NOT. At the same time, the signal O is fed through the switch 22 to the second inputs of elements 6 and 12 I-N, and the signal 1 is sent to the second inputs of elements 7 and 13 I-NOT. At these

0 input signals at the outputs of elements 6 and 7 AND-NOT will signal, and the outputs of elements 12 and 13 AND-NOT signal O. From the outputs of elements 6 and 7 AND-NOT signal 1 through element 8

5 delay enters the input of the amplifier 9, which under the action of the incoming on. the signal input turns on the relay 10. Relay 16 is at this time turned off, since the input to enable it

0 amplifier 15 through delay element 14. Signal O is received. At the indicated positions of relays 10 and 16, one input of element 11 does NOT come from the amplifier output. 9 signal O is received, and the other input from the output of USI 15 is the signal 1. As a result, at the output of element 11, IS-NOT allows which

det signal

work thyristor control system rectifier.

0

When the position of the switch 22 changes, the signal 1 is fed through the resistor 20 to the second inputs of elements 6 and 12 AND-NOT, and to the second inputs of elements 7 and 13 AND-NOT through

5, the switch 22 receives a signal O. As a result, the opposite signals at the outputs of elements 6 and 7, 12 and 13 are NOT-NOT, which causes the relay 10 to turn off and the relay 16 to turn on, as well as the output of signal 11 of the output AND-NOT allowing the output thyristor control system rectifier operation.

five

Thus, by means of switch 22, a switch is provided. relay 10 and 16, but since in the reverse rectifier the contacts of one of the indicated relays are used to turn on the thyristors in the forward direction, and the contacts of the other relay are used to turn on the reverse thyristors, the output switch is provided with the help of the switch 22.

5 Current rectifier.

When open-contact switch 21, the proposed device provides automatic reversal of the rectifier output current

0 at predetermined time intervals. This is provided as follows.

After supplying the device, the power supply starts to charge.

5 capacitor 23 and at this time sig. : O from the capacitor 23 enters the installation input of the trigger, 5 and through the element 17 OR - to the installation input of the counter 2 pulses. At the same time, the pulse counter 2 and JK - three ger 5 are set to the initial state, which, at the position indicated in the drawing, switches 22 to turn on the relay 10, which connects the output 26 of the switch 3 to the counting input 3U - three ger 5 From the moment when the capacitor 23 is charged, the signal O does not reach the specified installation inputs, and the pulse counter 2 counts the pulses generated by the pulse generator 1. After counting a certain number of pulses, the signal 1, coming through the switch 3 and the contact 26 from the output of the counter 2 pulses to the counting input Ok of the trigger 5, changes to the signal O, and this translates the RC trigger 5 to another stable state. As a result, the opposite signals are changed at the first inputs of elements 6 and 13, 7 and 12 I-NOT, which leads to a change to the opposite signals at the outputs of elements b and 7, 12 and 13 I-NOT From this moment the signal 1 stops coming The input of amplifier 9 and this amplifier instantly disconnects relay 10. At the same time, the output of amplifier 9 is a signal 1, which is fed to the first input of the element 11 TH. Immediately after the transition of the DK-trigger 5 to another stable state, signal 1 from the output of amplifier 15 is also sent to the second input of element 11, since signal 1 from the output of elements 12 and 13 of the IS post is inputted to amplifier 15. It drops through delay element 14 not instantaneously, but with a time delay. As a result, during the time delay at the output of the INE element 11, a signal O appears, which prohibits the operation of the rectifier thyristor control system and which enters through the element 17 OR to the installation input of the 2 pulse counter and sets it to the initial state. When the signal 1 arrives at the input of the amplifier 15, the latter switches on the relay 16, which connects the output of switch 4 to the counting input of the LC three-pin 5 with its contact 27, the tape signal O from the output of the amplifier IS is fed to the second input of the element 11 NOT that a signal appears at the output of this element of signal 1, which permits operation of both a 2-pulse counter and a rectifier thyristor control system. The counter of 2 pulses, as soon as it receives a work permit, starts counting the pulses again, and after counting a certain number of pulses of signals 1, coming from its output through switch 4 and pin 27 to the counting input LC, triggers. Hera 5, changes to the signal O, and this change in the signal places the LC-Tigger 5 into its original steady state. In this case, the relay 16 is turned off, the second input of the element 11 AND-NOT receives the signal 1, which causes the appearance of a signal O at its output, the action time of which is determined by the delay element 8. After the signal 1 is received at the input of the amplifier 9, the relay 10 is turned on and the device operates in the same way as described. When the switch 22 is set in the opposite position to that indicated on the drawing, after the power supply voltage is applied to the device, the relay 16 turns on, and the device works in the reverse order of that described. The time of the 3 K-flip-flop 5 in each of the SUSTAINABLE states, and accordingly the running time of the direct ones. and reverse thyristor rectifier is determined by the frequency of the pulse generator 1 and the switch position. 3 and 4. Usually, when using reversible rectifiers, the operating time of the forward and reverse thyristors is unequal. To ensure this, the outputs of the counter 2 pulses are connected to the counting input 31 (-trigger 5 via pins 26 and 27. Due to this, the output of the counter 2 pulses from which the signal 1 time changes O signal. Compared with the known, this device ensures that the rectifier enters into operation with any voltage required by the StdxoiD.Horo polarity, by using in the device even 1 EX cell, three resistors, the co-sender and the switch. proposed device for sc t and using another switch element or provides either automatic roar {) sir6vanie rectifier output current or last work with any selected polarity output voltage and with the possibility of varying polarity.

Claims (1)

DEVICE FOR CONTROL OF A REVERSE RECTIFIER, comprising a pulse generator with a variable resistor connected to the counter input of the counter, the outputs of which are connected to the inputs of the first and second switches, respectively, two delay elements, outputs _; which are designed to be connected via an appropriate amplifier with a relay and with one of the inputs of a common AND-NOT element, a trigger, which is related to the fact that, in order to expand the functionality, it is equipped with four additional elements And NOT, with three resistors, the third and fourth switches, a capacitor and an OR element, and the trigger is made in the form of a J to-trigger with set-. an external input, which is connected through the resistor to the positive bus, the power supply, and through the capacitor and parallel connected to it a third switch to the negative power bus, the installation input 3 of the trigger and the output of the common INE element are connected to the inputs of the OR element, the output of which is connected to the installation input of the pulse counter , the counting input of the JK trigger through the make contact of one of the relays is connected to the output of the first switch and through the make contact of the other relay to the output of the second switch, one of the outputs 3K iggera connected to first inputs of first and fourth additional AND-NO elements, and the other - to the first inputs of the second and third additional. NAND elements, the second inputs of the first and third, second and fourth additional INE elements are respectively interconnected and each pair of these inputs is connected through a resistor to the positive power bus and through the fourth switch to the negative power bus, the outputs of the first and second additional AND elements -NOT connected to the input of one delay element, and the outputs of the third and fourth additional INE elements to the input of another delay element. - “F