SU1120252A1 - Digital analyzer of frequency characteristics - Google Patents

Abstract

A DIGITAL ANALYZER OF FREQUENCY CHARACTERISTICS containing a calculator of Fourier coefficients, the first and second control inputs of which are connected respectively to the first and second outputs of the control unit whose input is connected to the control input of the analyzer, the converter analogue — the code whose input is connected to the input of the analyzer, the control input connected to the second output of the control unit, and the output to the input of the calculation of the Fourier coefficients and the input of the first accumulating adder, the unit for calculating the amplitude and phase of the harmonic the course of which is connected to the output of the analyzer, characterized in that, in order to increase the accuracy of calculating the Fourier coefficients in the study of signals containing the subharmonic component and determine the number of the subharmonic, the first And element, the second accumulating adder and the second And element, are entered into it, the output of which is connected to the input of the block for calculating the amplitude and phase of the harmonic, the third element AND connected in series, the third accumulating adder, the fourth element AND, the first block cf codes, the fifth AND element, the first OR element, the first delay element and the first pulse elimination unit from the sequence whose output is connected to the second input of the second accumulating adder, the second delay element connected in series, the first counter, the first counter state analysis unit, and the third delay element, the output of which is connected to the second input of the first accumulating adder, and the input to the first input of the third element And, the second input (which is associated with the output of the first accumulating sum ora, the fourth accumulating adder sequentially connected, the sixth AND element, the second code comparison block, the second OR element, the second counter and the seventh, AND element, the output of which is the output of the analyzer's monogram number number of the analyzer, and the second and third analysis blocks neither the 1C counter and the persistent storage device, the input of which is connected to the output of the counter and, through the second block of analysis of the state of the counter, to the output of the analyzer and the second input of the first OR element, its output connected to the second input of the second AND gate, the outputs of PROM device through comparing respective blocks connected to inputs of the echo of the fifth AND gate and a second OR gate, the outputs of the control unit are coupled to the inputs of the second delay element and the first

Description

the counter, output through the third block of state analysis of the counter connected to the second input of the fourth element I, the input of the first accumulating adder is connected to the first input of the fourth accumulating adder, the second input of which is connected to the second input of the third accumulating adder connected to the third input of the second accumulating adder and the second input of the second counter, the second input of the seventh, And element is connected to the output of the fifth And element, the first input of the first of the AND gate is coupled to the output of the Fourier coefficient calculator, and a second input from the output of the second element zag Derzhko and second input eliminating unit of the first pulse of a sequence.

The invention relates to an information-measuring technique and can be used in experimentally determining the frequency characteristics of dynamic objects, as well as for measuring the amplitudes and phases of individual harmonics ... of the analyzed signal, for example, in vibration tests of objects. The closest in technical essence to the invention is a digital serial analyzer comprising a series-connected reference frequency generator, a frequency divider, a switch, an encoder, a digital multiplier device and a first reversible counter, serially connected to a frequency divider. analogue converter - code, second digital duplicating device and the second reversible output counter, calculator of Fourier coefficients, connected An analogue is a code with a converter, a third reversible counter for determining a constant component, the input of which is also associated with the second input of the second multiplying device, the first input of which is connected to the encoder associated with the control unit, and also contains the amplitude and phase calculating unit harmonics l3. A disadvantage of the known device is the low accuracy in the study of objects, the response signal of which may contain a subharmonic component with an unknown subharmonic number. Since the harmonic analysis calculates the Fourier coefficients over time T, equal to the excitation frequency period, the appearance of subharmonics will lead to distortion or complete loss of information about the actual structure of the signal spectrum. The aim of the invention is to improve the accuracy of calculating the Fourier coefficients in the study of signals containing a subharmonic component, and the determination of the number of subharmonics. The goal is achieved by the fact that in a digital analyzer of frequency characteristics, containing a calculator of Fourier coefficients, the first and second control inputs of which are connected respectively to the first and second outputs of the control unit, the input of which is connected to the control of the analyzer input, the analog converter - code, the input of which is connected to the input of the analyzer, the control input is connected to the second output of the control unit, and the output to the input of the calculator of the Fourier coefficients and the input of the first accumulating adder, the unit in Calculations of the amplitude and phase of the harmonic, the output of which is connected to the output of the analyzer, are entered in series by the first element AND, the second accumulating adder and the second element AND, the output of which is connected to the input of the amplitude and phase phase harmonics,

the third element AND connected in series, the third accumulating adder, the fourth element AND, the first block of code comparison, the fifth And, the first element OR, the first delay element and the block for eliminating the first pulse from the sequence, whose output is connected to the second input of the second accumulating adder, are connected in series the second delay element, the first counter, the first block of state analysis of the counter, and the third delay element, the output of which is connected to the second input of the first accumulating adder, and the input from the first The third input of the third element, whose second input is connected with the output of the first accumulating adder, the fourth accumulating adder, the sixth AND element, the second code comparison block, the second OR element, the second counter and the seventh And element, whose output is the output of the number code subharmonics of the analyzer, as well as the second and third blocks of the analysis of the state of the counter and the persistent storage device whose input is connected to the output

counter and through the second block of analyzing the state of the counter to the output of the analyzer and the second input of the first element OR, its output connected to the second input of the second element AND, the outputs of the permanent storage device are connected to the second inputs of the fifth element AND and the second element OR, the outputs of the control unit are associated with. the inputs of the second delay element and the first counter output through the third block of state analysis of the counter connected to the second input of the fourth element I, the input of the first accumulating adder is connected to the first input of the fourth accumulating adder, the second input of which is connected to the second input of the third accumulating adder and the input of the first delay element whose output is connected with the third input of the second accumulating adder and the second input of the second meter, the second input of the seventh element I is connected to the output n And the element, wherein the first input of the AND pervog coupled to the output of the Fourier coefficients calculator, and the second

Vc - with the output of the second delay element and the second input of the first pulse elimination unit from the sequence.

The drawing shows a structural electrical circuit of a digital frequency response analyzer.

The analyzer contains serially connected control block 1, converter 2 analog - code, calculator of 3 Fourier coefficients, element ON accumulating adder 5, second element AND 6, serially connecting element AND 7, accumulating adder 8, element AND 9, block 10 comparing codes, element 11, element 12, serially connected delay element 13 and accumulating adder 14, block 15 for calculating the amplitude and phase of a harmonic, block 16 for eliminating the first pulse from a sequence connected between element 4 and accumulating m adder 5, delay elements 17 and 18 connected to the input of elements AND 12, read-only memory 19, first and second elements OR 20 and 21, blocks 22 - 24 for analyzing the state of the counter, block 25 comparing codes connected to the output of the element And 26, the counters 27 and 28, connected to the elements 17 and 18 of the delay, respectively, and accumulating adder 29.

The device works as follows.

The analyzed signal containing subharmonics can be represented as

ilO - Cp a; i (

 , f 2ffK X, 5 ..),

()

where Ср is the subharmonic amplitude;

p is the subharmonic number; 6p is the initial phase of a subharmonic. To eliminate the influence of subharmonics, it is necessary to extend the analysis interval from TD to mXg, where, 2, ... p. The errors in the calculation of the Fourier coefficients a n and b in this case are determined by the expressions

gsr-p. . / 7 - / „V

) 2. 2Cp. . 7 1 Qp). (.7) and are zero at. Such an expansion of the integration interval, on the one hand, leads to a sharp decrease in the analyzer's speed, and on the other hand, it does not allow to determine the presence of a subharmonic and, as a result, a subharmonic resonance. In order to maintain a quick action, it is necessary to determine the presence of a subharmonic and its p-number in the process of calculating ay, and bf, and provide means to reduce its influence on the accuracy of the coefficients. For this purpose, in parallel with the calculation of the Fourier coefficients a and b, the estimates of a and b are calculated. The estimates of a and bjj are calculated with a shift of the summation interval by Tg / 2 according to the formulas (the limiting case is the integration) iTiTgTal2 + ftiTe ao | iWa, i 1 at j10 J / ° Tgl2 and are related to the errors ai, ratios. . . .. r -. P From here, given the admissible magnitude of the error dA. The calculation of the Fourier coefficients, one obtains the predictions for the values of the estimated values of the modulus) / / g (. (O, / OO / OSAOL Oli-g, p / lo) / - bc t- If the value of any estimate exceeds the pre-set permissible level, this gives information on the presence of signals of a significant subharmonic level in the analysis.In this case, it produces a consistent extension of the summation interval (Te to tT, where, 2 ..., r. At each increase the terminal on Tg calculates new estimates of a and b and compares them with acceptable values. Calculations are performed until, due to orthogonality properties, the estimates do not exceed the allowable values. The value of m is determined by the subharmonic number R. The analyzed signal f (t) from the object of study is fed to the input of the converter 2 analogue - a code that converts the instantaneous values of f (t) at N points of the period T ".sinusoidal excitation signal of the object into the code and feeds them to the calculator 3 of the Fourier coefficients and to the first 14 and . fourth 29 accumulating adders. The conversion times f (t) to the code are set by the control unit 1, which generates a sequence of short duration pulses coming from its second output with a Tg / N following period to the control input of the converter 2 analogue code. The same pulses are applied to the second control input of the calculator 3 Fourier coefficients and are used as clock for its operation. The input of the control unit 1 is the control input 30 of the analyzer, to which a reference sinusoidal signal is applied, which is the excitation signal of an object whose period is equal to T-. At the first output of the control unit 1, short duration pulses are formed corresponding to the beginning and end of the period Tg, which are fed to the first control input of the calculator 3 Fourier coefficients and serve to control the beginning and end of the calculation of the coefficients. For each period Tg calculator 3 calculates the Fourier coefficients. At the end of the period Tg, the signal from the first output of the control unit 1 is used to forward the results of the results of a and b in the form of the output of the 3 Fourier coefficients at the output of the calculator, then, with some delay DiiTg / N, specified by the delay element 17, codes a and b are Ment 4 comes to the second accumulative adder 5, and calculator 3 starts calculating the coefficients a and b for the next period T. Simultaneously with calculating the coefficients a and bf, accumulating 7 adders 14 and 29 receive the estimates -irL "4i" TEO b where K, KN / 2. The estimate of b is obtained with a shift of the summation interval by TD / 2 (shift of the numbers of counts by N / 2), which is ensured by the process of resetting the accumulating adder 29. The processes of obtaining the estimates a and bb and their comparison with admissible values are controlled with the help of a counter 27. At the beginning (or end) of the period T on the signal: From the first output of the control unit 1 coming through the delay element 17 to the installation input of the counter 27, the counter 27 is reset to the zero state. At the input of the counter 27, operating in the summation mode, pulses are applied from the second output of the control unit 1, following with a period. State or account. 27 (code) is analyzed by two LIVE counter analysis blocks 23 and 24 connected to its output. When the code value in counter 27 becomes equal, a signal appears at the output of the counter state analysis block 23, which first rewrites the resultant accumulator 14 code value, corresponding to 1 value a, accumulates accumulator I 7 (accumulator 8, then with delay CxTg / N, determined by delay element 13, dumps accumulator adder 14 into zero state, preparing it to get a score for the nextperiod Td. The meter state analysis block 24 produces a pulse when the code in the counter 27 is KN / 2-1, i.e. if two adjacent TQ periods are considered, during this time two pulses appear at the output of the block 24, corresponding to the midpoints of these periods. If the accumulating adder is set to the zero state after the appearance of the first impulse, then with the arrival of the second impulse, a code is obtained that corresponds to bit 2 b, and the first count involved in obtaining the b score is counting from by number, and K varies from O - (N-1). Thus, by the time of the pulse pulse, the output codes of the counter state analysis 24 in accumulating adders 5 and 8 are, respectively, the coefficient codes a and bft and the evaluation code a, obtained in the previous period, and in the accumulating adder 29 there is simultaneously an evaluation code Bd Therefore, for each output pulse of block 24, the evaluation codes a and bd, respectively, through elements 9 and 26 are fed to the first inputs of blocks 10 and 25, respectively, comparison codes, to the second inputs of which are fed from the first and second output of the permanent storage device 19 codes corresponding to valid modulo the values of the estimates of the rear (ha) and bodop (n) (6) If both conditions (6) are fulfilled, then at the first outputs of blocks 10 and 25 of the code comparison, signals appear simultaneously, which leads to the appearance of a signal at the output of the element 11, which is through an element t OR 20 resets the accumulating adders 8 and 29 to the zero state, preparing them to get the estimates a, j and b d for the next periods Td, passing the codes of coefficients a and bf from the output of accumulating adder 5 through element 6 to the input of block 15 calculating the amplitude and phase of the harmonic, transmitting the code received by this time in the counter 28 through the element 12 to the output, which is the output of the code of the analyzer subharmonic number, then with a certain delay determined by the delay element 18, resets to zero state the accumulator 5 and the resetting of the block 16 for removing the first pulse from the sequence and the counter 28. The initial state of the counter 28 is a code. If at least one of the conditions (6) is not fulfilled, which indicates the presence in the analyzed signal of subharmonics, then signals appear at one or both of the second outputs of blocks 10 and 25 simultaneously if two conditions (6) are not fulfilled, which leads to the appearance the signal at the output of the element OR 21 and the absence of a signal at the output of the element AND 11. The signal from the output of the element OR 21 is fed to the input of the counter 28, increasing its code 1. The counter 28 at the control input of the persistent storage device 19 selects new code values matching with the following (6) modulo-admissible values of estimates of Backl | and () which are fed to blocks 10 and 25 of the code comparison to verify the conditions (6). In the absence of a signal at the output of the element 11, the accumulative adders 8 and 29 and the counter 28 do not drop; therefore, they consistently accumulate the sums corresponding to the estimates a and b d for m periods Tn, which are compared in series with) and bod (t ), and the counter 28 accumulates the value of ha. This process continues until conditions (6) are fulfilled. At the same time, the signal from the output of the element 11 produces through the element 12 the transmission of the code corresponding to the number of the present harmonic in the analyzed signal, at the output | C, which is the output of the code of the analyzer subharmonic number. The accuracy of the calculation of the coefficients a and b is increased by averaging the results of the number of coefficients for periods T "in accumulator 5, Sequential extension of the interval for calculating coefficients to pTg allows the use of averaged results a and b for succession the application of add and shift operations. The shift of the results is due to the operation of the block 16 for removing the first pulse from the sequence. If there is no subharmonic in the signal to be analyzed, then the cavern period Td of the signal from the output of the element AND 1 1 through the element OR 20 first passes the codes a, and b to block 15, then from the delay (delay element 18) the accumulative adder is reset 5 in the zero state and the installation of the block 16 in the initial state, therefore, with the arrival of each pulse at the end of Tg from the control block 1 to the input of the block 16 ,. there is no impulse at its output. shifting the result in accumulative adder 5, since when the block 16 is set to the initial state it excludes the first pulse from the sequence. If there is no signal from the output of the element 11, the block 16 is not set to the initial state, and the accumulating adder 5 is not reset, therefore, following the arrival of the following pulses from the control unit 1 in the accumulating adder 5, the summation is performed first and then result. This process continues until the signal from the output of the And 11 element is received, at which the exact values of codes a and b are transmitted to block 15, which connects the exact values of codes a and b and outputs the exact amplitudes and harmonic phases. If the process of expanding the summation interval in the analyzer does not stop at a predetermined value, i.e. if conditions (6) are not fulfilled, then obviously this gives information about the presence in the analyzed signal of either a constant component or a low frequency component (for example, interference), the nature of which needs to be clarified by additional studies. For this case, the analyzer uses a counter analysis unit 22 connected to the output of counter 2B. If in the counter 2B the code value becomes + 1, then the output of the counter state analysis block 22 is a signal which, through the OR 20 element, produces the same actions as the signal from the output of the AND 11 element, i.e. the analyzer starts calculating the coefficients. The same signal is fed to the analyzer signal output. The analyzer does not provide for the initial setting of a shift in obtaining time estimates by Tg / 2 ,. since this shift automatically becomes self-sufficient for the Tg periods after the analyzer is switched on. Thus, the introduced changes allow the noBbictfrb accuracy of calculating the coefficients in the study of objects whose response signal contains a subharmonic component, and determine the number of subharmonics, which distinguishes the proposed analyzer from analyzers of this type.

Claims (1)

A digital frequency analyzer containing a Fourier coefficient calculator, the first and second control inputs of which are connected respectively to the first and second outputs of the control unit, the input of which is connected to the control input of the analyzer, the analog converter is a code whose input is connected to the input of the analyzer, and the control input is connected to the second the output of the control unit, and the output with the input of the calculation of the Fourier coefficients and the input of the first accumulating adder, the unit for calculating the amplitude and phase of the harmonic, the output to which is connected to the output of the analyzer, characterized in that, in order to increase the accuracy of calculating the Fourier coefficients in the study of signals containing a subharmonic component, and determine the number of the subharmonic, the first element And, the second accumulating adder and the second element And are connected in series the output of which is connected to the input of the unit for calculating the amplitude and phase of the harmonic, connected in series with the third element And, the third accumulating adder, the fourth element And, the first code comparison unit s, the fifth AND element, the first OR element, the first delay element and the first pulse elimination unit from the sequence, the output of which is connected to the second input of the second accumulating adder, the second delay element, the first counter, the first counter status analysis unit, and the third delay element are connected in series the output of which is connected to the second input of the first accumulating adder, and the input to the first input of the third element And, the second input of which is connected to the output of the first accumulating adder, in series connected the fourth accumulating adder, the sixth AND element, the second code comparison unit, the second OR element, the second counter and the seventh, the I element, the output of which is the output of the analyzer subharmonic number code, as well as the second and third counter status analysis blocks and read-only memory, input which is connected to the output of the counter and through the second unit for analyzing the status of the counter - to the output of the analyzer and the second input of the first OR element, its output connected to the second input of the second element AND, the outputs are standing of the memory device through the corresponding comparison units are connected to the second inputs of the fifth AND element and the second OR element, the outputs of the control unit are connected to the inputs of the second delay element and the first totalizer and the second input of the second counter, the second input of the seventh, element `` And connected to the output counter, by output through the third unit of analysis of the state of the counter connected to the second input of the fourth element And, the input of the first accumulating adder is connected to the first input of the fourth accumulating adder, Ora input coupled to a second input of the third accumulator and the input of the first delay element whose output is connected to a third input of the second accumulating the fifth AND gate, the entrance lane vy first element coupled to output of the calculator Fourier efficients, and a second And the e-input with the output of the second element behind the hold and the second input of the block eliminating the first pulse a from the sequence.