SU1099399A1 - Device for adaptive synchronizing of reference oscillation of high-speed modem - Google Patents

Abstract

1.USTROYSTVO ADALTIVNOY FOR SYNCHRONIZATION reference oscillation high-speed modem, comprising series-connected first multiplier, a first adder, a first detector, a second adder, the second multiplier, a third adder and the error signal generator, a third multiplier connected in series, a fourth adder, the second detector, a fifth adder and the fourth multiplier, as well as the fifth multiplier, the sixth multiplier, the first driver of the sign of the signal, the second driver of the sign of the signal, sine-cosine generator op and integrator, while the cosine output of the sine-cosine generator is connected to the combined first inputs of the first multiplier and. the third multiplier, and the sinus output of the sine-cosine generator is connected to the combined first inputs of the fifth multiplier and the sixth multiplier, the outputs of the fifth multiplier and the sixth multiplier are connected to the second inputs of the fourth adder and the first adder, the output of which is connected to the second through the first signal generator the input of the fourth multiplier, the output of the fourth adder through the second shaper of the sign of the signal connected to the second input of the second multiplier, the second and third inputs of f The error signal distributor is connected to the outputs of the first detector and the second detector, the output of the fourth multiplier is connected to the second input of the third adder, the second inputs of the second adder and the fifth adder are connected to the outputs of the first adder and the fourth adder, and the combined second inputs of the first multiplier and fifth mind (L knitters are the in-phase information input of the device, and the combined inputs of the third multiplier and the sixth multiplier are quadrature a device input, characterized in that, in order to increase the accuracy of the syn | synchronization of the reference oscillation; a third detector, a first comparison unit, a prohibition signal generator and a key, a seventh multiplier, a eighth multiplier, a sixth multiplier, a sixth adder, a sixth multiplier delay block and a ninth multiplier, sequentially connected tenth multiplier, the eleventh multiplier and block adders, while the inputs of the third detector and the fourth detector are connected respectively to the outputs of the first adder and the fourth adder, the second inputs of the first Lok comparator comparing the first and second blocks are respectively connected to the outputs of the first frmiro

Description

the sign pad of the signal and the second signal generator of the signal, and the output of the second block are compared to the second input of the inhibitor signal generator, the output of the error signal generator is connected to the input of the seventh multiplier and to the combined second inputs of the block of adders and the ninth multiplier, the output of which is connected via a key to the control to the sine-cosine generator input, the combined inputs of the sixth adder and tenth multiplier are connected to the output of the delay unit, the first input of the integrator is connected to the output of the ct1 block The output of the integrator is connected to the combined second inputs of the integrator, the eighth multiplier, the eleventh multiplier and block of adders, the second inputs of the seventh multiplier and the tenth multiplier being the first and second setting inputs of the device.

2. The device of Claim 1, wherein the integrator comprises a series-connected adder and a delay unit, the first and second inputs of the adder being the first and second inputs of the integrator, respectively, and the output of the support unit is the output of the integrator.

The invention relates to telecommunications and can be used in high-speed modems to provide reference oscillation synchronization.

A device for synchronizing a reference oscillation comprising a series-connected pulse generator, a comparison unit, a threshold control unit and a threshold adjustment unit, as well as a divider frequency, is known, while the other output of the comparator unit is connected via a frequency divider to other inputs of the comparison unit and the unit

control threshold, the disadvantage of the known device

/ for synchronization of the reference oscillation is low synchronization accuracy.

Closest to the proposed is an adaptive device for

synchronization of the reference oscillation

The first multiplier, the first adder, the first detector, the second adder, the second multiplier, the third sum of the Matop and the error signal conditioner connected in series the third multiplier, the fourth adder, the second detector, the fifth adder and the fourth multiplier, and the fifth multiplier, the sixth multiplier , the first

Signal shaper, second signal shaper, sine-oscillator and integrator.

with this, the cosine. output of the sine-cosine generator is connected to the combined first inputs of the first multiplier and the third multiplier, and the sinus output of the sine-cosine generator is connected to the combined first inputs of the multiplier and the sixth multiplier, the fifth multiplier outputs are connected

to the second 4 inputs of the fourth adder and the first adder, the output of which through the first signal generator is connected to the second input of the fourth multiplier, the output of the fourth accumulator through the second signal generator that is connected to the second input of the second multiplier, the second and third inputs of the error signal generator are connected respectively to

the outputs of the first detector and the second detector, the output of the fourth multiplier is connected to the second input. the third adder, the second inputs of the second adder and the p adder

connected to the outputs of the first adder and the fourth adder, the combined second inputs of the first multiplier and the fifth multiplier are the in-device information input, and the combined inputs of the third multiplier and the sixth multiplier are the quadrature information input of the device, the output of the error signal generator is connected to the combined inputs the integrator and the first limiter, to the output of which the first input of the additional integrator is connected, the second input of which through the second the limiter and the amplifier are connected to the integrator output, and the output of the additional integrator is connected to the control input of the sine-cosine generator, the integrator and the additional integrator consist of a delay unit and an adder, the output of which is connected to the corresponding adder input through the delay unit; A disadvantage of the known device for adaptive synchronization of the reference oscillation of a high-speed modem is the low synchronization accuracy. The purpose of the invention is to improve the synchronization accuracy of the reference oscillation. This goal is achieved in that the device for adaptive synchronization of the reference oscillation of a high-speed modem, containing a serially connected first multiplier, a first adder, a first detector, a second adder, a second multiplier, a third adder and an error signal conditioner, are connected in series to a third multiplier, a fourth adder, and a second detector , fifth adder and quarter multiplier, and also fifth multiplier, sixth multiplier, first shaper of the sign of the signal-, second shaper of the sign of NAL, sine-cosine generator and integrator, the cosine output of the sine-cosine generator is connected to the combined first inputs of the first multiplier and a third of its multiplier, and the sine output of the sine-cosine generator is connected to the combined first inputs of the fifth multiplier and sixth multiplier, outputs The fifth multiplier and the sixth multiplier are connected respectively to the second inputs of the fourth adder and the first adder, the output of which is connected to the second input through the first signal generator. the fourth multiplier, the output of the fourth adder through the second signal conditioner is connected to the second input of the second multiplier, the second and third error generators are connected respectively to the outputs of the first detector and the second detector, the output of the fourth multiplier is connected to the second input of the third adder , the second inputs of the second adder and the fifth adder are connected respectively to the outputs of the first adder and the fourth, the adder, and the combined second inputs of the first multiplier and the fifth The knives are the in-phase information input of the device, and the combined inputs of the third multiplier and the sixth multiplier are the quadrature information input of the device, the third detector, the first comparison unit, the inhibitor driver and the key, sequentially connected the seventh multiplier, the eighth multiplier, the sixth adder, entered in series, the delay unit and the ninth multiplier, connected in series by the tenth multiplier, eleven multiplier and block adders, while the inputs of the third the detector and the fourth detector are connected respectively to the outputs of the first adder and the fourth adder, the second inputs of the first comparison unit and the second-unit comparison unit are connected respectively to the outputs of the first signal conditioner and the second signal conditioner, and the output of the second reference unit interdiction, the output of the error signal generator is connected to the input of the seventh multiplier and to the combined second inputs of the block of adders and the ninth multiplier, the output of which Go through the key is connected to the control input of the sine-cosine generator, the combined inputs of the sixth adder and the tenth intelligent terminal are connected to the output of the delay unit; the multiplier and the block of adders, the second inputs of the seventh multiplier and the tenth multiplier being respectively the first and second setting inputs of the device. The integrator comprises a series-connected adder and a delay unit, with the first and second inputs of the adder being the first and second inputs of the integrator, respectively. 510a, the delay block vyzod is the output of the integrator. The drawing shows a structural electrical diagram of the device for adaptive synchronization of the reference oscillation of a high-speed modem. The device for adaptive synchronization of the reference oscillation of the high-speed modem contains the first multiplier 1, the fifth multiplier 2, the sixth multiplier 3, the third multiplier 4, the sine-cosine generator 5, the first adder 6, the fourth adder 7, the first detector B, the first signal shaper 9 , second adder 10, third detector 11, second detector 12, second signal generator 13, fifth adder 14, fourth detector 15, first comparison block 16, second comparison block 17, inhibitor 18, error conditioner 19, the second multiplier 20, the fourth multiplier 21, the third adder 22, the key 23, the seventh multiplier 24, the eighth multiplier 25, the sixth adder 126, delay block 27, the tenth multiplier 28, the eleventh multiplier 2 block adders 30, the integrator 31 and the ninth multiplier 34. The 3U block accumulator contains the sum of the tori 30 and 31. The integrator 31 contains the adder 32 and the delay block 33. A device for adaptive synchronization of the reference oscillation. The high frequency modem works as follows. The common-mode information input and the quadrature information input of the device for adaptive synchronization of the reference oscillation of the high-frequency modem receive (from the output of the adaptive equalizer) input signals in the form of samples that can be represented as K) (M - (H) (H) .. /...,.. J. (,. / 11. A (j. (H) (H) 5 (H) where.) And aj., (Tj) are in-phase counts

foot and quadrature components of the input signal;

(t)

- instantaneous phase of the input signal.

Signs of the signals yg (t) and Us (b): sign ygCt) and sign CON are respectively. which go to the fourth multiplier 21 and the second multiplier 20. At the output of the third adder 22, an error signal is generated. In the first multiplier 1 and the fifth multiplier 2, the signal Xg (t) is multiplied by the signals cosj (tj.) and 6lnj (t), respectively and in the third multiplier 4 and the sixth multiplier 3, the signal Xj, (t) is multiplied by the signals cozy (t) and sinf (t), respectively, which come from the cosine and sine outputs of the sine-cosine generator 5. At the same time, at the inputs of the first adder 6 and the fourth adder 7, respectively, signals are generated ((p (H) -t () - ((ic) "(4) -T (M (Py-ty in oscillations x sinLo (tj) -y (s) and (tp -. |)) the difference of the instantaneous phases O (t) - x (t) characterizes the frequency phase misalignment of the carrier and reference oscillations of the modem The first detector 8 and the second detector 12 compare the signals received respectively from the outputs of the first adder 6 and the fourth adder 7 with threshold levels, which are determined by the transmission method used in the modem. As a result, at the outputs of the first detector 8 and the second detector 12, respectively, the evaluation signals a (t.) and a. (t) are formed, which correspond to a possible reference pattern information signals, the second adder 10, and a fifth adder 14, respectively, error signals vyrabatshayut 5 (B y.s (4) (4) ec (h). -), which are the differences between the output signals of the first adder g of the fourth adder 7 and the signal „„ (estimation of the ASC)) and). In accordance with the used sign algorithm in the first sign maker of the signal 9 and second, the signer of the sign of the signal 13 is defined by the MHl sl fch M-ecl l - sl l

which determines the phase error Φ (t) - yCtp mead by the carrier oscillation of the input signal and the reference oscillation, but at the same time depends on the amplitude of the information symbols of the input signal.

In the error signal generator 19, the error signal E (t) E is generated, which comes from the output of the third adder 22, by multiplying the error signal (s) by the coefficients 0.08; 0.22; 0.11; 1 depending on the amplitude value of the informative symbol 15: 4, 3, 2; 3 or 1 input signal. At the same time, at the output of the error signal generator 19, an error signal 6 (t) is generated, independent of the information symbols and, therefore, accurately characterizing the phase error between the carrier oscillation of the input signal and the reference oscillation. From the output of the error signal generator 19, the error signal is fed to the input of the adaptive filter containing the seventh multiplier 24, the eighth multiplier 25, the sixth adder 26, the delay block 27, the tenth multiplier 28, the eleventh multiplier 29, the adder block 30, the integrator 31 and the ninth multiplier 34. The seventh multiplier 24, the eighth multiplier 25, the sixth adder 26 and the delay block 27 implement the error signal conversion algorithm ® (t) k (t) k (t) (t) O (t) where k (t) and k { t) are the transfer coefficients of the adaptive filter, respectively, for t and the times; c, is a constant signal arriving at the first installation input of the device for adaptive synchronization of the reference oscillation of the high-speed modem, f 0.1. The signal C (t) is generated by the tenth multiplier 28, the eleventh multiplier 29, the block of adders 30 and the integrator 31 in accordance with the HH algorithm.))) | C (). where the constant signal arriving at the second setup input of the device for adaptive synchronization

10993998

reference oscillation high-speed modem, "f 0.3.

The initial value of the signal C (t,) is zero.,

In the ninth multiplier 34, the error signal 6 (t) is multiplied by the transmission coefficient of the adaptive filter k (t) and the resulting signal is fed through the switch 23 to the control input of the sine-cosine generator to adjust the phase of the reference oscillation. At the initial stage of communication, the transfer coefficient k (t) has a large value. In this case, the synchronism band is large and a fast signal acquisition is achieved. Over time, the magnitude of phase error 0 (tj) decreases, which leads to a decrease in the transmission coefficient k (tj), thereby achieving an adaptive adjustment of the transmission coefficient k (t,) and, consequently, the synchronization band of the reference oscillation when the input signal is distorted communication channel. In the third 11 and fourth 15 detectors, the signals EEC) and yj. (T.) (From the outputs of the first adder 6 and the fourth adder 7) are compared with the threshold levels (+1; -1) corresponding to the minimum amplitudes of the information symbols. In particular, if ys (t-)) and less than the established threshold levels, then at the outputs of the third 11 and fourth 15 detectors, output signals are generated, which are fed respectively to the inputs of the first comparison unit 16 and the second comparison unit 17, to the other inputs the output signals of the first signal generator of the signal 9 and the second signal generator of the signal 13. If the output signals of the third detector 11 and the fourth detector 15 do not coincide, respectively, with the output signals of the first signal generator of the signal 9 and the second the sign maker of the signal 13; then, at the outputs of the first comparison unit 16 and the second comparison unit 17, signals are generated that control the key 23 (turn it off) through the inhibitor signal generator 18. At the same time, it is prohibited to adjust the sine-cosine generator 5 in the case of small values of input signal levels at which there is a greater likelihood of interference from the communication channel. Thus, by introducing, adapting the transmission coefficient filterAr .f

R

J / 9399tora, which forms the control signal of the siaus-cosine generator 5, and eliminates false shifts of the sine-cosine generator 5, more j is achieved. High synchronization accuracy of the reference oscillation.

Claims (2)

1. A DEVICE FOR ADAPTIVE SYNCHRONIZATION OF A HIGH SPEED MODEM RADIATION VIBRATION, comprising a first multiplier, a first adder, a first detector, a second adder, a second multiplier, a third adder and an error signal shaper, a third multiplier, a fourth adder, a second detector, a second detector, a sequentially connected a fourth multiplier, as well as a fifth multiplier, a sixth multiplier, a first signal conditioner, a second signal conditioner, a sine-cosine generator and an int a generator, while the cosine output of the sine-cosine generator is connected to the combined first inputs of the first multiplier and the third multiplier, and the sine output of the sine-cosine generator is connected to the combined first inputs of the fifth multiplier and sixth multiplier, the outputs of the fifth multiplier and sixth multiplier are connected to the second the inputs of the fourth adder and the first adder, the output of which through the first driver of the sign of the signal is connected to the second input of the fourth multiplier, the output of the fourth the adder through the second signal signifier is connected to the second input of the second multiplier, the second and third inputs of the error signal former are connected to the outputs of the first detector and the second detector, the output of the fourth multiplier is connected to the second input of the third adder, the second inputs of the second adder and fifth adder are connected respectively to the outputs of the first adder and the fourth adder, and the combined second $ q inputs of the first multiplier and the fifth intelligence of the scissor are in-phase information m is the input of the device, and the combined inputs of the third multiplier and the sixth multiplier are the quadrature information input of the device, characterized in that, in order to improve the accuracy of synchronization of the reference oscillation, a third detector, a first comparison unit, a forbidden signal generator and a key are introduced in series the seventh multiplier connected in series, the eighth multiplier, the sixth adder, the delay unit and the ninth multiplier, the tenth multiplier connected in series, the eleventh multiply l and the adder block, while the inputs of the third detector and the fourth detector are connected respectively to the outputs of the first adder and the fourth adder, the second inputs of the first comparison unit and the second comparison unit are connected respectively to the outputs of the first signal generator and the second signal generator, and the output of the second comparison unit is connected to the second input of the inhibit signal generator, the output of the error signal former is connected to the input of the seventh multiplier and to the combined second inputs of the block matters and the ninth multiplier, the output of which is connected through a key to the control input of the sine-cosine generator, the combined inputs of the sixth adder and the tenth multiplier are connected to the output of the delay unit, the first input of the integrator is connected to the output of the adder block, and the output of the integrator is connected to the combined second inputs of integrators , the eighth multiplier • la, the eleventh multiplier and the adder block, and the second inputs of the seventh multiplier and the tenth multiplier are the first and second installation, respectively and inputs. 2. The device according to claim 1, wherein the integrator contains a series-connected adder and a delay unit, while the first and second inputs of the adder are respectively the first and second inputs of the integrator, and the output of the delay unit is the output of the integrator.