SU1068963A1 - Shaft rotation angle encoder - Google Patents

Abstract

SHAFT CORNER ANGLE CONVERTER, containing a power supply source connected to the primary winding of the selsyn, the reference inputs of the sectant code and phase inverter, the secondary windings of the selsyn are connected to the inputs of the switch and the other inputs, the sectant forwarded to the control panel inputs has been connected. and the other output to the control input of the phase inverter, the output of which is connected to the input of the first comparator, the output of which is connected to the zero input of the primary / flip-flop, is a single output which is connected to the first input of the first element And, to the second input of which the output of the pulse generator is connected, the switch output is connected to the input of the first full-wave rectifier whose output is connected to the first input of the analog memory element and through the peak detector to the single input of the second trigger, the output of which connected to the second input of an analog memory element, the output of which is connected to the first input of the second comparator, the phase inverter output is also connected via the second full-wave rectifier A second to the second comparator input, and a counter, characterized in that, in order to increase the speed of the converter, a third trigger, an OR element, three AND elements are entered into it, the first inputs of the second g and the third elements AND are connected to the output of the second comparator , and the second inputs - respectively to the zero and single outputs of the third trigger, the single input of which is connected to the output of the first comparator, and the zero input - to the output of the third And element, which is connected to the zero input of the second trigger, the output of the second element I is connected to a single input of the first trigger, X is a single output of the third trigger φ to the first input of the fourth element I, the second input of which is connected to the output of the pulse generator, and the output of the fourth element I to the first input of the element OR, the second input of which is connected to the output of the first element And the output of the element OR is connected to the counting input of the counter.

Description

The invention relates to automation and computing and can be used in information measurement systems for communicating analog sources of information with microprocessors and micro computers. A device containing a selsyn is known, the primary winding of which is connected to a voltage source of a footstep, and the secondary windings to a switch, the output of which is connected to the input of a peak detector directly and through an analog memory element with the first input of the first comparator, a block of coarse counting inputs which are connected to the secondary windings of the selsyn and the power supply source, and the outputs with the control inputs of the switch inputs of the senior bits of the meter and the control input of the phase inverter through which the source The supply voltage is connected to the second input of the first comparator and the input, the second comparator, the first trigger, whose inputs are connected to the outputs of both comparators, and the output to the control input of the key, the oscillator, the output of which through the switch is connected to the counter input, the second trigger the inputs of which are connected to the outputs of the pickup detector and the first comparator, and the output to the control input of the analog memory element L The disadvantage of this device is the low speed due to the fact that boiling frequency may deprotection of only one reference rotation angle. The closest to the invention to the technical essence is a shaft rotation angle converter into a code containing selsyn, the primary winding of which is connected to a voltage supply source, and the secondary windings - to the inputs of a com-, mutator, a sectarian code driver, the inputs of which are connected to the secondary windings power supply and the power supply source, and the outputs - with the control inputs of the switch and the first comparator through a phase inverter, the second input of which is connected to the power supply voltage source and peak detector, output which is connected to the unit input of the first trigger, the unit output of which is connected to the control input of the analog memory element, the output of which is connected to one of the inputs of the second comparator, the output of which is connected to the zero input of the first trigger and the unit input of the second trigger, zero input of which connected to the output of the first comparator, and the output to the control input of the element I, the other input of which is connected to the output of the pulse generator, and the output to the counting input of the counter, the input of the rectifier connected to the output the switch and the output to the inputs of the peak detector and the analog memory element, the rectifier input is connected to the phase inverter output, and the output is connected to another input of the second comparator t21. The disadvantage of this device is the low speed due to the fact that during the period of the voltage of the carrier frequency only two readings of the angle of rotation are possible. The aim of the invention is to improve the speed of the device. The goal is achieved by the fact that in the converter of the shaft rotation angle into the code containing the power supply source connected to the primary winding of the selsyn, the reference inputs of the sectant code and phase inverter, the secondary windings of the selsyn are connected to the inputs of the switch and other inputs of the sectant code generator, one output which is connected to the control inputs of the switch, and the other output to the control input of the phase inverter, the output of which is connected to the input of the first comparator, the output of which is connected to zero The first input of the first trigger, the unit output of which is connected to the first input of the first element I, to the second input of which the output of the pulse generator is connected, the output of the switch is connected to the input of the first full-wave rectifier whose output is connected to the first input of the analog memory element and through a peak detector to unit input of the second trigger, the output of which is connected to the second input of the analog memory element, the output of which is connected to the first input of the second comparator, the phase inverter output is also connected Through the second full-wave rectifier to the second input of the second comparator, and the counter, the third trigger, the SLI element, three AND elements are entered, the first inputs of the second and third AND elements are connected to the output of the second comparator, and the second inputs are respectively to the zero and single outputs of the third trigger, a single input of which is connected to the output of the first comparator, and zero to the output of the third element And, which is connected to the zero input of the second trigger, the output of the second element And connected to the single input of the first trigger

the unit output of the third trigger to the first input of the fourth element I, the second input of which is connected to the output of the pulse generator, and the output of the fourth element I to the first input of the element OR, the second input of which is connected to the output of the first element AND, the output of the element OR connected to the counter input of the counter .

The essence of the invention is that the analog memory element captures and stores the maximum value of the output voltage of the selsyn for a time equal to J-4-At, where T is the period of voltage of the selsyn, - is the time interval proportional to the angle of rotation of the shaft. This allows for a half-period of the supply voltage to be two time intervals of duration u.i. and by converting these intervals into a code to remove the two readings of the angle of rotation, which doubles the speed of performance in comparison with the known device.

FIG. 1 shows a converter block diagram; in fig. 2 time diagrams of his work.

  The device contains a power supply source 1 connected to the generator inputs 2 of the sectarian code and a phase inverter 3, selsyn 4, the primary winding of which is connected to the supply voltage source 1, and the secondary windings to the inputs of the switch 5 and to the other inputs of the generator 2 of the sectarian code one outputs of which are connected to the control inputs of switch 5, and another output - to the control input of phase inverter 3, the output of which is connected to the input of the first comparator 6, a full-wave rectifier 7, whose input is connected to the output the switch 5, and the output to the first input of the analogue memory element 8 and to the input of the peak detector 9, the output of which is connected to the single input (S) of the trigger 10, the single output (Q) of which is connected to the second input of the element 8 analog memory output which is connected to the first input of the second comparator 11, whose second input through the full-wave rectifier 12 is connected to the output of the phase inverter 3, the trigger 13, the zero input (R) of which is connected to the output of the first comparator, and the single output (Q) to the first input of the And element 14, the second entrance koto oh is connected to the output of the generator 15 pulses, and the output through the element OR 16 is connected to the input of counter 1 trigger 18, the single input (S) of which is connected to the output of the first comparator 6, and the single output (Q) to the first input of the element 19, second the input of which is connected to the output of the second comparator 11, and the output to the zero inputs (R) of the trigger 10 and 18, the element 20, the inputs of which are connected to the output of the second comparator 11 and the zero output (5) of the trigger 18, and the output to the single input ( S) the trigger 13, and the element And 21, the input of which is connected to the output of the generator 15 pulse and a trigger output unit 18, and an output - to an input of OR gate 16.

The device works as follows.

Output voltages UK, Uj, 1) 5 selsyns 4 are fed to switch 5 and shaper 2 of the sectarian code, which, depending on the enaka of the phase of these voltages relative to the voltage U of the power supply of source 1, forms the code N of a rough reading of the angle of rotation of the selsyn , varying with discreteness А-в-з т-60 where п О, 1,2, ..., 5. This code is entered into the stature of the counter 17. The shaper 2 of the sectarian code generates control signals for the switch 5, by which one of the output voltage of the selsyne Uj, where t 1,2,3, is selected, depending on the number of the sectarian: 1 and 4th sectarians Os Schg in 2nd and 5th Ui. Oz, in the 3rd and 6th, Shaper 2 of the sectarian code generates a control signal of the phase inverter 3, which, depending on the parity of the sectarian, either inverts the supply voltage lUp or transfers it to the inputs of the comparator 6 and the full-wave rectifier 12 without changing the polarity since in order to provide the required conversion algorithm in this device, it is necessary that in any sectarian the condition of the synphasicity of the voltages Uu and u be satisfied.

I ..

Full-Wave Rectifiers 7

to 12, they perform the function of forming the voltage modules and IU |, 1, respectively, where U is the voltage on the Emokhod phase inverter.

In the time interval (Fig. 2 x; element 8 of the analog memory works in the mode of tracking the change in the current value of the voltage lUi, l. At time H; l, the corresponding maximum value 1 Dim 1 of the voltage iuCit Hr. 2o.) peak detector 9, the pulse from the output of which (Lig. 2cH sets trigger 10 into one state (Fig. 26) and puts element 8 of the analog memory into voltage storage mode Ui, (which, taking into account the relatively short storage time, remains in the range of H.d - i, it is almost constant (Fig. 2a).

At the point in time when the stresses 1Au1 and lUft I are equal. 2) the comparator 11 is triggered and the pulse from its output (Fig. 22 :), having passed through the element H 20 (Fig.), Sets the trigger 13 to one state (Fig. 2e).

The raering potential from the output of the flip-flop 13 enters the control input of the AND 14 element, permits the arrival of the counting pulses of the generator 15 through the elements AND 14 and RL 16 to the counting input of the counter 17 (Fig. 2t).

At the moment of time -tj, the correspondences to the voltage transition Ui, through zero in any direction ((from positive to negative) or vice versa, the KONmaprator 6 is triggered, the output pulse: (Fig. 2b returns trigger 13 to its initial zero position (Fig. 2e). The inhibitory potential arrives at the input of the element 14 and the flow of the counting pulses of the generator 15 to the counter 17 is stopped (Fig. 2). The trigger 18 is set to one (Fig. 2, u, v :.). the potential from the output Q of flip-flop 18 (FIG. 2 and) is applied to one input of the element And 21, permits the passage of the counting km of the generator 15 through the elements And 21 and

OR 16 to the counting input of the counter 17 (Fig. 2n). ...

At time i;,. tension lUnl are equal (but now in the next quarter of the carrier frequency period)), the comparator 11 triggers again, the impulse from whose output (Fig. 2d) passes through AND 19 (Fig. 2mX returns the trigger 18 to the initial zero state (Fig. 2c), the resolving potential from the control input of the And 21 element is removed and the flow of the counting pulses of the generator 15 to the counter 17 through the element And 21 stops (Fig. 2k). Trigger 10 returns to the initial zero state (Fig. 2 &), again switching element 8 of the analog memory into tracking mode.

Thus, over the half-period of the voltage carrier frequency (time interval ij, fig. 2, cx), the converter has formed two readings of the rotation angle / in - in digital form (Fig. 2, l; 3; the next half of the period, - time interval -fes C) device star works in a similar sequence. Thus, during the period of the voltage of the carrier frequency, four counts of the angle of rotation are formed, which is twice as large as in the known device.

but

jffliira

Well

Jl

Jj

2

nt

.t

Jl

-

JfflilUl

Claims (1)

SHAFT TURN ANGLE CONVERTER TO CODE, containing a power supply source connected to the primary selsyn winding, reference inputs of the sectarian code shaper and phase inverter, second selsyn windings connected to the switch inputs and other inputs, sectarian shaper, one of which outputs are connected to the control inputs of the switch, and another output to the control input of the bass reflex, the output of which is connected to the input of the first comparator, the output of which is connected to the zero input of the first trigger, a single output to of which is connected to the first input of the first element And, to the second input of which the output of the pulse generator is connected, the output of the switch is connected to the input of the first half-wave rectifier, the output of which is connected to the first input of the analog memory element and through the peak detector to the single input of the second trigger, the output of which connected to the second input of the analog memory element, the output of which is connected to the first input of the second comparator, the output of the phase inverter is also connected through the second half-wave rectifier to to the second input of the second comparator, and a counter, characterized in that, in order to increase the speed of the converter, a third trigger, an OR element, three AND elements are introduced into it, the first inputs of the second ^ and third AND elements connected to the output of the second comparator, and the second inputs - respectively, to the zero and single outputs of the third trigger, the single input of which is connected to the output of the first comparator, and the zero - with the output of the third element And, which is connected to the zero input of the second trigger, the output of the second element And is connected is connected to the single input of the first trigger, the single output of the third trigger is to the first input of the fourth AND element, the second input of which is connected to the output of the pulse generator, and the output of the fourth AND element is to the first input of the OR element, the second input of which is connected to the output of the first AND element, output The OR element is connected to the counting input of the counter.