SU1066004A1 - Method and device for converting a.c. voltage to d.c. voltage - Google Patents

Abstract

1. A method of converting a variable voltage into a constant, in which the initial voltage is integrated from the beginning of the first half periods and from the beginning of the second half periods and the second integral voltage you read from the first, so that In order to increase accuracy, the initial voltage is also integrated from the beginning of the third and from the beginning of the fourth half-periods, the first integral voltage is set equal to zero on the third and fourth half-periods, the second in the first and fourth, the third in the first and second, the fourth - in volts - Q ryh and third half-cycles, and third integral voltage is folded with the first and chetvertre subtracted therefrom.

Description

2. A method according to claim 4, characterized in that the initial voltage is inverted, the second and fourth voltages are obtained by integrating the inverted voltage, and all integrated voltages are added.

3. Method according to paragraphs. 1 and 2, they are also distinguished by the fact that they additionally compare the duration of the pause in the initial voltage with the specified time and set the integral voltages equal to zero if the pause exceeds the specified time.

4. A device for converting alternating voltage into a constant, containing the first comparator and two integrators, the input of the first of which is connected to the input of the first comparator and forms the input output, two key elements, integrator storage capacitors, a surmatcher, made for example at the operating an amplifier whose output forms an output output, and integrator outputs connected to the inputs, characterized in that, in order to improve the accuracy, an inverter is inputted, the input of which is connected to the input output the second comparator, the third and fourth integrators, the outputs of which are connected to the corresponding inputs of the adder, the third and fourth key elements shunting the storage capacitors of the respective integrators, and two T-flip-flops connected by the inputs to the outputs of the comparators, the inputs of the second comparator, the second and fourth integrators connected to the output of the inverter, the input of the third integrator is connected to the input output, the direct and inverse outputs of the first and second T-flip-flops are connected to the control inputs, respectively the second, fourth, first and third key element.

5. The device according to claim 4, about tl and. h, to shche so that in him; an element of time is introduced whose input (OR through the logical element OR NOT is connected to the outputs of the comparators, and the output through the elements OR to the control inputs of the key elements.

The invention relates to electrical engineering, in particular, to converter technology, and can be used in devices that react to the average value of a voltage, as well as to measure variable values without a constant component.

A known method of converting alternating voltage into a constant, in which the initial alternating voltage leads to the desired level by dividing or amplifying, forms its modulus and suppresses the pulsations l.

The disadvantage of this method is that the high quality of the output voltage, which has an increased level of ripple, is not achieved.

The closest in technical terms to the present invention is a method of converting alternating voltage into a constant one in which the initial voltage is integrated from the beginning of the first half-lives and from the beginning of the second half-periods, and the second integral is obtained from the first zQ.

The disadvantage of this method is that the first integration

Rated voltage should be set to zero at the beginning of the first half periods, and the second at the beginning of the second half periods. For installation

a certain time is required for zero, during which integration cannot be performed, therefore, the methodological inherent error is inherent in reducing the accuracy of pre-formation.

The known method is implemented by a device containing a comparator, two integrators, two key elements,

at the beginning of the half-periods, the corresponding accumulator capacitors of the integrators are shunted, and the adder on the operational amplifier.

The disadvantage of this device is that the key elements, which are closed at the beginning of the half-periods, prevent the integrators from coming into action in time, which introduces bogging to the level of the output voltage.

The purpose of the invention is to improve the accuracy of converting variable stress to constant.

The goal is achieved by the fact that

alternating voltage into a constant, in which the initial voltage of the integral pHpyjoT from the beginning of the first half periods and from the beginning of the second half periods and the second integrated voltage are subtracted from the first, the initial voltage is also integrated from the beginning of the third and from the beginning of the fourth half periods, the first integrated voltage set to zero on the third and fourth half periods, the second on the first and fourth, the third on the first and second, the fourth one on the second and third half-periods, and the third integral voltage is added to the first, and Fourth subtracted from it. In addition, the initial voltage is inverted, the second and fourth voltages are obtained by integrating the inverted voltage, and all the integrated voltages are added. In addition, the duration of the pause in the initial voltage is compared with the specified time and set all four integral “AP xeni equal to zero if the pause exceeds the specified time. The method can be carried out by a device containing a first comparator and two integrators, the input of the first of which is connected to the input of the first comparator and forms an input output, two key elements that allow integrators to store the capacitors, an adder, performed, for example, on an operational amplifier whose output forms the output output, and the inputs are connected to the outputs of the integrators, the inverter, whose input is connected to the input output, the second comparator, the third l and the fourth integrators, the outputs of which are connected to the third and fourth key elements that shunt the storage capacitors of the respective integrators, and two G-triggers connected by inputs to the jjoMnapaTOpOB outputs, the inputs of the second comparator, the second and fourth integrators are connected to the inverter, the input of the third integrator is connected to the input terminal, the direct and inverse outputs of the first and second T-flip-flops are connected to the control to the clock, respectively, of the second, fourth, first and third clamping element. I. To ensure a return when the source voltage is turned off, a time element can be entered into the device, the input of which "through a logical element OR NOT is connected to the outputs of the comparators and the output of the element OR to the control inputs of the key elements. FIG. 1 is a circuit diagram of a converter; in fig. 2 is the same, the part intended for return / in FIG. 3 - curves, according to the essence of the method; in fig. 4 timing diagrams of the converter. The converter (Fig. 1) contains an inverter 1, a comparator 2 and 3, the first of which is connected to the input terminal of the converter (Input), and the second to the output of the inverter 1, T-flip-flops 4 and 5, connected to different comparators, integrators. 6-9, of which the first and third are connected to the input of the converter, and the second and fourth to the output of the inverter 1, the key elements 10-13, bypassing accumulator capacitors 14-17 of the integrators, and the adder 18, the inputs of which are connected to the outputs of the integrators . Key elements 10-13 are made manageable. The control inputs of the first and third key elements 10-12 are connected to the direct outputs of the 4 and 5 triggers, and the second and fourth elements 11 and 13 to the inverse outputs. In the required cases x, a time element 20 is connected to comparators 2 and 3 via a logical element OR NOT 19 (Fig. 2) and all key elements 10–13 are connected to triggers 4 and 5 through elements. OR, for example, between the direct output of the trigger 5 and the control input of the key element 10, the element OR 21 is switched on, and the second inputs of the elements OR are connected to the output of the time element 2E. FIG. 3 and 4 displays / graphs of the following quantities: 22 - initial (input) voltage 23-26 - four integral voltages J 27 output voltage} 28 - comparator signal 2, 29 - comparator signal 3J 30 - signal of direct output of the trigger 4, 31 - signal of the direct output of the trigger 5i 32-35 - switching diagram of the key elements 10-13. . The interveners corresponding to the open state of the keys are ignored (Fig. 4 K. The method of converting an alternating voltage to a constant value is that the initial voltage is integrated, starting at different intervals: first, second, third and fourth, as well the integral voltages are set equal to zero at the respective intervals, four voltages are obtained, lagging one after another, one half period, then the first and third are added, and the second and fourth are subtracted from them. After one half period (Fig. 3), t is a constant void voltage 27, the level of which is proportional to the average value of the initial voltage, and the shape of the latter does not play any role here.

If the initial voltage 22 is also inverted, then the voltages 24 and 26 are obtained by integrating the inverted voltage, then all four integrated voltages together add a constant voltage of 27.

The device, the implementation of the described method, (Fig. 1) works as follows.

The half-wave signals 28 and 29 (Fig. 4), generated by comparators 2 and 3, are fed to T-flip-flops 4 and 5, which perform the function of dividing the frequency by two. The output signals 30 and 31 of the flip-flops 4 and 5, supplemented by their inversions, coincide in duration with the periods of the initial voltage composed of different combinations of half-periods. .

Triggers unpai key elements 10–13, which, in turn, periodically shunt capacitors 14–17, with the result that the output voltages 23–26 of integrators 6–9 are set to zero over periods that are biased relative to each other. Depending on the initial state of the T-flip-flops 3 and 4, the sequence of operation of the key elements 10-13 may be different, but this means only that in diagrams 32-35 and 23-26 the individual graphs are swapped, which does not affect the resulting diagram. 27.

In the proposed transducer, key elements 10–13 periodically lock in on the target for a period. This time is more than enough for a full range of capacitors 14-17, the charge of which always starts from the zero level, and exactly at the beginning of the corresponding half-periods.

Additional units perform the following function (Fig. 2).

If the initial voltage is zero, the signals at the outputs of Comparators 2 and 3 also have a zero level. Respectively at the exit

of the OR-NOT 19 logic element, a high level signal appears, which triggers the time element 20, which, counting the set time, will trigger and, through the OR element 21, will give a control signal to the short circuit of the key element 10, and through three other OR elements (not shown) - on the closure of the remaining key eleeity 11-13. As a result, the occurrence of voltage across the device at the zero level of the source voltage is reliably prevented. When the level of the initial voltage rises, one of the comparators 2 or 3, by acting with the signal on the element OR NOT 19, removes the signal from the input of the element. time 20, which immediately returns, and since the signal from trigger 5 does not arrive at the element OR 21, the control signal will be removed from the key element 10, i.e., the key element opens, allowing the integrator 6 to process the original voltage. If there are pauses in it, then they cannot cause the closure of the key elements 10-13, since they are not long enough to trigger the time element 21.

Inverter, comparators, integrators, and adder can be performed on operational amplifiers.

The above method, implemented by the described device, is free from methodical error. Choosing comparators thresholds of incomparably smaller amplitudes of the initial voltage, i.e. using them in the zero display mode, it is possible to achieve that the integration covers the entire voltage period. Unlike the prototype, the keys discharging a capacitor do not create conversion errors with their operation. Thus, an increase in accuracy is achieved.

gz

Claims (5)

1. A method of converting an alternating voltage to direct voltage, ¹ in which the initial voltage is integrated from the beginning of the first half-periods and from the beginning of the second half-periods and the second integral voltage is subtracted from the first one, so that, in order to improve accuracy, the initial voltage is also integrated from the beginning of the third and from the beginning of the fourth half-cycles, the first integral voltage is set to zero in the third and fourth half-periods, the second in the first and fourth, the third - in the first and second, the fourth - in the second and t The third half-periods and the third integral voltage are added to the first, and the fourth is subtracted from it. , ______. SU ,,,. 1066004 G r  one f T r ¹ 2. The method according to claim D, in that the initial voltage is inverted, the second and fourth voltages are obtained by integrating the inverted voltage, and all the integral voltages are added up. 3. The method according to PP. 1 and 2, they also distinguish themselves by the fact that they additionally compare the duration of a pause in the initial voltage with a given time and set the integral voltages to zero if the pause exceeds a predetermined time. 4. A device for converting AC voltage to DC, containing the first comparator and two integrators, the input of the first of which is connected to the input of the first comparator and forms the input output, two key elements shunting the storage capacitors of the integrators, the adder, made, for example, on an operational amplifier, the output of which forms the output output, and the integrator outputs are connected to the inputs, characterized in that, in order to increase accuracy, an inverter is introduced, the input of which is connected to the input output, the second comparator, the third and fourth integrators, the outputs of which are connected to the corresponding inputs of the adder, the third and fourth key elements shunting the storage capacitors of the corresponding integrators, and two T-flip-flops connected by the inputs to the outputs of the comparators, the inputs of the second comparator, the second and fourth integrators are connected to the inverter output, the input of the third integrator is connected to the input output, the direct and inverse outputs of the first and second T-flip-flops are connected to the control inputs of the second, respectively the fourth, first and third key element. 5. The device according to claim 4, the clause is that it includes _: a time element is introduced, the input of which is connected OR to the outputs of the comparators through a logic element, and the output is connected through the OR elements to control inputs of key elements.