SU1065822A1 - Time interval digital meter - Google Patents

Description

power supply, the third output is connected with the second inputs of the first and second frequency dividers, the second and third additional counters, the third input of the first additional counter and the second input of the conversion counter, the fourth output of the block

control is connected to the third input of the second frequency divider, the output of the power source of the digital-to-analog converter under study is connected to the second input of the latter, and the output of the reference level source is connected to the second input of the adder.

The invention relates to a pulse technique and can be used to measure the setup time of digital-to-analog converters. Known time interval gauges are based on the sequential counting method and contain a series connected counting pulse generator, an And circuit and a counter, the second output of the And circuit is connected to the trigger output, the inputs of which are connected to the Stop and Start input buses of the meter f The disadvantage of the known meter low measurement accuracy of short time intervals. The most sophisticated approach to the present invention is a digital time meter between the edges of periodically repeating pulses, containing serially connected counting pulse generator, element I, counting counter and output counter, with the second input of element AND connected to the output of the trigger connected to the Start buses and Stop meter., and bus Stop is additionally connected to the input of the averaging counter on), the output of which is connected to the third input of the element I, the second output of the averaging counter over the N link An G input of the zeroing circuit, the output of which is connected to the second and the inputs of the counting counter and the output counter, the digital-to-analog converter 2j under study. The disadvantage of this meter is that it measures the time intervals between the pulse fronts and thus does not allow changing the reference levels of the end (stop) of the time interval. This leads to a large error in measuring the time of establishing a digital-to-analog converter. The time to establish digital-to-analog converters is measured between a level corresponding to half the pulse amplitude and a certain output signal level small in a digital-to-analog converter, for example, differing from the set value by half the least significant bit. Consequently, the known meter will turn on the measurement reading (start) at the right time, and turn off the measurement (stop) of the time interval when the front of the output pulse occurs, which will lead to a significant measurement error, i.e. the delay time will be measured, and at the time the D / A converter is established. The purpose of the invention is to increase the measurement accuracy and expand the functionality of the meter. The goal is achieved by the fact that a digital time interval meter containing a series-connected counting pulse generator, an AND element, a conversion counter and an output counter, the second input of the AND element is connected to the trigger output, the first input of which is connected to the first input of the averaging counter over N measurements, the KOTOjxjro output is connected to the third input of the AND element, the second inputs of the counting counter and you 5: one counter connected to each other, as well as the digital-to-analog converter under study, is equipped with two cases two frequency elements, a multivibrator standby, two additional AND elements, a NOT element, three additional counters, a switch, a digital-to-analog converter, an adder, a control unit, power sources of the digital-to-analog converter and reference level under study, a reference block, a Start pulse shaper, and a trigger generator, output which is connected to the first inputs of the first and second frequency dividers, the output of the first divider is connected to the input of the forivertor of the Start pulse, the first input do the studied digital-analog converter, the output of which is connected to the first input of the comparison unit, the second input of which through the adder is connected to the output of the digital-analog converter, the output is connected to the first input of the first additional element AND, the input of the element NOT and the first input of the trigger, the second input of which is connected to the output of the transformer pulse Start, while the output of the second frequency divider is connected to the second input of the first and the first input of the second additional elements And, through the waiting multivibrator, The third and third inputs are combined and connected to the first output of the control unit, the first input of the switch, the second input of the averaging counter over N dimensions and the input of the reference level source, the third input of the second additional element I is connected to the output of the element H and its output is connected to the first the inputs of the first and second additional counters, the second input of the first additional counter is connected with the output of the first additional element I and the first input of the third additional counter, and its output is connected with the second one the switch stroke, the third input of which is connected to the output of the third additional counter, and the output connected to the input of the digital-analogue conversion of the body, the output of the second additional counter is connected to the first input of the control unit, the second input of which is connected to the output of the averaging counter by N measurements, the second output the control unit is connected to the input of the power source, the third output with the second inputs of the first and second frequency dividers, the second and third additional counters the third input of the first additional account ika and the second input conversion counter, the fourth output coupled to the control unit A third input of the second frequency divider, a power supply output issleduemog DAC with a second input of the connections with the latter, and an output reference level source connected to the second input of the adder. Figure 1 shows the structural diagram of the proposed device; figure 2 - timing diagrams at the outputs of the main blocks. The device consists of a generator 1 (Fig. 1) of counting pulses, first and second dividers 2 and 3 frequencies, a digital-to-analog converter 4 under study, a unit 5 for comparing the start 6 generator of a pulse, a counter 7 for averaging over N measurements, a counter 8 for conversion, an output of the counter 9, additional counters 10-12, trigger 13, elements 14-16, control unit 17 of the generator 18 triggering pulses of the adder 19, source 20 of the reference level of the source 21-power supply of the digital-analog converter, switch 22, digital-analogue o conversion the receiver 23, the waiting multivibrator 24. and the element NOT 25. The device operates as follows. After connecting the digital-to-analog converter 4 being connected and the arrival of the measurement start pulse, the control unit 17 produces a voltage at its second output (Fig. 2a) supplied to the power source 21, which in turn connects the supply voltage to the digital analog converter 4 under study. The control unit 17 generates a pulse at the third output (Fig. 26), nullifying the recalculation counter 8, output counter 9 and counters 10-12, and also generates a control voltage at the first output (Fig. 2c) to turn off the reference level source 20 that turns off and resetting the averaging counter 7 over W out of operation, including elements 15 and 16, as well as the switch 22 so that the code outputs of the counter 10 are connected to its outputs. At the fourth output, the control unit 17. generates a pulse, 3 pre-divider Toty the selected operator-position. At the output of the counter 7, there is no control voltage covering the element AND 14. With these switches, the previous measurement is reset and the reference stop mode is activated, corresponding to the end of the measurement time. . The process of setting the reference level Stop is as follows. Pulse generator 1 is countable .; pulses are divided by frequency in the first divider 2 frequencies and the output pulse of divider -2 frequencies turns off the digital-to-analog converter 4 being investigated. Therefore, the output..the voltage of the digital-to-analog converter 4 under study varies from maximum to minimum value (Fig. 2e). The signal of the generator 1, in addition, is fed to the second frequency divider 3, having the same division factor as the frequency divider 2. The pulse at the output of the splitter 3 frequency is delayed with respect to the pulse at the output of the splitter 2 frequency for m periods of the frequency of the generator 1 counting pulses. The value of m is determined by the operator by presetting the second divider 3 frequencies. The value of.f77 can be chosen by the operator from 0 to H, where I is the division ratio of dividers 2 and 3 frequencies, and thereby change the time delay of the pulse at the output of divider 3 frequencies from O to i:, where I, is the repetition period counting pulses. The pulses from the output of the second divider 3 are fed to the waiting multivibrator 2. A short pulse from the output of the multivibrator standby is sent to the inputs of the And 15 and 16 elements. At the output of the And 15 element, the pulse is observed only then, at this moment from The third input of this element is the resolution voltage. Comparison unit 5 is connected in such a way that when the output voltage of the digital-to-analog converter 4 under study is less than the output voltage of the digital-to-analog converter 23, it generates a control voltage. Consequently, at the moment corresponding to the level of reference, Stbp element And 15 is open and an impulse appears at its output. This pulse goes to counters 10 and 11. The changed output code of the counter 10 passes through the switch 22 and enters the digital-to-analog converter 23. The changed code of the counter 10 changes the output voltage of the converter 23, which through the adder 19 is fed to the comparison unit 5. This is repeated until the comparison of the voltages of digital-to-analog converters 4 and 23 occurs. In this case, the element 15 is closed, the element 16 connected to the output of the comparison unit 5, after the element 25 does not open. Consequently, the pulse of the standby multivibrator 24 will pass through the element AND 16 and enter the input of the counter 12 and enter the zeroing of the counter 10. The process of measuring the reference level will be repeated M times, where M is the capacity of the counter 12. After M measuring the output pulse counter 12 (Fig. 2d) is fed to the first input of block 17; “. management At the same time, the first output of the control unit 17 (Fig. 2c) turns off the control voltage, turns on the source of the reference level 20, counters 7 averaging over N, turns off And 15 and 16 elements, and switches 22 in such a way that A code from the output of counter 11 arrived at its output. If the counter capacity of the li is M times the capacity of the counter 10 and the higher bits of the counter 11 are connected to the switch 22, then the code that is controlled by the digital-to-analog converter 23 will be equal to the averaged over M measurement value of the reference level In the adder 19, a reference level is added to the reference level produced by the digital-to-audio converter 23 (Fig. 2-1), for example, equal to half of the low-order bit of the digital-analog converter 4 under investigation. The total voltage is applied to the input of the comparison unit B. the control voltage (Fig. 2i) arriving at the element And 14. At this the cycle of setting the reference level ends and the measurement of the settling time begins. The triggering pulse from the output of the first divider 2 frequency goes to form Spruce 6 pulse Start, which, when the trigger pulse reaches half the amplitude, produces a pulse (Fig. 2g), a tilting trigger 13 (Fig. 2h), which in turn repeats element 14 and generator 18 pulses triggering :: pulses are received to counter 8, recalculated (Fig. 2k). When the instantaneous value of the output voltage of the digital-to-analog converter 4 under investigation reaches the set reference level, the comparison unit 5 generates a pulse that returns the trigger .13 to its initial position (Fig. 2h), while the arrival of the quantizing pulses in the counting counter 8 is stopped. In addition, the pulse from the output of the comparison unit 5 is fed to the counter 7 averaging over N measurements. When a new start pulse arrives from the first frequency divider 2, the measurement cycle will be repeated until the output of the counter 7 averaging noW measurements will be present control voltage .. After entering from the output of the comparison unit 5 into the counter 7 N pulses, where N is the capacity of the counter 7, the control voltage at the output of the counter 7 turns off (Fig. 2i) by closing the element 14 and entering the second input of the unit 17 management, which in howl turn off the control voltage at its second output. This voltage turns off the power supply 21, removing power from the digital-to-analog converter 4 being investigated (Fig. 2a). The measurement process ends there. With an appropriate selection of the counting coefficient of the counter 8 recalculation, the output counter code 9 connected in series to the output of the counter 8 recalculation (Fig. 2L) will be equal to the measured time of the test digital-to-analog converter 4. Block 17 is assembled on standby multivibrators, providing the required control pulse delays, and triggers, providing the duration of these pulses (duration of measurement modes. The switch 22 is assembled on chips (for example, 155LR1) and outputs one of two digital signals. The use of additional elements: two frequency dividers, a waiting multivibrator, two AND and NOT elements, three counters, a digital-analog converter switch , adder, control unit, DAC power supply and reference level, comparison unit, Start pulse shaper, and start-up pulse generator allows the functionality of the proposed meter to be expanded. Compared to the known stop of measurement, it can be done not at the pulse front, but at any of its levels, choose the value of this level, 1 1 относительно relative to the steady-state level, or change the position of the instantaneous value measurement by initial setting of the second frequency divider. By changing the initial setting of the second frequency divider, the digital values of the time intervals can be measured with a digital time interval meter. The use of the listed elements allows to increase the measurement accuracy in comparison with the known one, since it sets the measurement stop levels more precisely. In addition, averaging the measurement result of the reference level allows one to reduce the error in setting the reference level by vlf, which is especially important when measuring the time required to establish digital-to-analog converters.

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Claims (1)

(54U DIGITAL TIME INTERVAL METER, containing sequentially connected counting pulse generator, element And, conversion counter and output counter, second input of element And connected to the output of the trigger, the first input of which is connected to the first input of the averaging counter for N measurements, the output of which is connected to the third the input of the And element, and the second inputs of the conversion counter and the output counter are connected between themselves, as well as the digital-to-analog converter under study, characterized in that, in order to increase the accuracy and measuring and expanding its functionality, it is equipped with two frequency dividers, a waiting multivibrator, two additional AND elements, an NO element, three additional counters, a switch, a digital-to-analog converter, an adder, a control unit, power sources for the studied digital-analog converter and a reference level, a comparison unit, pulse generator `` Start '' and a trigger pulse generator, the output of which is connected to the first inputs of the first and second frequency dividers, output q the first divider is connected to the input of the pulse shaper `` Start '', the first input of the studied digital-to-analog converter, the output of which is connected to the first input of the comparison unit, the second input of which is connected through the adder to the output of the digital-to-analog converter, and the output is connected to the first input of the first additional element And , the input of the element NOT and the first input of the trigger, to the second input of which the output of the pulse shaper '' Start '' is connected, while the output of the second frequency divider through the standby multivibrator connected to the second input of the first and first input of the second additional AND elements, the third * and second inputs of which are combined and connected to the first output of the control unit, the first input of the switch, the second input of the averaging counter over N measurements and the input of the reference level source, the third input of the second additional element And it is connected with the output of the element NOT, and its output is connected to the first inputs of the first and second additional counters, the second input of the first additional counter is connected with the output of the first additional element And the first input of the third additional counter, and its output is connected to the second input; a switch, the third input of which is connected to the output of the third additional counter, and the output is connected to the input. digital-to-analog converter, the output of the second additional counter is connected to the first input of the control unit, the second input of which is connected to the output of the averaging counter for N measurements. the second output of the control unit is connected to the input of the source SU, “1065822 power supply, the third output is connected to the second inputs of the first and second frequency dividers, the second and third additional counters, the third input of the first additional counter and with the second input of the conversion counter, the fourth output of the control unit is connected with the third input of the second frequency divider, the output of the studied digital-to-analog converter power supply is connected to the second input of the latter, and the output of the reference level source is connected to the second input of the sums torus.