SI24004A - Method and device for testing and adjusting the temperature coefficient of integrated circuits - Google Patents

Method and device for testing and adjusting the temperature coefficient of integrated circuits Download PDF

Info

Publication number
SI24004A
SI24004A SI201200050A SI201200050A SI24004A SI 24004 A SI24004 A SI 24004A SI 201200050 A SI201200050 A SI 201200050A SI 201200050 A SI201200050 A SI 201200050A SI 24004 A SI24004 A SI 24004A
Authority
SI
Slovenia
Prior art keywords
integrated circuit
temperature
circuit
integrated
temperature coefficient
Prior art date
Application number
SI201200050A
Other languages
Slovenian (sl)
Inventor
Janez Ml. Trontelj
Janez Trontelj
mid BlaĹľ Ĺ
Original Assignee
Univerza V Ljubljani Fakulteta Za Elektrotehniko
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Univerza V Ljubljani Fakulteta Za Elektrotehniko filed Critical Univerza V Ljubljani Fakulteta Za Elektrotehniko
Priority to SI201200050A priority Critical patent/SI24004A/en
Priority to PCT/SI2013/000001 priority patent/WO2013122551A1/en
Publication of SI24004A publication Critical patent/SI24004A/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2855—Environmental, reliability or burn-in testing
    • G01R31/2872—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation
    • G01R31/2874—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation related to temperature
    • G01R31/2875—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation related to temperature related to heating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/345—Arrangements for heating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

Predlagani izum se nanaša postopek in na izvedbo naprave, ki omogoča testiranje in/ali uravnavanje temperaturnega koeficienta integriranega vezja samega. Postopek po tem izumu se nanaša na uporabo merilnih podatkov pri dveh temperaturah. Na podlagi merilnih podatkov in karakteristik signalov integriranega vezja, ki so funkcija časa, temperature in bremenskih pogojev, je mogoče sortiranje oziroma kalibracija temperaturnega koeficienta integriranega vezja. Naprava po tem izumu se nanaša na kombinacijo integriranega vezja z zunanjim bremenskim vezjem ali integriranega vezja z vgrajenim bremenskim vezjem, ki poveča tok v integriranem vezju s čimer se poveča temperatura integriranega vezja.The present invention relates to a process and to the implementation of an apparatus which enables testing and / or controlling the temperature coefficient of the integrated circuit itself. The process of the present invention relates to the use of measurement data at two temperatures. On the basis of the measurement data and characteristics of the integrated circuit signals, which are a function of time, temperature and load conditions, it is possible to sort or calibrate the temperature coefficient of the integrated circuit. The device of the present invention relates to a combination of an integrated circuit with an external load circuit or an integrated circuit with a built-in load circuit that increases the current in the integrated circuit thereby increasing the temperature of the integrated circuit.

Description

Postopek in naprava za testiranje in uravnavanje temperaturnega koeficienta integriranih vezijMethod and apparatus for testing and adjusting the temperature coefficient of integrated circuits

Predmet izuma je naprava in postopek za testiranje in uravnavanje temperaturnega koeficienta integriranih vezij. Predlagani izum sodi v področje testiranja integriranih vezij, natančneje v področje kalibracije oz. karakterizacije temperaturnega koeficienta integriranih vezij.The subject of the invention is a device and method for testing and adjusting the temperature coefficient of integrated circuits. The present invention falls within the field of integrated circuits testing, more specifically in the field of calibration or calibration. characterization of the temperature coefficient of integrated circuits.

Stanje tehnikeThe state of the art

Delovanje integriranih vezij oz. električni parametri integriranih vezij so bolj ali manj odvisni od temperature. Temperaturna odvisnost električnega izhoda je v večini primerov nezaželena saj mora biti izhod čim bolj proporcionalen vhodni količini (napetost, tok, magnetno polje, stres,...), če le ta ni temperatura. V nekaterih primerih je pa integrirano vezje sestavni del nekega sistema, ki ima svojo temperaturno odvisnost. V takem primeru mora imeti integrirano vezje nasproten temperaturni koeficient tako, da celotni sistem z integriranim vezjem ne kaže temperaturne odvisnosti.Functioning of integrated circuits respectively. the electrical parameters of integrated circuits are more or less dependent on temperature. In most cases, the temperature dependence of the electrical output is undesirable, since the output must be as proportional to the input quantity (voltage, current, magnetic field, stress, ...), if not the temperature. In some cases, however, an integrated circuit is an integral part of a system that has its own temperature dependence. In such a case, the integrated circuit must have an opposite temperature coefficient such that the whole integrated circuit system does not show a temperature dependence.

Integrirana vezja so narejena istočasno na rezini. Postopek izdelave je za vsa vezja enak, kar pomeni, da so strukture v vezju enake, oziroma so v istem razmerju. Kljub temu pa zaradi procesnih variacij električne lastnosti posameznih elementov variirajo. Na koncu to pomeni, da se delovanje dveh enakih vezij razlikuje, s tem pa tudi temperaturna odvisnost. Drugi problem nastane pri pakiranju integriranih vezij. Ohišja povzročajo stres na integrirano vezje. Vpliv stresa ni vedno enak kar pomeni, da je delovanje dveh enakih integriranih vezij (iz iste silicijeve rezine) v enakih ohišjih različno. Temperaturni koeficient, ničelni ali neničelni, mora biti zato nastavljen za vsako integrirano vezje posebej.Integrated circuits are made simultaneously on the slice. The manufacturing process is the same for all circuits, meaning that the structures in the circuit are the same or in the same ratio. However, due to process variations, the electrical properties of the individual elements vary. In the end, this means that the operation of two identical circuits differs, and thus also a temperature dependence. Another problem arises when packing integrated circuits. Enclosures cause stress on the integrated circuit. The effect of stress is not always the same, which means that the performance of two identical integrated circuits (from the same silicon wafer) is different in the same enclosures. The temperature coefficient, zero or non-zero, must therefore be set separately for each integrated circuit.

Pri testiranju ali uravnavanju linearnih temperaturnih koeficientov integriranih vezij je potrebno izvesti meritev pri dveh znanih temperaturah. To zahteva merilno mesto, ki ima možnost nastavljanja temperature v dveh zaporednih meritvah. Ker sta časovni konstanti segrevanja in ohlajanja zelo dolgi to pomeni, da je celotno proces zelo dolgotrajen. Rešitve, ki omogočajo meritev pri dveh temperaturah so opisane v patentih US 2004/0236530 Al in US 6,972,557 B2. Seveda je možno izvajati meritev najprej pri eni temperaturi in zabeležiti informacijo o rezultatih in serijske številke integriranih za večjo količino nato pa ponoviti meritev za vsa vezja še pri drugi temperaturi in • · · · • ·When testing or adjusting the linear temperature coefficients of integrated circuits, a measurement must be made at two known temperatures. This requires a measuring point that has the ability to set the temperature in two consecutive measurements. Since the time constants of heating and cooling are very long, this means that the whole process is very time consuming. Solutions that allow for measurement at two temperatures are described in US Patents 2004/0236530 Al and US 6,972,557 B2. It is, of course, possible to perform the measurement first at one temperature and record the result information and serial numbers integrated for a larger quantity and then repeat the measurement for all circuits at another temperature and • · · · • ·

-2primerjati s podatki zabeleženimi pri prvi temperaturi. Tudi ta postopek je drag in zahteva zapis in odčitavanje serijskih številk integriranih vezij.-2compared with the data recorded at the first temperature. This process is also expensive and requires the recording and reading of serial numbers of integrated circuits.

Postopek, ki je opisan v patentu US 2004/0236530 Al, opisuje testiranje polprevodniških naprav pri dveh temperaturah. Najprej je integrirano vezje ohlajeno s tekočino, v drugem koraku je pa izvedeno gretje s pomočjo lastnega segrevanja. Lastno segrevanje je posledica injekcije toka skozi vsaj en PN spoj.The process described in US patent 2004/0236530 Al describes the testing of semiconductor devices at two temperatures. First, the integrated circuit is fluid-cooled, and in the second step, it is heated by its own heating. Self-heating is due to injection of current through at least one PN junction.

Opis izumaDescription of the invention

Predlagani izum se nanaša postopek in na izvedbo naprave, ki omogoča testiranje in/ali uravnavanje temperaturnega koeficienta integriranega vezja samega.The present invention relates to a process and to an embodiment of a device that enables the testing and / or regulation of the temperature coefficient of the integrated circuit itself.

Postopek po tem izumu se nanaša na uporabo merilnih podatkov pri dveh temperaturah. Na podlagi merilnih podatkov in karakteristik signalov integriranega vezja, ki so funkcija časa, temperature in bremenskih pogojev, je mogoče sortiranje oziroma kalibracija temperaturnega koeficienta integriranega vezja. Enačba (1) prikazuje primer signala P, katerega vrednost je pri povišani temperaturi Tv in sobni temperaturi To enaka.The process of the present invention relates to the use of measurement data at two temperatures. Based on the measurement data and the characteristics of the integrated circuit signals, which are a function of time, temperature and load conditions, it is possible to sort or calibrate the temperature coefficient of the integrated circuit. Equation (1) shows an example of a signal P whose value is the same at elevated temperature T v and room temperature T o .

Pi(Tv) - PJTo) = 0 (1)Pi (T v ) - PJTo) = 0 (1)

Naprava po tem izumu se nanaša na kombinacijo integriranega vezja z zunanjim bremenskim vezjem ali integriranega vezja z vgrajenim bremenskim vezjem, ki poveča tok v integriranem vezju. Povečan tok pomeni večjo moč, ki poveča temperaturo vezja.The device of the present invention relates to the combination of an integrated circuit with an external load circuit or an integrated circuit with an integrated load circuit that increases the current in the integrated circuit. Increased current means more power that increases the temperature of the circuit.

Izum bo v nadaljevanju predstavljen z izvedbenimi primeri in slikami:The invention will now be illustrated with examples and drawings:

Slika 1: Integrirano vezje z dodatnim vezjem za bremenitev - segrevanje.Figure 1: Integrated circuit with optional charge - heating circuit.

Slika 2: Integrirano vezje z dodatnim vezjem za bremenitev - segrevanje, dodatni izhod iz vezja, ki meri temperaturo vezja, možnost nastavljanja referenčne temperature.Figure 2: Integrated circuit with additional load circuit - heating, additional output from the circuit that measures the circuit temperature, possibility to set the reference temperature.

Slika 3: Integrirano vezje v vgrajenimi grelnimi elementi (H1-H4).Figure 3: Integrated circuit in integrated heating elements (H1-H4).

Slika 4: Integrirano vezje v vgrajenimi distribuiranimi grelnimi elementi po površini vezja.Figure 4: Integrated circuit in built-in distributed heating elements across the circuit surface.

Slika 5: Potek temperature zaradi lastnega segrevanja.Figure 5: Temperature course due to its own heating.

-3Izvedbeni primer 1-3Example 1

Na sliki 1 je prikazano integrirano vezje 101 s pomožnim bremenskim vezjem 102. Ob vklopu stikalnega vezja lastnega segrevanja 103 se poveča tok skozi merjeno integrirano vezje 101. Zaradi večjega toka se poveča moč in posledično se poveča temperatura. Testni vektorji 104 predstavljajo režim delovanja integriranega vezja ter vhodno merjeno količino. Testni rezultati 105 so izhodni oziroma merjeni signali na katerih se lahko tudi izvede kalibracija oziroma uravnavanje s 106.Figure 1 shows an integrated circuit 101 with an auxiliary load circuit 102. When the self-heating circuit switch 103 is turned on, the current through the measured integrated circuit 101 is increased. Test vectors 104 represent the mode of operation of the integrated circuit and the input measured quantity. Test results 105 are output or measured signals that can also be calibrated or tuned to 106.

Sama kalibracija oz. karakterizacija poteka tako, da se meritve želenih signalov najprej izvedejo pri sobni temperaturi. Potem se vključi lastno segrevanje. S časom temperatura zaradi povečane disipacije moči narašča. Sama sprememba temperature je odvisna od trajanja povečanega toka ter od same velikosti toka. Ko integrirano vezje 101 doseže želeno temperaturo, se ponovijo meritve signalov, ki so bili izmerjeni tudi pri nizki temperaturi. Primerjava meritev signalov pri nizki in visoki temperaturi služi za karakterizacijo/kalibracijo parametrov. Slabost tega sistema je, da je težko določiti točno temperaturo integriranega vezja 101 med segrevanjem saj termometer ni na voljo. Zaradi tega je mogoče nastaviti temperaturni koeficient parametrov/signalov le na nič kar pomeni, da želeni parametri/signali temperaturno niso odvisni.The calibration itself. characterization is performed by measuring the desired signals first at room temperature. Then your own warming up comes on. Over time, the temperature increases with increasing power dissipation. The change in temperature depends on the duration of the increased current and the magnitude of the current itself. When the integrated circuit 101 reaches the desired temperature, the measurements of the signals, which were also measured at low temperature, are repeated. Comparison of low and high temperature signal measurements serves to characterize / calibrate the parameters. The disadvantage of this system is that it is difficult to determine the exact temperature of the integrated circuit 101 during heating because the thermometer is not available. As a result, the temperature coefficient of the parameters / signals can only be set to zero, which means that the desired parameters / signals are temperature independent.

Izvedbeni primer 2Example 2

Na sliki 2 je prikazano integrirano vezje 101 s pomožnim bremenskim vezjem 102. Ob vklopu lastnega segrevanja 103 se poveča tok skozi merjeno integrirano vezje 101. Zaradi večjega toka se poveča moč in posledično se poveča temperatura. Testni vektorji 104 predstavljajo režim delovanja integriranega vezja ter vhodno merjeno količino. Testni rezultati 105 so izhodni oziroma merjeni signali na katerih se lahko tudi izvede kalibracija oziroma uravnavanje 106.Figure 2 shows an integrated circuit 101 with an auxiliary load circuit 102. When the self-heating circuit 103 is turned on, the current through the measured integrated circuit 101 increases. Due to the higher current, the power is increased and the temperature is increased. Test vectors 104 represent the mode of operation of the integrated circuit and the input measured quantity. Test results 105 are output or measured signals that can also be calibrated or tuned 106.

Pri tem izvedbenem primeru ima integrirano vezje 101 na voljo še dodatni signal/termometer 108, ki daje informacijo o trenutni temperaturi merjenega integriranega vezja. Prav tako je mogoče nastaviti referenčno vrednost signala VR(T0) 107. Merilnika zato ni potrebno umeriti. Z merjenjem signala termometra 108 je moč določiti temperaturo integriranega vezja 101. Pri temperaturi To+ ΔΤ je uporabljena napetost VR + AVR kot vir za temperaturno kompenzacijo parametrov testiranega vezja.In this embodiment, the integrated circuit 101 has an additional signal / thermometer 108, which provides information on the current temperature of the measured integrated circuit. It is also possible to set the reference value of the signal V R (T 0 ) 107. The meter therefore does not need to be calibrated. By measuring the signal of thermometer 108, it is possible to determine the temperature of the integrated circuit 101. At T o + ΔΤ, the voltage V R + AV R is used as a source for temperature compensation of the parameters of the circuit tested.

Za vsak parameter Pi(T)...Pn(T) velja, da mora biti po uravnavanju Pi(Tv)-Pj(T0)=PT, pri čemer je PT neka ciljna vrednost. Za parameter, ki ne sme biti temperaturno odvisen je PT=0 za vsak To in Tv. To veljaFor each parameter Pi (T) ... P n (T), after adjusting Pi (T v ) -Pj (T 0 ) = P T , where P T is some target value. For a parameter that must not be temperature dependent, P T = 0 for each T o and T v . That's true

-4tudi za temperaturo To, to je začetno temperaturo, kot tudi za temperaturo Tv, temperaturo po lastnem segrevanju.-4 Even for the temperature T o , that is, the initial temperature as well as the temperature T v , the temperature after self-heating.

Izvedbeni primer 3Example 3

Slabost izvedbenega primera 1 in izvedbenega primera 2 je zahteva za dodatno zunanje bremensko vezje 102, ki poveča porabo merjenega integriranega vezja. Pri izvedbenem primeru 3 (Slika 3) je bremensko vezje integrirano. S pogojem za vklop lastnega segrevanja 103 (programiranje ukaza, testni vektorji) se poveča tok skozi bremenske tranzistorje 109 (H1-H4) v integriranem vezju. Ti bremenski tranzistorji delujejo kot grelni elementi.The disadvantage of embodiment 1 and embodiment 2 is the requirement for an additional external load circuit 102 that increases the consumption of the measured integrated circuit. In embodiment 3 (Figure 3), the load circuit is integrated. The condition for switching on self-heating 103 (command programming, test vectors) increases the current through load transistors 109 (H1-H4) in the integrated circuit. These load transistors act as heating elements.

Izvedbeni primer 4Example 4

Pri izvedbenem primeru 4 (Slika 4) ob vklopu lastnega segrevanja 103 skozi MOS tranzistorje 110, ki predstavljajo grelne elemente, steče tok. MOS tranzistorji so enakomerno razporejeni po površini integriranega vezja 101. To omogoča skrajšanje časovne konstante segrevanja saj ni temperaturnega gradienta po integriranem vezju kar pomeni, da se lahko segreva z večjo intenzivnostjo.In embodiment 4 (Figure 4), when the self-heating 103 is switched on, current flows through the MOS transistors 110, which represent the heating elements. The MOS transistors are evenly distributed over the surface of the integrated circuit 101. This allows the heating time constant to be shortened since there is no temperature gradient across the integrated circuit, which means that it can be heated with greater intensity.

Na sliki 5 je prikazan potek merjenega signala v odvisnosti od časa, ki velja za vse izvedbene primere. Prva meritev je izvedena v času t1# ko gretje še ni vključeno. Ob času ts je vključen tok, zaradi katerega se integrirano vezje začne greti. Po določenem času (ob času t2), ko temperatura integriranega vezja dovolj naraste, se ponovno izvede meritev.Figure 5 shows the time course of the measured signal as a function of time applicable to all embodiments. The first measurement is made at time t 1 # when the heating is not on. At time t s , a current is included which causes the integrated circuit to start heating. After a certain time (at time t 2 ), when the temperature of the integrated circuit rises sufficiently, the measurement is performed again.

Claims (5)

1. Postopek za testiranje in uravnavanje temperaturnega koeficienta integriranih vezij z izvedbo kalibracije in/ali sortiranja integriranih vezij na podlagi temperaturnega koeficienta merilnih podatkov električnih signalov integriranega vezja pri dveh temperaturah, označen s tem, da je kalibrirana le referenčna vrednost pri poljubni temperaturi kar omogoča kalibracijo parametrov pri poljubni drugi temperaturi, ki je dosežena z lastnim segrevanjem.A method for testing and adjusting the temperature coefficient of integrated circuits by performing the calibration and / or sorting of integrated circuits based on the temperature coefficient of the measurement data of the integrated circuit electrical signals at two temperatures, characterized in that only the reference value at any temperature is calibrated, allowing for calibration parameters at any other temperature obtained by self-heating. 2. Naprava za testiranje in uravnavanje temperaturnega koeficienta integriranih vezij označena s tem, da vsebuje merjeno integrirano vezje in dodatno vezje, ki povzroči povišanje temperature integriranega vezja.An apparatus for testing and adjusting the temperature coefficient of integrated circuits, characterized in that it contains a measured integrated circuit and an additional circuit that causes the integrated circuit to rise in temperature. 3. Naprava po zahtevku 2, označena s tem, da je dodatno vezje zunanje, torej ločeno od integriranega vezja.Apparatus according to claim 2, characterized in that the additional circuit is external, thus separate from the integrated circuit. 4. Naprava po zahtevku 2, označena s tem, da jedodatno vezje del integriranega vezja samega.Device according to claim 2, characterized in that the one-piece circuit is part of an integrated circuit itself. 5. Naprava po zahtevkih 2 -4, označena s tem, da dodatno vezje predstavljajo eden ali več integriranih grelnih elementov razporejenih simetrično glede na vezje.Device according to claims 2 -4, characterized in that the additional circuit is represented by one or more integrated heating elements arranged symmetrically with respect to the circuit.
SI201200050A 2012-02-17 2012-02-17 Method and device for testing and adjusting the temperature coefficient of integrated circuits SI24004A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
SI201200050A SI24004A (en) 2012-02-17 2012-02-17 Method and device for testing and adjusting the temperature coefficient of integrated circuits
PCT/SI2013/000001 WO2013122551A1 (en) 2012-02-17 2013-01-16 Method and device for testing and adjusting the temperature coefficient of integrated circuits

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SI201200050A SI24004A (en) 2012-02-17 2012-02-17 Method and device for testing and adjusting the temperature coefficient of integrated circuits

Publications (1)

Publication Number Publication Date
SI24004A true SI24004A (en) 2013-08-30

Family

ID=48142058

Family Applications (1)

Application Number Title Priority Date Filing Date
SI201200050A SI24004A (en) 2012-02-17 2012-02-17 Method and device for testing and adjusting the temperature coefficient of integrated circuits

Country Status (2)

Country Link
SI (1) SI24004A (en)
WO (1) WO2013122551A1 (en)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100542126B1 (en) 2003-04-29 2006-01-11 미래산업 주식회사 Handler for testing semiconductor device
US7085667B2 (en) 2003-05-19 2006-08-01 Analog Microelectronics, Inc. System and method of heating up a semiconductor device in a standard test environment
US7261461B2 (en) * 2004-09-23 2007-08-28 Microbridge Technologies Inc. Measuring and trimming circuit components embedded in micro-platforms
US8241925B2 (en) * 2009-11-24 2012-08-14 Atmel Corporation Calibration of temperature sensitive circuits with heater elements

Also Published As

Publication number Publication date
WO2013122551A1 (en) 2013-08-22

Similar Documents

Publication Publication Date Title
US8384395B2 (en) Circuit for controlling temperature and enabling testing of a semiconductor chip
US9423460B2 (en) Systems and methods mitigating temperature dependence of circuitry in electronic devices
TWI770128B (en) Variation immune on-die voltage droop detector
US7734440B2 (en) On-chip over-temperature detection
EP3066487A1 (en) Hall sensor readout system with offset determination using the hall element itself
CN110940432B (en) Temperature sensing circuit
Hantos et al. Different questions of today's LED thermal testing procedures
JPS59182535A (en) On-chip voltage monitor and method of using same
ES2742248T3 (en) Temperature measuring device and temperature measurement procedure
SI24004A (en) Method and device for testing and adjusting the temperature coefficient of integrated circuits
EP2746790B1 (en) Method and circuit for measuring own and mutual thermal resistances of a magnetic device
US9310261B2 (en) Production-test die temperature measurement method and apparatus
US10393597B2 (en) Over-temperature detector with test mode
Sato Stability test of industrial platinum resistance thermometers at 450° C for 1000 hours
Farkas Fundamentals of Thermal Transient Measurements
Demling et al. Best practices for deploying thermocouple instruments
RU2653962C1 (en) Method of automated determination of thermal resistance transition - body of packed power semiconductor devices
Frankiewicz et al. Measurement of the temperature inside standard integrated circuits
Zarębski et al. Measuring system for determining thermal parameters of semiconductor devices
Glavanovics et al. Indirect In-Situ Junction Temperature Measurement for Condition Monitoring of GaN HEMT Devices during Application Related Reliability Testing
Bakerenkov et al. Estimation of the Radiation Hardness of Bipolar Voltage Comparators in Wide Operation Temperature Range
CN115792549A (en) Thermal resistance test system and test method
Górecki et al. Set-Up for Measuring Thermal Parameters of Power Semiconductor Devices
Drakin et al. Automated Control of Die-to-Case Thermal Resistance in Integrated Circuit Packages of Pulse Voltage Converters
SU1362964A1 (en) Method of determining errors of thermoelectric thermometers

Legal Events

Date Code Title Description
OO00 Grant of patent

Effective date: 20130923

KO00 Lapse of patent

Effective date: 20220222