SI20398A - Procedure and arrangement for the transmission of data and voice packages between packet data and synchronous netvork - Google Patents

Procedure and arrangement for the transmission of data and voice packages between packet data and synchronous netvork Download PDF

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Publication number
SI20398A
SI20398A SI200000312A SI200000312A SI20398A SI 20398 A SI20398 A SI 20398A SI 200000312 A SI200000312 A SI 200000312A SI 200000312 A SI200000312 A SI 200000312A SI 20398 A SI20398 A SI 20398A
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packet
buffer
communication processor
manager
expansion module
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SI200000312A
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Slovenian (sl)
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Kristjan PEČANAC
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Daisy Technologies Inc.
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Priority to SI200000312A priority Critical patent/SI20398A/en
Publication of SI20398A publication Critical patent/SI20398A/en
Priority to AU2002218646A priority patent/AU2002218646A1/en
Priority to PCT/SI2001/000034 priority patent/WO2002047323A2/en

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/46Interconnection of networks
    • H04L12/4604LAN interconnection over a backbone network, e.g. Internet, Frame Relay

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

The invention deals with the arrangement and procedure for the transmission and processing of data and voice packets between a packet data network and a synchronous telecommunication network. The invention is based on the use of a packet handler (4), a buffer (6) with two separate access possibilities (DPRAM) as well as an extension module (2), which acts as the packet handler. The task of the packet handler (4) is the transfer of packets between the buffer (6) and the electronic elements (3) of the extension module (2). The application of the invention in reality decreases the load of the core of the telecommunication processor and its peripheral bus, particularly by the flexible extension module (2) as well as the packet handler (4), it also allows swift and effective adjustment of the core system to modifications in the field of telecommunications as well as compatibility with different vendors of software for packet processing and electronic elements (3) like DSP processors and FPGA circuits.

Description

POSTOPEK IN PRIPRAVA ZA PRENOS PODATKOVNIH IN GOVORNIH PAKETOV MED PAKETNIM IN SINHRONIM OMREŽJEMPROCEDURE AND PREPARATION FOR DATA TRANSFER AND SPEECH PACKAGES BETWEEN PACKAGE AND SYNCHRONOUS NETWORKS

Področje tehnike izumaFIELD OF THE INVENTION

Predmet izuma je postopek in priprava za prenos podatkovnih in govornih paketov med paketnim in sinhronim omrežejem.The subject of the invention is a method and preparation for transferring data and voice packets between packet and synchronous networks.

Izum se nanaša na področje elektronskih vezij ter ustrezne programske opreme za uporabo v komunikacijah. Bolj natančno, se izum nanaša na področje prenosa, tako govornih kot tudi podatkovnih, paketov po standardnih obstoječih telekomunikacijskih ter podatkovnih omrežij.The invention relates to the field of electronic circuits and suitable software for use in communications. More specifically, the invention relates to the field of transmission of both voice and data packets over standard existing telecommunications and data networks.

Tehnični problem, ki ga izum rešujeA technical problem that the invention solves

Sodobna elektronska vezja za uporabo v komunikacijah so v večji meri sestavljena iz glavnega komunikacijskega procesorja, ki skrbi za kontrolo nad celotnim vezjem, ter elektronskih komponent, največkrat uporabljeni so digitalni signalni procesorji (DSP), ki skrbijo za obdelavo paketov.Modern electronic circuits for use in communications are largely comprised of the main communication processor, which provides control over the entire circuit, as well as electronic components, the most commonly used digital signal processors (DSPs) that handle packet processing.

Glavna problematika na tem področju je velika obremenitev samega jedra ter zunanjega vodila komunikacijskega procesorja pri opravljanju prenosa paketov med komunikacijskim procesorjem ter elektronskimi komponentami za obdelavo paketov. Prav tako je problematična hitrost le tega prenosa, saj ne sme zavirati pretoka podatkov. Izum rešuje zgoraj opisani problematiki ter zagotavlja, tako razbremenitev jedra komunikacijskega procesorja in njegovega zunanjega vodila, kot tudi potrebno hitrost pretoka paketov.A major issue in this area is the heavy load on the core itself and the external bus of the communication processor when performing packet transfers between the communication processor and electronic components for packet processing. The speed of this transfer is also problematic as it should not slow down the flow of data. The invention solves the problems described above and provides both the load of the core of the communication processor and its external bus as well as the required packet flow rate.

Stanje tehnikeThe state of the art

Za rešitev opisane problematike že obstajajo rešitve, vendar pa vsebujejo določene pomankljivosti.There are already solutions to the problem described, but they do have some drawbacks.

Ena od rešitev, prikazana na sliki. 1, uporablja svoje namensko integrirano vezje (ASIC) 24, v katerem je realizirana celotna kontrola prenosa in tudi sam prenos paketov med zunanjim sinhrono-dinamičnim pomnilnikom (SDRAM) 28 komunikacijskega procesorja 36, po sliki 1, ter notranjim pomnilnikom DSP procesorjev 22, ki obdelujejo pakete. Podatki iz paketnega omrežja 34, po sliki 1, prestreza komunikacijski procesor 36, ter sprejete pakete z govorno vsebino shrani v SDRAM 28. Integrirano vezje ASIC 24 pakete preko PCI mosta 30 in PCI vodila 26 prenese v notranji spomin enga od DSP procesorjev. Prenos paketov v tem primeru poteka paralelno. Tu se paket obdela ter odda v sinhrono omrežje 20, po sliki 1. Postopek za prenos paketov iz sinhronega 20 v paketno 34omrežje je isti, samo da se odvija v obratnem vrstnem redu.One of the solutions shown in the picture. 1, utilizes its dedicated Integrated Circuit (ASIC) 24, which implements the complete transmission control and also the packet transfer itself between the external synchronous-dynamic memory (SDRAM) 28 of the communication processor 36, according to Figure 1, and the internal memory of the DSP processors 22, which they process packages. Data from the packet network 34, according to Figure 1, intercepts the communication processor 36, and stores the received packets with voice content in SDRAM 28. The integrated circuit ASIC 24 transmits the packets via PCI bridge 30 and PCI bus 26 to the internal memory of one of the DSP processors. In this case, the packets are downloaded in parallel. Here, the packet is processed and transmitted to synchronous network 20 according to Figure 1. The procedure for transferring packets from synchronous 20 to packet 34 is the same, except that it takes place in reverse order.

Za celoten prenos torej skrbi integrirano vezje ASIC 24 in na ta način razbremeni jedro komunikacijskega procesorja 36. Pomankljivost pri tej rešitvi je ta, da se pri branju in zapisovanju paketov v SDRAM 28 iz strani DSP procesorjev 22 uporablja zunanje vodilo komunikacijskega procesorja 32, po sliki 1, kar povzroči obremenitev tega vodila. Druga pomankljivost pa je to, daje to integrirano vezje 24 končen in zaključen produkt, ki se ga ne da spreminjati in prilagajati hitrim spremembam, ki se odvijajo na področju telekomunikacij.The whole transmission is therefore taken care of by the integrated circuit ASIC 24 and thus relieves the core of the communication processor 36. The disadvantage of this solution is that when reading and writing packets in SDRAM 28 from the DSP processors 22, an external bus of the communication processor 32 is used, according to the picture 1, which puts a strain on this bus. Another disadvantage is that this integrated circuit 24 is a finished and finished product that cannot be modified and adapted to the rapid changes taking place in the field of telecommunications.

Druga rešitev, prikazana na sliki 2, za prenos paketov uporablja serijski pretok podatkov, po serijskem vodilu 50. Podatki iz paketnega omrežja 44, po sliki 2, prestreza komunikacijski procesor 48, po sliki 2, ter sprejete pakete z govorno vsebino preko zunanjega procesorskega vodila 42, po sliki 2, shrani v SDRAM pomnilnik 40. Komunikacijski procesor 48 pakete shranjene v SDRAM-u 40 pošlje po serijskem kanalu 50 do DSP procesorjev 52, kjer se shrani v notranji spomin enega od njih. Pretok podatkov po serijskem kanalu 50 lahko poteka transparentno ali z uporabo HDLC (High-level Data Link Control) enkapsulacije. Izbrani DSP procesor paket obdela ter ga odda v sinhrono omrežje 46. Postopek za prenos paketov iz sinhronega 46, po sliki 2, v paketno 44 omrežje je isti, samo da se odvija v obratnem vrstnem redu.The second solution shown in Figure 2 uses a serial data stream 50 to transmit packets. Data from the packet network 44, according to Figure 2, intercepts the communication processor 48, according to Figure 2, and received packets with voice content via an external processor bus. 42, according to Figure 2, stores in SDRAM memory 40. The communication processor 48 sends packets stored in SDRAM 40 via serial channel 50 to DSP processors 52, where it is stored in the internal memory of one of them. Data flow through serial channel 50 can be performed transparently or by using HDLC (High-level Data Link Control) encapsulation. The selected DSP processor processes the packet and transmits it to the synchronous network 46. The procedure for transferring packets from synchronous 46, according to Figure 2, to the packet 44 network is the same, except that it takes place in reverse order.

Za celoten prenos paketov skrbi komunikacijski procesor 48, kar dodatno obremenjuje njegovo jedro, kar je velik problem in v tem primeru ostane nerešen. Za komunikacijo med komunikacijskim 48 in enim izmed DSP procesotjev 52 se uporablja serijska vmesnika komunikacijskega procesorja 48. in DSP procesorja. Ta način odpravlja problematiko obremenitve zunanjega procesorskega vodila 42.The entire packet transmission is handled by the communication processor 48, which further burdens its core, which is a major problem and in this case remains unresolved. For communication between communication 48 and one of the DSP processors 52, the serial interfaces of the communication processor 48. and the DSP processor are used. This mode eliminates the problem of external processor bus load 42.

Naloga in cilj izuma je takšen postopek in priprava za prenos podatkovnih in govornih paketov med paketnim in sinhronim omrežejem, da bodo odpravljene pomanjkljivosti znanih rešitev.The object and object of the invention is to provide such a method and preparation for the transmission of data and voice packets between packet and synchronous networks in order to eliminate the disadvantages of known solutions.

Po izumu je naloga rešena s postopkom in pripravo za prenos podatkovnih in govornih paketov med paketnim in sinhronim omrežejem po neodvisnih patentnih zahtevkih.According to the invention, the problem is solved by the method and preparation for transferring data and voice packets between packet and synchronous networks according to independent claims.

OPIS IZUMADESCRIPTION OF THE INVENTION

Izum, poleg tega, da ponuja rešitve opisanih tehničnih problemov, tudi odpravlja pomankljivosti, ki so omenjene pri zgoraj opisanih, že obstoječih rešitvah.The invention, in addition to providing solutions to the technical problems described above, also eliminates the disadvantages mentioned in the solutions already described above.

Za izvedbo izuma je uporabljen • razširitveni modul 2, ter dva standardna integrirana vezja:An extension module 2 and two standard integrated circuits are used to implement the invention:

• pomnilnik z dvema ločenima dostopoma 6 (Dual Port RAM - DPRAM) in • paketni upravitelj 4.• dual dual access memory 6 (Dual Port RAM - DPRAM) and • batch manager 4.

Razširitveni modul 2 je elektronsko vezje, ki ga sestavljajo različne elektronske komponente 3 in sicer v večji meri integrirana vezja. Z izrazom razširitveni modul je definirana implementacija elektronskih komponent 3 v skupno elektronsko vezje. Razširitveni modul je tako lahko del osnovnega elektronskega vezja ali pa je realiziran kot natična enota osnovnega elektronskega vezja. Funkcija razširitvenega modula 2 je obdelovnje govornih in podatkovnih paketov. Prednost uporabe razširitvenega modula 2 je to, da se lahko v njegovem sklopu uporabi različna integrirana vezja, namenjena obdelavi paketov, kar ima za posledico zelo fleksibilno rešitev. Med možna, integrirana vezja sodijo DSP procesorji ter namenska integrirana vezja.Expansion module 2 is an electronic circuit consisting of various electronic components 3, which are largely integrated circuits. The term expansion module defines the implementation of electronic components 3 into a common electronic circuit. The expansion module can thus be part of the basic electronic circuit or be implemented as a socket unit of the basic electronic circuit. The function of extension module 2 is to process voice and data packets. The advantage of using extension module 2 is that it can use a variety of integrated circuits for packet processing, resulting in a very flexible solution. Possible integrated circuits include DSP processors and dedicated integrated circuits.

Glavna lastnost DPRAM-a, v primeru izuma tudi prednost, je ta, da se ga priključi na dve ločeni vodili, tako da se lahko iz obeh vodil hkrati dostopa do pomnilnika 6. Ta lastnost je v izumu uporabljena na naslednji način: eno dostopno mesto je priklopljeno na zunanje procesorsko vodilo 10, po sliki 3, komunikacijskega procesorja 12, po sliki 3, drugo pa na razširitveno vodilo 8 do razširitvenega modula 2. DPRAM je torej uporabljen kot zunanji pomnilnik komunikacijskega procesoija 12, ki opravlja funkcijo medpomnilnika 6. V njem se shranjujejo paketi, ki se prenašajo med komunikacijskim procesorjem 12 in razširitvenim modulom 2. V primeru branja in pisanja v DPRAM iz razširitvenega modula 2, se do medpomnilnika 6 dostopa preko mesta, ki je priklopljen na razširitveno vodilo 8, kar pomeni, da to dejanje popolnoma nič ne obremenjuje zunanjega procesorskega vodila 10. Na ta način je odpravljena ena od pomankljivosti zgoraj opisanih obstoječih rešitev.The main feature of DPRAM, which is also an advantage in the invention, is that it is connected to two separate buses so that memory 6 can be accessed from both buses simultaneously. This property is used in the invention as follows: one accessible location is connected to the external processor bus 10 of Figure 3, the communication processor 12 of Figure 3, and the second to the expansion bus 8 to the expansion module 2. The DPRAM is thus used as the external memory of the communication processor 12, which performs the function of buffer 6. In it the packets that are transmitted between the communication processor 12 and the expansion module 2. are stored. In the case of reading and writing to DPRAM from the expansion module 2, the buffer 6 is accessed via a location connected to the expansion bus 8, which means that this action completely does not burden the external processor bus 10. This eliminates one of the disadvantages of the existing solutions described above.

Element izuma je tudi paketni upravitelj 4. Njegova naloga je prenašanje paketov med medpomnilnikom 6 ter elektronskim komponentami 3 na razširitvenem modulu 2, ki so namenjeni obdelavi paketov. To pomeni, da paketni upravitelj 4, opravlja celotno transakcijo paketov in s tem razbremeni jedro komunikacijskega procesorja 12. Izum odpravi še drugo pomankljivost, ki je bila omenjena pri obstoječih rešitvah. Zelo pomembna prednost izuma pred že realiziranimi rešitvami je to, da programska oprema, ki se izvaja na paketnem upravljalniku 4 ni enolično določena. To pomeni, da je ta izum primeren za implementacijo v različne sisteme, katerih opis sledi v podrobnem opisu izumov.An element of the invention is also a packet manager 4. Its function is to transmit packets between buffer 6 and electronic components 3 on the expansion module 2 for processing packets. This means that the packet manager 4 performs the entire packet transaction, thus relieving the core of the communication processor 12. The invention eliminates another deficiency mentioned in the existing solutions. A very important advantage of the invention over the solutions already realized is that the software running on the package controller 4 is not uniquely defined. This means that the present invention is suitable for implementation into various systems, the description of which follows in the detailed description of the inventions.

Kratek opis slikShort description of the pictures

Rešitve po izumu bodo postale poznavalcem tehnike bolj jasne in razvidne po pregledu sledečega podrobnega opisa skupaj s spremljajočimi shemami.The solutions of the invention will become clearer to those skilled in the art upon examination of the following detailed description, together with the accompanying schemes.

Slika 1: prikazuje stanje tehnike z uporabo namenskega integriranega vezja ASIC.Figure 1: Shows the state of the art using a dedicated ASIC integrated circuit.

Slika 2: prikazuje stanje tehnika s serijsko povezavo med komunikacijskim procesorjem inFigure 2: shows the state of the art with a serial connection between the communication processor and

DSP procesorji.DSP processors.

Slika 3: prikazuje postavitev ter povezavo vseh elementov, uporabljenih v izumu.Figure 3: shows the layout and connection of all the elements used in the invention.

Slika 4: prikazuje postopek za prenos paketov iz strani komunikacijskega procesorja do razširitvenega modula.Figure 4: shows the process for transferring packets from the communication processor side to the expansion module.

Slika 5: prikazuje postopek za prenos paketov iz strani razširitvenega modula do komunikacijskega procesorja.Figure 5: shows the procedure for transferring packets from the extension module page to the communication processor.

Podroben opis izumaDETAILED DESCRIPTION OF THE INVENTION

Za boljšo ponazoritev postopka izuma, je podrobno opisan postopek prenosa paketov v smeri iz komunikacijskega procesorja v razširitveni modul ter v obratno. Glede na prikazane zmožnosti, zmogljivosti ter prednosti se ponuja kar nekaj možnih načinov uporabe. Opisana sta tudi dva primera uporabe, vendar se za uporabo izuma ne gre omejevati samo na opisana primera.In order to better illustrate the process of the invention, the process of transferring packets in the direction from the communication processor to the expansion module and vice versa is described in detail. Depending on the capabilities, capabilities and advantages shown, there are several possible uses. Two use cases are also described, but the use of the invention is not limited to the described examples.

Opis postopkaProcedure description

Kot je bilo razvidno iz splošnega opisa izuma, je postopek sestavljen iz dveh delov, ki se izvajata istočasno. En del postopka je prenos paketov iz komunikacijskega procesorja do razširitvenega modula, drugi del pa prenos paketov iz razširitvenega modula do komunikacijskega procesorja. Oba dela postopka se izvajata istočasno, zato sta tudi začetka 60 in 80 istočasna in enkratna dogodka. V ta namen sta narisani dve shemi, in sicer slika 4 ter slika 5, ki prikazujeta omenjena dela postopka, navezujeta pa se na sliko 3, ki prikazuje postavitev ter povezavo vseh elementov, uporabljenih v izumu. Postopek bo za oba dela opisan po posameznih stanjih ki so na slikah 4 in 5 oštevilčeni.As has been shown in the general description of the invention, the process consists of two parts which are performed simultaneously. One part of the process is the transfer of packets from the communication processor to the expansion module, and the other part is the transfer of packets from the expansion module to the communication processor. Both parts of the process are performed at the same time, so the beginnings of 60 and 80 are simultaneous and one-off events. To this end, two diagrams are drawn, namely Fig. 4 and Fig. 5, which show the aforementioned parts of the process, and relate to Fig. 3, which shows the layout and connection of all the elements used in the invention. The procedure for both parts will be described by the individual states, which are numbered in Figures 4 and 5.

Postopek prenosa paketa iz komunikacijskega procesorja 12 do razširitvenega modula 2 poteka na sledeči način. Po začetku 60 izvajanja postopka, komunikacijski procesor 12 preide v stanje čakanja na prispeli paket 62, ter v njej ostane dokler ne prejme novega paketa. Ko komunikacijski procesor 12 prejme nov paket, ki ustreza pogojem za prenos, ga preneseshrani 64 neposredno v medpomnilnik 6, ter zatem signalizira 66 paketnemu upravitelju 4 o prispelem paketu. Namesto signalizacije 66 o prispelem paketu, lahko paketni upravitelj 4 tudi sam pregleduje pakete v medpomnilniku in pripravljenega prenese v .The process of transferring a packet from communication processor 12 to expansion module 2 is as follows. After starting the process 60, the communication processor 12 enters the waiting state of the received packet 62, and remains in it until it receives a new packet. When the communication processor 12 receives a new packet that is eligible for download, it transfers 64 directly to buffer 6, and then signals 66 to the packet manager 4 about the packet received. Instead of signaling 66 about a received packet, the packet manager 4 can also inspect the packets in the buffer itself and transfer the prepared packet to.

Paketni upravitelj 4 paket prenese 68 v razširitveni modul. S tem ke prenos paketa končan in se ponovno začne odvijati iz stanja čakanja na nov paket 62.Package Manager 4 transfers the package 68 to the extension module. This completes the packet transfer and restarts from the standby mode of the new packet 62.

Postopek prenosa paketa iz razširitvenega modula 2 do kominikacijskega procesorja 12 poteka na sledeči način. Po začetku 80 izvajanja postopka začne paketni upravitelj 4 z iskanjem 82 pripravljenega paketa na razširitvenem modulu. V stanju 84 paketni upravitelj 4 preveri vsak paket. Če paket ni pripravljen se vrne na iskanje 82 novega paketa, če pa je paket pripravljen ga prenese 86 v medpomnilnik 6. Ko se paket že nahaja v medpomnilniku 6 paketni upravitelj signalizira komunikacijskemu procesoiju 12 o prenesenem paketu. Če komunikacijski procesor ne (12) uporablja načina signalizacije, lahko tudi sam pregleduje pakete shranjene v medpomnilniku (6), ter ugotovi kateri paket je nov. Po tem dejanju se postopek vrne na iskanje 82 novega pripravljenega paketa.The process of transferring a packet from expansion module 2 to the communication processor 12 is as follows. After starting the process 80, the packet manager 4 starts by finding 82 prepared packets on the extension module. In state 84, packet manager 4 checks each packet. If the package is not ready, it returns to search for 82 new packages, but if the package is ready, it is transferred by 86 to buffer 6. When the package is already in buffer 6, the packet manager signals to the communication process 12 about the downloaded packet. If the communication processor does not (12) use the signaling mode, it may also scan the packets stored in the buffer (6) and determine which packet is new. After this action, the process returns to finding 82 a newly prepared package.

Prenos govornih paketovDownload voice packs

Prenos govornih paketov je zelo pogosta funkcija, ki jo morajo opravljati elektronska vezja v sodobnih telekomunikacijskih sistemih, ki jih sestavljajo podatkovna in telekomunikacijska omrežja. Uporaba izuma v tem primeru omogoča bistveno povečanje zmogljivosti elektronskega vezja v smislu povečanja kapacitete pretoka govornih podatkov in s tem povečanje števila govornih kanalov, kijih lahko vezje obdela.The transmission of voice packets is a very common function that electronic circuits have to perform in modern telecommunications systems consisting of data and telecommunications networks. The use of the invention in this case makes it possible to significantly increase the capacity of the electronic circuit in terms of increasing the flow capacity of voice data and thereby increasing the number of voice channels the circuit can process.

Tipična naloga, ki jo uporabljajo taka elektronska vezja je prenos govornih paketov med paketnim podatkovnim omrežjem 16, po sliki 3, (IP - Internet Protocol; ATM Asynchronous Transfer Mode) ter sinhronim telekomunikacijskim omrežjem 14, po sliki 3, (TDM - Time Division Multiplexing). Govorni podatki v sinhronem omrežju 14 so časovno multipleksirani vzorci zvoka in se prenašajo v 125ps dolgih zaporednih okvirjih, znotraj katerih je določeno število kanalov velikosti 8 bitov. Če pomnožimo velikost kanala (8 bitov) s pogostostjo okvirjev (1 /125ps) dobimo hitrost 64kbit/s na govorni kanal. Posamezni kanal znotraj okvira predstavlja en telefonski pogovor, število kanalov v okvirju pa predstavlja kapaciteto telefonske linije. Podatki v paketnih omrežjih so razporejeni na drugračen način. Celotni podatkovni promet se prenaša v točno definiranih paketih, odvisni od tipa omrežja. Paket je sestavljen iz točno definirane glave, ki prenaša potrebne podatke o vsebini ter o naslovih pošiljatelja in prejemnika, ter iz polnila v katerem je vsebovana dejanska vsebina. V primeru govornega paketa je ta vsebina po določenih standardih (CODEC - Coding Decoding) zakodiran govor. Ker oblika podatkov v omenjenih omrežjih ni enaka, je potrebno pred prenosom paketa med omrežji, le tega ustrezno preoblikovati. V ta namen se uporabljajo programski paketi, ki se v večini primerov izvajajo na DSP procesorjih.A typical task used by such electronic circuits is the transmission of voice packets between the packet data network 16, in Figure 3, (IP - Internet Protocol; ATM Asynchronous Transfer Mode) and synchronous telecommunications network 14, in Figure 3, (TDM - Time Division Multiplexing ). Voice data in synchronous network 14 is time-multiplexed sound patterns and is transmitted in 125ps long sequential frames, within which a number of 8-bit channels are specified. Multiplying the channel size (8 bits) by the frame rate (1 / 125ps) gives a speed of 64kbit / s per voice channel. Each channel within a frame represents one telephone conversation and the number of channels in a frame represents the capacity of a telephone line. Data in packet networks is arranged in a different way. All data traffic is transmitted in exactly defined packets, depending on the type of network. The package consists of a well-defined header that transmits the necessary content information as well as the sender and recipient addresses, as well as a filler containing the actual content. In the case of a speech pack, this content is encoded speech by certain standards (CODEC - Coding Decoding). Since the format of the data in the aforementioned networks is not the same, it is necessary to reformulate it before transferring the packet between the networks. For this purpose, software packages are used, which in most cases run on DSP processors.

V tej izvedbi izuma je potrebno prilagoditi razširitveni modul 2 na tak način, da bo sposoben obdelovati zgoraj opisane govorne pakete. V ta namen se za elektronske elemente 3 na razširitvenem modulu 2 uporabi DSP procesorje. Programska oprema za obdelavo govornih paketov je že realizirana, ponujajo pa jo različni proizvajalci v različnih izvedbah. V tem primeru se pokaže prednost rešitve s prilagodljivim razširitvenim modulom 2, saj različni proizvajalci programske opreme za obdelavo govornih paketov podpirajo različne DSP procesorje, ali pa imajo na voljo celo svoje izvedenke le teh.In this embodiment of the invention, it is necessary to adjust the expansion module 2 in such a way that it will be able to process the speech packets described above. For this purpose, DSP processors are used for electronic elements 3 on extension module 2. Speech packet processing software is already implemented and is offered by different manufacturers in different implementations. In this case, the solution with the flexible extension module 2 is shown to be advantageous because different manufacturers of voice packet software support different DSP processors, or even have their own versions of them.

Za prenos govornih paketov med komunikacijskim procesorjem 12 in DSP procesorji na razširitvenem modulu 2 se uporabi paketni upravitelj 4, ki preko medpomnilnika 6 po razširitvenem vodilu 8 prenaša govorne pakete. Zaradi možne uporabe različnih DSP procesorjev je potrebno prilagoditi tudi način prenosa govornih paketov. Zaradi prilagodljivosti paketnega upravitelja je potrebno prilagoditi samo programsko opremo, ki jo le ta izvaja, tako da ustreza izbranemu tipu DSP procesorjev.For the transmission of voice packets between the communication processor 12 and the DSP processors on the expansion module 2, a packet manager 4 is used, which transmits the voice packets via buffer 6 through the expansion bus 8. Due to the possible use of different DSP processors, it is also necessary to adjust the way voice packets are transferred. Due to the flexibility of the batch manager, it is only necessary to customize the software that it runs to fit the type of DSP processors selected.

Prenos paketa iz paketnega omrežja 16 v sinhrono omrežje 14 poteka na sledeči način. Ko komunikacijski procesor 12 sprejme paket iz paketnega omrežja 16, najprej pregleda njegovo glavo. Če je v njej zapisano, da gre za paket z govorno vsebino, ga prenese v DPRAM medpomnilnik 6. Paketni upravitelj 4 ta paket preko razširitvenega vodila 8 prenese v notranji pomnilnik enega izmed DSP procesorjev na razširitvenem modulu 2. DSP procesor paketu odstrani glavo, polnilo dekodira ter kot 64kbit/s pulzno moduliran govor odda v sinhrono omrežje.The packet is transferred from packet network 16 to synchronous network 14 as follows. When communication processor 12 receives a packet from packet network 16, it first scans its head. If it states that it is a packet of spoken content, it transfers it to DPRAM buffer 6. Packet Manager 4 transfers this packet via the expansion bus 8 to the internal memory of one of the DSP processors on expansion module 2. The DSP processor removes the pack header it decodes and transmits pulse-modulated speech to a synchronous network at 64kbps.

Iz opisa primera je razvidno da je osnovni sistem za prenos in obdelavo govornih paketov povsem neodvisen od izbire proizvajalca programske opreme ter od izbire DSP procesorjev za obdelavo govornih kanalov.The description of the example shows that the basic system for the transmission and processing of voice packets is completely independent of the choice of the software manufacturer and the choice of DSP processors for voice channel processing.

Preusmerjanje paketovPacket redirection

Uporaba izuma za preusmerjnja paketov je prav tako zelo smotrna, saj ponuja veliko fleksibilnost ter možnost hitrega prilagajanja novim standardom na komunikacijskem področju, hkrati pa ponuja veliko hitrost preusmerjanja.The use of the invention for packet redirection is also very useful as it offers great flexibility and the ability to quickly adapt to new standards in the communication field, while offering great speed of redirection.

V tem primeru preusmerjanje temelji na preusmerjanju med IP paketnim omrežjem ter ATM paketnim omrežjem. Za to izvedbo izuma je potrebno prilagoditi razširitveni modul 2 na tak način, da bo sposoben preusmeriti čim večje število. V ta namen se uporabi kombinacijo DSP procesorjev ter namenskega integriranega vezja. V namenskem integriranem vezju realiziramo željeno funkcionalnost (protokol), na tak način, da napišemo ustrezno programsko opremo, ki se bo izvajala v vezju.In this case, the diversion is based on the diversion between the IP packet network and the ATM packet network. For this embodiment of the invention, it is necessary to adjust the expansion module 2 in such a way that it will be able to divert as many as possible. A combination of DSP processors and a dedicated integrated circuit are used for this purpose. In the dedicated integrated circuit, we realize the desired functionality (protocol) in such a way that we write the appropriate software that will be implemented in the circuit.

Preusmerjanje paketov poteka na naslednji način. Komunikacijski procesor 12 sprejme pakete, ki so sestavljeni iz glave in polnila, iz paketnega omrežja 16 (IP ali ATM) ter jih, preko zunanjega vodila 10 shrani neposredno v medpomnilnik 6. Paketni upravitelj 4 preko razširitvenega vodila 8 podatke prenese v razširitveni modul 2, ki paket ustrezno obdela ter preoblikuje glavo paketa, medtem ko polnilo ostane nespremenjeno. Obdelan paket paketni upravitelj 4 prenese preko razširitvenega vodila 8 nazaj v medpomnilnik 6, kjer je na voljo komunikacijskemu procesorju 12, da ga odda na zahtevan naslov v drugo paketno omrežje (ATM ali IP) omrežje. Zaradi možne uporabe različnih DSP procesorjev ter različne realizirane funkcije v namenskem integriranem vezju je potrebno prilagoditi tudi način prenosa paketov. Zaradi prilagodljivosti paketnega upravitelja je potrebno prilagoditi samo programsko opremo, ki jo le ta izvaja, tako da ustreza izbranemu tipu DSP procesorjev oziroma namenskem integriranem vezju.Packet redirection is as follows. The communication processor 12 receives packets consisting of header and filler from the packet network 16 (IP or ATM) and stores them directly to buffer 6 via the external bus 10. The packet manager 4 transmits the data to the expansion module 2 via the expansion bus 8, which appropriately processes the package and reshapes the package while the filler remains unchanged. The processed packet is transmitted by the packet manager 4 via the expansion bus 8 back to buffer 6, where it is available to the communication processor 12 to be transmitted to the requested address in another packet network (ATM or IP) network. Due to the possible use of different DSP processors and different realized functions in a dedicated integrated circuit, it is also necessary to adjust the packet transfer method. Due to the flexibility of the batch manager, it is only necessary to adjust the software it executes to suit the type of DSP processors or dedicated integrated circuit.

V tem primeru možno zagotoviti tudi to, da elementi na razširitvenem modulu, preko FPGA vezja, sami dostopajo do medpomnilnika 6, kar preusmerjanje paketov še pohitri. Na ta način dosežemo, da je osnovni sistem za preusmerjanje paketov povsem neodvisen od izbire elektronskih elementov (DSP procesorji in namensko integrirano vezje) na razširitvenem modulu 6 ter od izbire funkcionalnosti (protokola), ki jo opravlja le ta.In this case, it is also possible to ensure that the elements on the expansion module access the buffer 6 via the FPGA circuit, which further speeds up packet routing. In this way, the basic system for packet redirection is completely independent of the choice of electronic elements (DSP processors and dedicated integrated circuit) on the extension module 6 and the choice of functionality (protocol) performed by it.

Claims (7)

PATENTNI ZAHTEVKIPATENT APPLICATIONS 1. Postopek prenosa paketov med komunikacijskim procesorjem in razširitvenim modulom, označen s tem, da sta za postopek prenosa paketov uporabljena medpomnilnik (6) in paketni upravitelj , pri čemer po začetku (60) izvajanja postopa, komunikacijski procesor (12) čaka v stanju (62) na novi paket, če novi prispeli paket ustreza pogojem za prenos, ga komunikacijski procesor (12) shrani neposredno v medpomnilnik (6), komunikacijski procesor (12) signalizira (66) paketnemu upravitelju (4) o prispelem paketu, če ni uporabljen način signalizacija (66) za obveščanje o novih paketih, lahko paketni upravitelj (4) sam pregleduje pakete shranjene v medpomnilniku (6), ko ima paketni upravitelj (4) informacijo o novem paketu v medpomnilniku (6), ga prenese (68) pripravljenega v razširitveni modul (2), ko je prenos (68) končan se postopek vrne v stanje (62), ko komunikacijski procesor (12) čaka na novi paket.A process for transferring packets between a communication processor and an expansion module, characterized in that a buffer (6) and a packet manager are used for the packet transfer process, and, after initiation (60) of the process, the communication processor (12) waits in state ( 62) to a new packet, if the new packet arrives meets the transfer conditions, the communication processor (12) saves it directly to the buffer (6), the communication processor (12) signals (66) to the packet manager (4) about the packet not received signaling mode (66) for notification of new packets, the packet manager (4) can inspect packets stored in the buffer (6) by itself when the packet manager (4) has information about the new packet in the buffer (6), transmits it (68) ready in the expansion module (2), when the transmission (68) is complete, the process returns to the state (62) when the communication processor (12) is waiting for a new packet. 2. Postopek prenosa paketov med komunikacijskim procesorjem in razširitvenim modulom, označen s tem, da sta za postopek prenosa paketov uporabljena medpomnilnik (6) in paketni upravitelj , pri čemer po začetku (80) izvajanja postopka začne paketni upravitelj (4) z iskanjem (82) pripravljenega paketa v razširitvenem modulu (2), pri vsakem paketu preide v stanje (84) kjer preveri če je paket pripravljen, če paket ni pripravljen se paketni upravitelj (4) vrne na iskanje (82) novega paketa, če je paket pripravljen ga paketni upravitelj (4) prenese (86) v medpomnilnik (6), ko se paket nahaja v medpomnilniku (6), paketni upravitelj (4) signalizira komunikacijskemu procesoiju (12) o prispelem paketu, če komunikacijski procesor ne (12) uporablja načina signalizacije, lahko tudi sam pregleduje pakete shranjene v medpomnilniku (6), ter ugotovi kateri paket je nov, ko je paket shranjen v medpomnilniku (6), se paketni upravitelj vrne na iskanje (82) pripravljenega paketa v razširitvenem modulu (2).2. A packet transfer process between a communication processor and an expansion module, characterized in that the packet transfer process (6) and the packet manager are used for the packet transfer process, and after the start (80) the packet manager (4) starts searching (82) ) of the prepared package in the extension module (2), for each package it goes to state (84) where it checks if the package is ready, if the package is not ready, the package manager (4) returns to search (82) for a new package if the package is ready the packet manager (4) transmits (86) to the buffer (6), when the packet is in the buffer (6), the packet manager (4) signals to the communication procession (12) about the received packet if the communication processor does not (12) use the signaling mode , it can also inspect packets stored in the buffer (6) itself, and determine which packet is new when the packet is stored in the buffer (6), the packet manager returns to search (82) the prepared packet in the extensions m module (2). 3. Priprava za prenos paketov med komunikacijskim procesorjem in razširitvenim modulom, označena s tem, da izvaja postopke po zahtevkih 1 in 2.3. A packet transmission device between the communication processor and the expansion module, characterized in that it performs the procedures of claims 1 and 2. 4. Priprava za prenos paketov med komunikacijskim procesorjem in razširitvenim modulom, označena s tem, da so za prenos paketov uporabljeni medpomnilnik (6), paketni upravitelj (4) ter razširitveni modul (2).4. Package preparation device between the communication processor and the expansion module, characterized in that a buffer (6), a packet manager (4), and an expansion module (2) are used to transfer the packets. 5. Priprava po zahtevku 4, označena s tem, da je za realizacijo medpomnilnika (6) uporabljen pomnilnik z dvema ločenima dostopoma (DPRAM);Device according to claim 4, characterized in that two separate access memory (DPRAM) is used to realize the buffer (6); da je medpomnilnik (6) z enim dostopnim mestom priključen na zunanje vodilo komunikacijskega procesoma (12) in z drugim dostopnim mestom na razširitveno vodilo (8).that the buffer (6) with one access point is connected to the external bus of the communication process (12) and with another access point to the expansion bus (8). 6. Priprava po zahtevku 4, označena s tem, daje za realizacijo paketnega upravitelja (4) uporabljen integrirano vezje;Device according to claim 4, characterized in that an integrated circuit is used to realize the packet controller (4); daje pa paketni upravitelj (4) priključen na razširitveno vodilo (8).however, the packet manager (4) is connected to the extension bus (8). 7. Priprava po zahtevku 4, označena s tem, da razširitveni modul (2) pomeni način implementacije elektronskih komponent (3);Device according to claim 4, characterized in that the expansion module (2) is a means of implementing electronic components (3); da je za realizacijo razširitvenega modula (2) uporabljen ali del osnovnega elektronskeg vezja ali natično elektronsko vezje, na katerega je možno vključiti različne elektronske komponente (3);that a part of the basic electronic circuit or a plug-in electronic circuit can be used to realize the expansion module (2) to which various electronic components (3) can be connected; da se za možne elektronske komponente (3) smatra eden ali več digitalnih signalnih procesorjev (DSP) in eno ali več namenskih integriranih vezij; daje razširitveni modul priključen na razširitveno vodilo (8).that one or more digital signal processors (DSPs) and one or more dedicated integrated circuits are considered as possible electronic components (3); the expansion module is connected to the extension bus (8).
SI200000312A 2000-12-08 2000-12-08 Procedure and arrangement for the transmission of data and voice packages between packet data and synchronous netvork SI20398A (en)

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