SG61893G - Forming tungsten structures - Google Patents
Forming tungsten structuresInfo
- Publication number
- SG61893G SG61893G SG61893A SG61893A SG61893G SG 61893 G SG61893 G SG 61893G SG 61893 A SG61893 A SG 61893A SG 61893 A SG61893 A SG 61893A SG 61893 G SG61893 G SG 61893G
- Authority
- SG
- Singapore
- Prior art keywords
- forming tungsten
- tungsten structures
- structures
- forming
- tungsten
- Prior art date
Links
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical group [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
- H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/4827—Materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Manufacturing & Machinery (AREA)
- Plasma & Fusion (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Drying Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US6226187A | 1987-06-12 | 1987-06-12 |
Publications (1)
Publication Number | Publication Date |
---|---|
SG61893G true SG61893G (en) | 1993-07-09 |
Family
ID=22041302
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG61893A SG61893G (en) | 1987-06-12 | 1993-05-10 | Forming tungsten structures |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP0295135B1 (fr) |
JP (1) | JP2585064B2 (fr) |
DE (1) | DE3878996T2 (fr) |
HK (1) | HK77093A (fr) |
SG (1) | SG61893G (fr) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CA2004281A1 (fr) * | 1988-12-09 | 1990-06-09 | Nun-Sian Tsai | Gravure des couches metalliques de dispositifs a circuits integres et dispositifs resultants |
US5338702A (en) * | 1993-01-27 | 1994-08-16 | International Business Machines Corporation | Method for fabricating tungsten local interconnections in high density CMOS |
US5439847A (en) * | 1993-11-05 | 1995-08-08 | At&T Corp. | Integrated circuit fabrication with a raised feature as mask |
US5882992A (en) * | 1994-08-25 | 1999-03-16 | International Business Machines Corporation | Method for fabricating Tungsten local interconnections in high density CMOS circuits |
JPH08186120A (ja) * | 1994-12-28 | 1996-07-16 | Nec Corp | 半導体装置の製造方法 |
JP4913345B2 (ja) * | 2004-01-26 | 2012-04-11 | 株式会社ミツトヨ | 反射型光電式エンコーダ用スケール、スケールの製造方法及び光電式エンコーダ |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4289834A (en) * | 1977-10-20 | 1981-09-15 | Ibm Corporation | Dense dry etched multi-level metallurgy with non-overlapped vias |
-
1988
- 1988-06-09 JP JP14272888A patent/JP2585064B2/ja not_active Expired - Lifetime
- 1988-06-10 DE DE19883878996 patent/DE3878996T2/de not_active Expired - Fee Related
- 1988-06-10 EP EP88305344A patent/EP0295135B1/fr not_active Expired - Lifetime
-
1993
- 1993-05-10 SG SG61893A patent/SG61893G/en unknown
- 1993-07-29 HK HK77093A patent/HK77093A/xx not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
JPS6413741A (en) | 1989-01-18 |
EP0295135B1 (fr) | 1993-03-10 |
DE3878996T2 (de) | 1993-10-07 |
JP2585064B2 (ja) | 1997-02-26 |
HK77093A (en) | 1993-08-06 |
EP0295135A1 (fr) | 1988-12-14 |
DE3878996D1 (de) | 1993-04-15 |
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