SG11202109008YA - Patterned wafer solder diffusion barrier - Google Patents
Patterned wafer solder diffusion barrierInfo
- Publication number
- SG11202109008YA SG11202109008YA SG11202109008YA SG11202109008YA SG11202109008YA SG 11202109008Y A SG11202109008Y A SG 11202109008YA SG 11202109008Y A SG11202109008Y A SG 11202109008YA SG 11202109008Y A SG11202109008Y A SG 11202109008YA SG 11202109008Y A SG11202109008Y A SG 11202109008YA
- Authority
- SG
- Singapore
- Prior art keywords
- diffusion barrier
- patterned wafer
- solder diffusion
- wafer solder
- patterned
- Prior art date
Links
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- H01L2224/32012—Structure relative to the bonding area, e.g. bond pad
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/1026—Compound semiconductors
- H01L2924/1027—IV
- H01L2924/10272—Silicon Carbide [SiC]
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US16/363,072 US10861792B2 (en) | 2019-03-25 | 2019-03-25 | Patterned wafer solder diffusion barrier |
PCT/US2020/020074 WO2020197685A1 (en) | 2019-03-25 | 2020-02-27 | Patterned wafer solder diffusion barrier |
Publications (1)
Publication Number | Publication Date |
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SG11202109008YA true SG11202109008YA (en) | 2021-09-29 |
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SG11202109008YA SG11202109008YA (en) | 2019-03-25 | 2020-02-27 | Patterned wafer solder diffusion barrier |
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US (1) | US10861792B2 (en) |
EP (1) | EP3948942A1 (en) |
JP (1) | JP7308280B2 (en) |
KR (1) | KR102538777B1 (en) |
SG (1) | SG11202109008YA (en) |
TW (1) | TWI745880B (en) |
WO (1) | WO2020197685A1 (en) |
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CN113823613B (en) * | 2021-11-24 | 2022-02-15 | 深圳市时代速信科技有限公司 | Semiconductor device and method for manufacturing semiconductor device |
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US5027189A (en) * | 1990-01-10 | 1991-06-25 | Hughes Aircraft Company | Integrated circuit solder die-attach design and method |
JP3350152B2 (en) | 1993-06-24 | 2002-11-25 | 三菱電機株式会社 | Semiconductor device and method of manufacturing the same |
US5646426A (en) | 1995-12-12 | 1997-07-08 | Santa Barbara Research Center | Contact metal diffusion barrier for semiconductor devices |
US5668054A (en) | 1996-01-11 | 1997-09-16 | United Microelectronics Corporation | Process for fabricating tantalum nitride diffusion barrier for copper matallization |
EP0793269B1 (en) | 1996-02-28 | 2002-05-15 | Koninklijke Philips Electronics N.V. | Semiconductor device having a chip with via hole soldered on a support, and its method of fabrication |
JPH11238870A (en) * | 1998-02-20 | 1999-08-31 | Nec Corp | Semiconductor device and manufacture thereof |
US6624500B2 (en) * | 2000-11-30 | 2003-09-23 | Kyocera Corporation | Thin-film electronic component and motherboard |
US6614117B1 (en) | 2002-06-04 | 2003-09-02 | Skyworks Solutions, Inc. | Method for metallization of a semiconductor substrate and related structure |
US8987137B2 (en) * | 2010-12-16 | 2015-03-24 | Lsi Corporation | Method of fabrication of through-substrate vias |
US20130193575A1 (en) * | 2012-01-27 | 2013-08-01 | Skyworks Solutions, Inc. | Optimization of copper plating through wafer via |
TW201434124A (en) * | 2013-02-23 | 2014-09-01 | Wavetek Microelectronics Corp | Semiconductor structure and method of manufacturing the same |
US8970010B2 (en) * | 2013-03-15 | 2015-03-03 | Cree, Inc. | Wafer-level die attach metallization |
JP6277693B2 (en) * | 2013-11-29 | 2018-02-14 | 三菱電機株式会社 | Semiconductor device |
US10115688B2 (en) * | 2015-05-29 | 2018-10-30 | Infineon Technologies Ag | Solder metallization stack and methods of formation thereof |
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- 2020-02-27 SG SG11202109008YA patent/SG11202109008YA/en unknown
- 2020-02-27 EP EP20713795.1A patent/EP3948942A1/en active Pending
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JP2022523791A (en) | 2022-04-26 |
US10861792B2 (en) | 2020-12-08 |
KR102538777B1 (en) | 2023-06-01 |
US20200312776A1 (en) | 2020-10-01 |
TW202105610A (en) | 2021-02-01 |
TWI745880B (en) | 2021-11-11 |
WO2020197685A1 (en) | 2020-10-01 |
KR20210124327A (en) | 2021-10-14 |
EP3948942A1 (en) | 2022-02-09 |
JP7308280B2 (en) | 2023-07-13 |
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