SG11202004684WA - Microelectronic assemblies - Google Patents

Microelectronic assemblies

Info

Publication number
SG11202004684WA
SG11202004684WA SG11202004684WA SG11202004684WA SG11202004684WA SG 11202004684W A SG11202004684W A SG 11202004684WA SG 11202004684W A SG11202004684W A SG 11202004684WA SG 11202004684W A SG11202004684W A SG 11202004684WA SG 11202004684W A SG11202004684W A SG 11202004684WA
Authority
SG
Singapore
Prior art keywords
microelectronic assemblies
microelectronic
assemblies
Prior art date
Application number
SG11202004684WA
Inventor
Shawna Liff
Adel Elsherbini
Johanna Swan
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of SG11202004684WA publication Critical patent/SG11202004684WA/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/19Manufacturing methods of high density interconnect preforms
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5389Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293Organic, e.g. plastic
    • H01L23/295Organic, e.g. plastic containing a filler
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    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
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    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5384Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
SG11202004684WA 2017-12-29 2017-12-29 Microelectronic assemblies SG11202004684WA (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US2017/068905 WO2019132960A1 (en) 2017-12-29 2017-12-29 Microelectronic assemblies

Publications (1)

Publication Number Publication Date
SG11202004684WA true SG11202004684WA (en) 2020-07-29

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Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3449502B1 (en) 2016-04-26 2021-06-30 Linear Technology LLC Mechanically-compliant and electrically and thermally conductive leadframes for component-on-package circuits
US11335642B2 (en) * 2017-12-29 2022-05-17 Intel Corporation Microelectronic assemblies
US10497635B2 (en) 2018-03-27 2019-12-03 Linear Technology Holding Llc Stacked circuit package with molded base having laser drilled openings for upper package
EP3633721A1 (en) * 2018-10-04 2020-04-08 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Component carrier with face-up and face-down embedded components
US11410977B2 (en) 2018-11-13 2022-08-09 Analog Devices International Unlimited Company Electronic module for high power applications
US11158690B1 (en) * 2019-02-21 2021-10-26 Facebook Technologies, Llc Low cost micro OLED structure and method
EP3779391A1 (en) * 2019-08-14 2021-02-17 Sciosense B.V. Sensor arrangement and method for fabricating a sensor arrangement
KR20210020640A (en) * 2019-08-16 2021-02-24 삼성전자주식회사 Semiconductor package
US11844178B2 (en) 2020-06-02 2023-12-12 Analog Devices International Unlimited Company Electronic component
CN111968944A (en) * 2020-08-24 2020-11-20 浙江集迈科微电子有限公司 Ultrathin stacking process for radio frequency module
US11990448B2 (en) * 2020-09-18 2024-05-21 Intel Corporation Direct bonding in microelectronic assemblies
US20220093517A1 (en) * 2020-09-18 2022-03-24 Intel Corporation Direct bonding in microelectronic assemblies
JPWO2022210616A1 (en) * 2021-03-31 2022-10-06
US20220399249A1 (en) * 2021-06-14 2022-12-15 Intel Corporation Liquid cooled interposer for integrated circuit stack

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100870652B1 (en) 2007-07-24 2008-11-26 삼성전기주식회사 Semiconductor package and fabricating method therefore
US20140133105A1 (en) * 2012-11-09 2014-05-15 Nvidia Corporation Method of embedding cpu/gpu/logic chip into a substrate of a package-on-package structure
US9673131B2 (en) * 2013-04-09 2017-06-06 Intel Corporation Integrated circuit package assemblies including a glass solder mask layer
US9318452B2 (en) * 2014-03-21 2016-04-19 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor packages and methods of forming the same
US9601463B2 (en) * 2014-04-17 2017-03-21 Taiwan Semiconductor Manufacturing Company, Ltd. Fan-out stacked system in package (SIP) and the methods of making the same
US9881904B2 (en) * 2014-11-05 2018-01-30 Massachusetts Institute Of Technology Multi-layer semiconductor devices fabricated using a combination of substrate and via structures and fabrication techniques
US9583472B2 (en) 2015-03-03 2017-02-28 Apple Inc. Fan out system in package and method for forming the same
US9831148B2 (en) * 2016-03-11 2017-11-28 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated fan-out package including voltage regulators and methods forming same
US10062727B2 (en) * 2016-09-09 2018-08-28 Microsoft Technology Licensing, Llc Strain relieving die for curved image sensors
US11335642B2 (en) * 2017-12-29 2022-05-17 Intel Corporation Microelectronic assemblies

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