SG11202000385TA - Dynamic link error protection in memory systems - Google Patents

Dynamic link error protection in memory systems

Info

Publication number
SG11202000385TA
SG11202000385TA SG11202000385TA SG11202000385TA SG11202000385TA SG 11202000385T A SG11202000385T A SG 11202000385TA SG 11202000385T A SG11202000385T A SG 11202000385TA SG 11202000385T A SG11202000385T A SG 11202000385TA SG 11202000385T A SG11202000385T A SG 11202000385TA
Authority
SG
Singapore
Prior art keywords
dynamic link
memory systems
error protection
link error
protection
Prior art date
Application number
SG11202000385TA
Other languages
English (en)
Inventor
Jungwon Suh
Alain Artieri
Dexter Tamio Chun
Deepti Vijayalakshmi Sriramagiri
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of SG11202000385TA publication Critical patent/SG11202000385TA/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/38—Response verification devices
    • G11C29/42—Response verification devices using error correcting codes [ECC] or parity check
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1044—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices with specific ECC/EDC distribution
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0614—Improving the reliability of storage systems
    • G06F3/0619—Improving the reliability of storage systems in relation to data integrity, e.g. data losses, bit errors
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0659—Command handling arrangements, e.g. command buffers, queues, command scheduling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G06F3/068—Hybrid storage device

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Human Computer Interaction (AREA)
  • Computer Security & Cryptography (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
SG11202000385TA 2017-08-21 2018-06-28 Dynamic link error protection in memory systems SG11202000385TA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US15/682,533 US10387242B2 (en) 2017-08-21 2017-08-21 Dynamic link error protection in memory systems
PCT/US2018/039978 WO2019040183A1 (en) 2017-08-21 2018-06-28 PROTECTION AGAINST DYNAMIC LINK ERRORS IN MEMORY SYSTEMS

Publications (1)

Publication Number Publication Date
SG11202000385TA true SG11202000385TA (en) 2020-03-30

Family

ID=63080492

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11202000385TA SG11202000385TA (en) 2017-08-21 2018-06-28 Dynamic link error protection in memory systems

Country Status (7)

Country Link
US (2) US10387242B2 (es)
EP (1) EP3673374B1 (es)
CN (2) CN110998536B (es)
ES (1) ES2895367T3 (es)
SG (1) SG11202000385TA (es)
TW (1) TWI787299B (es)
WO (1) WO2019040183A1 (es)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10387242B2 (en) 2017-08-21 2019-08-20 Qualcomm Incorporated Dynamic link error protection in memory systems
US11537464B2 (en) * 2019-06-14 2022-12-27 Micron Technology, Inc. Host-based error correction
KR20210014473A (ko) * 2019-07-30 2021-02-09 에스케이하이닉스 주식회사 메모리 시스템 및 메모리 시스템의 라이트 방법
US11372717B2 (en) * 2019-08-30 2022-06-28 Qualcomm Incorporated Memory with system ECC
US11728003B2 (en) * 2020-05-12 2023-08-15 Qualcomm Incorporated System and memory with configurable error-correction code (ECC) data protection and related methods
KR20240115671A (ko) * 2023-01-19 2024-07-26 삼성전자주식회사 인코딩 데이터를 전송하는 전자 장치, 및 이의 동작하는 방법

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2765425B1 (fr) 1997-06-26 2000-06-09 Bull Sa Procede de detection d'erreurs sur une liaison serie d'un circuit integre et dispositif de mise en oeuvre du procede
US7028213B2 (en) * 2001-09-28 2006-04-11 Hewlett-Packard Development Company, L.P. Error indication in a raid memory system
US7180947B2 (en) 2003-03-31 2007-02-20 Planning Systems Incorporated Method and apparatus for a dynamic data correction appliance
KR100606577B1 (ko) 2004-07-29 2006-07-28 삼성전자주식회사 직렬 에이티에이 인터페이스의 데이터 전송속도 조절장치및 그 방법
US7831882B2 (en) 2005-06-03 2010-11-09 Rambus Inc. Memory system with error detection and retry modes of operation
US7562285B2 (en) 2006-01-11 2009-07-14 Rambus Inc. Unidirectional error code transfer for a bidirectional data link
US7774684B2 (en) 2006-06-30 2010-08-10 Intel Corporation Reliability, availability, and serviceability in a memory device
US8495467B1 (en) * 2009-06-30 2013-07-23 Micron Technology, Inc. Switchable on-die memory error correcting engine
US8255656B2 (en) 2009-09-15 2012-08-28 Phison Electronics Corp. Storage device, memory controller, and data protection method
US8510628B2 (en) * 2009-11-12 2013-08-13 Micron Technology, Inc. Method and apparatuses for customizable error correction of memory
US9092160B2 (en) 2011-02-08 2015-07-28 Seagate Technology Llc Selective enablement of operating modes or features via host transfer rate detection
US8607121B2 (en) * 2011-04-29 2013-12-10 Freescale Semiconductor, Inc. Selective error detection and error correction for a memory interface
US9306863B2 (en) 2013-12-06 2016-04-05 Intel Corporation Link transfer, bit error detection and link retry using flit bundles asynchronous to link fabric packets
US9823864B2 (en) 2014-06-02 2017-11-21 Micron Technology, Inc. Systems and methods for throttling packet transmission in a scalable memory system protocol
KR102324769B1 (ko) * 2015-06-29 2021-11-10 삼성전자주식회사 반도체 메모리 장치의 에러 정정 회로, 반도체 메모리 장치 및 이를 포함하는 메모리 시스템
CN112612730A (zh) * 2015-09-26 2021-04-06 英特尔公司 多芯片封装链路错误检测
US10140175B2 (en) 2015-11-20 2018-11-27 Qualcomm Incorporated Protecting an ECC location when transmitting correction data across a memory link
US9965352B2 (en) 2015-11-20 2018-05-08 Qualcomm Incorporated Separate link and array error correction in a memory system
US9940186B2 (en) 2015-12-22 2018-04-10 Nxp Usa, Inc. Memory controller and method of operating a memory controller
US10692555B2 (en) * 2016-06-29 2020-06-23 Samsung Electronics Co., Ltd. Semiconductor memory devices enabling read strobe mode and related methods of operating semiconductor memory devices
US10331517B2 (en) 2016-08-26 2019-06-25 Qualcomm Incorporated Link error correction in memory system
US10387242B2 (en) 2017-08-21 2019-08-20 Qualcomm Incorporated Dynamic link error protection in memory systems

Also Published As

Publication number Publication date
TWI787299B (zh) 2022-12-21
TW201923574A (zh) 2019-06-16
ES2895367T3 (es) 2022-02-21
US20190324850A1 (en) 2019-10-24
CN110998536A (zh) 2020-04-10
WO2019040183A1 (en) 2019-02-28
EP3673374A1 (en) 2020-07-01
US20190056990A1 (en) 2019-02-21
CN116913358A (zh) 2023-10-20
EP3673374B1 (en) 2021-09-29
CN110998536B (zh) 2023-07-18
US10922168B2 (en) 2021-02-16
US10387242B2 (en) 2019-08-20

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