SG11201907720RA - Method for the alignment of two substrates - Google Patents

Method for the alignment of two substrates

Info

Publication number
SG11201907720RA
SG11201907720RA SG11201907720RA SG11201907720RA SG 11201907720R A SG11201907720R A SG 11201907720RA SG 11201907720R A SG11201907720R A SG 11201907720RA SG 11201907720R A SG11201907720R A SG 11201907720RA
Authority
SG
Singapore
Prior art keywords
substrates
alignment
proposed
Prior art date
Application number
Inventor
Thomas Wagenleitner
Original Assignee
Ev Group E Thallner Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ev Group E Thallner Gmbh filed Critical Ev Group E Thallner Gmbh
Publication of SG11201907720RA publication Critical patent/SG11201907720RA/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • H01L21/681—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment using optical controlling means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/5442—Marks applied to semiconductor devices or parts comprising non digital, non alphanumeric information, e.g. symbols
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54426—Marks applied to semiconductor devices or parts for alignment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54493—Peripheral marks on wafers, e.g. orientation flats, notches, lot number
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757—Means for aligning
    • H01L2224/75723—Electrostatic holding means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757—Means for aligning
    • H01L2224/75733—Magnetic holding means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757—Means for aligning
    • H01L2224/75743—Suction holding means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757—Means for aligning
    • H01L2224/75753—Means for optical alignment, e.g. sensors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/8012—Aligning
    • H01L2224/80121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/8012—Aligning
    • H01L2224/80121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
    • H01L2224/8013—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors using marks formed on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/8012—Aligning
    • H01L2224/80121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
    • H01L2224/80132—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors using marks formed outside the semiconductor or solid-state body, i.e. "off-chip"
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/808—Bonding techniques
    • H01L2224/80894—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces
    • H01L2224/80895—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces between electrically conductive surfaces, e.g. copper-copper direct bonding, surface activated bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/808—Bonding techniques
    • H01L2224/80894—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces
    • H01L2224/80896—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces between electrically insulating surfaces, e.g. oxide or nitride layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K13/00—Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
    • H05K13/0015—Orientation; Alignment; Positioning

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Liquid Crystal (AREA)
  • Length Measuring Devices By Optical Means (AREA)
  • Mechanical Engineering (AREA)

Abstract

Method for the alignment of two substrates A method for the alignment of substrates is proposed. Figure 1a
SG11201907720R 2017-03-20 2017-03-20 Method for the alignment of two substrates SG11201907720RA (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/EP2017/056584 WO2018171861A1 (en) 2017-03-20 2017-03-20 Method for aligning two substrates

Publications (1)

Publication Number Publication Date
SG11201907720RA true SG11201907720RA (en) 2019-10-30

Family

ID=58410281

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11201907720R SG11201907720RA (en) 2017-03-20 2017-03-20 Method for the alignment of two substrates

Country Status (8)

Country Link
US (1) US11121091B2 (en)
EP (1) EP3602624A1 (en)
JP (1) JP2020511787A (en)
KR (1) KR102365283B1 (en)
CN (1) CN110352488A (en)
SG (1) SG11201907720RA (en)
TW (1) TWI679722B (en)
WO (1) WO2018171861A1 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102017105697A1 (en) * 2017-03-16 2018-09-20 Ev Group E. Thallner Gmbh Method and device for aligning two optical subsystems
US11545474B2 (en) * 2020-05-11 2023-01-03 Semileds Corporation Method and system for transferring alignment marks between substrate systems
KR20220030685A (en) 2020-09-03 2022-03-11 삼성전자주식회사 Semiconductor package
WO2023070272A1 (en) * 2021-10-25 2023-05-04 长江存储科技有限责任公司 Wafer bonding device and method
KR102653108B1 (en) 2021-10-28 2024-04-02 코스텍시스템(주) Apparatus and method for aligniing a substrate
KR102644565B1 (en) * 2022-01-28 2024-03-07 주식회사 에스에프이 Method for aligning flatzone of wafer and aligning position of wafer

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AT405775B (en) 1998-01-13 1999-11-25 Thallner Erich Method and apparatus for bringing together wafer-type (slice-type, disk-shaped) semiconductor substrates in an aligned manner
JP4467318B2 (en) * 2004-01-28 2010-05-26 Ｎｅｃエレクトロニクス株式会社 Semiconductor device, chip alignment method for multi-chip semiconductor device, and method for manufacturing chip for multi-chip semiconductor device
WO2010023935A1 (en) * 2008-08-29 2010-03-04 株式会社ニコン Substrate aligning apparatus, substrate aligning method and method for manufacturing multilayer semiconductor
EP3731258A1 (en) 2009-09-22 2020-10-28 EV Group E. Thallner GmbH Device for aligning two substrates
US8569899B2 (en) * 2009-12-30 2013-10-29 Stmicroelectronics, Inc. Device and method for alignment of vertically stacked wafers and die
EP2511756A4 (en) * 2010-01-15 2013-06-12 Sharp Kk Liquid crystal display device and method for manufacturing same
US8102064B2 (en) * 2010-04-08 2012-01-24 Nanya Technology Corp. Electrical alignment mark set and method for aligning wafer stack
EP2463892B1 (en) * 2010-12-13 2013-04-03 EV Group E. Thallner GmbH Device, assembly and method for detecting alignment errors
KR20140139044A (en) * 2012-03-28 2014-12-04 가부시키가이샤 니콘 Substrate bonding apparatus and substrate bonding method
US9418882B2 (en) * 2013-06-17 2016-08-16 Ev Group E. Thallner Gmbh Device and method for aligning substrates
CN105247670B (en) * 2013-12-06 2018-06-12 Ev 集团 E·索尔纳有限责任公司 For being aligned the device and method of substrate
KR102259484B1 (en) 2014-02-03 2021-06-02 에베 그룹 에. 탈너 게엠베하 Method and device for bonding substrates
EP3451062B1 (en) * 2016-05-18 2020-08-19 Towerjazz Panasonic Semiconductor Co., Ltd. Semiconductor device and method for manufacturing same

Also Published As

Publication number Publication date
KR102365283B1 (en) 2022-02-18
CN110352488A (en) 2019-10-18
TW201836052A (en) 2018-10-01
JP2020511787A (en) 2020-04-16
KR20190125972A (en) 2019-11-07
WO2018171861A1 (en) 2018-09-27
EP3602624A1 (en) 2020-02-05
US11121091B2 (en) 2021-09-14
US20190378799A1 (en) 2019-12-12
TWI679722B (en) 2019-12-11

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