SG11201907686UA - Method for performing encoding on basis of parity check matrix of ldpc code in wireless communication system and terminal using same - Google Patents

Method for performing encoding on basis of parity check matrix of ldpc code in wireless communication system and terminal using same

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Publication number
SG11201907686UA
SG11201907686UA SG11201907686UA SG11201907686UA SG11201907686UA SG 11201907686U A SG11201907686U A SG 11201907686UA SG 11201907686U A SG11201907686U A SG 11201907686UA SG 11201907686U A SG11201907686U A SG 11201907686UA SG 11201907686U A SG11201907686U A SG 11201907686UA
Authority
SG
Singapore
Prior art keywords
parity check
check matrix
terminal
matrix
basis
Prior art date
Application number
SG11201907686UA
Inventor
Ilmu Byun
Jinwoo Kim
Kwangseok Noh
Jongwoong Shin
Bonghoe Kim
Original Assignee
Lg Electronics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lg Electronics Inc filed Critical Lg Electronics Inc
Publication of SG11201907686UA publication Critical patent/SG11201907686UA/en

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
    • H03M13/615—Use of computational or mathematical techniques
    • H03M13/616—Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
    • H03M13/618—Shortening and extension of codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6508—Flexibility, adaptability, parametrability and configurability of the implementation
    • H03M13/6516—Support of multiple code parameters, e.g. generalized Reed-Solomon decoder for a variety of generator polynomials or Galois fields
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041—Arrangements at the transmitter end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • General Physics & Mathematics (AREA)
  • Pure & Applied Mathematics (AREA)
  • Algebra (AREA)
  • Computing Systems (AREA)
  • Error Detection And Correction (AREA)

Abstract

: A method for performing encoding on the basis of a parity check matrix of a LDPC code, according to one embodiment of the present invention, comprises the steps of: generating, by a terminal, a parity check matrix, wherein the parity check matrix corresponds to a characteristic matrix, each element of the characteristic matrix corresponds to a shift index value determined by a modulo operation between a corresponding element in a base matrix and a lifting value, and the base matrix is a 46 x 68 matrix; and performing, by the terminal, encoding of input data by using the parity check matrix, wherein the lifting value is associated with the length of the input data. FIG. 9
SG11201907686UA 2017-06-25 2018-04-26 Method for performing encoding on basis of parity check matrix of ldpc code in wireless communication system and terminal using same SG11201907686UA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201762524588P 2017-06-25 2017-06-25
PCT/KR2018/004835 WO2019004581A1 (en) 2017-06-25 2018-04-26 Method for performing encoding on basis of parity check matrix of ldpc code in wireless communication system and terminal using same

Publications (1)

Publication Number Publication Date
SG11201907686UA true SG11201907686UA (en) 2019-09-27

Family

ID=64741772

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11201907686UA SG11201907686UA (en) 2017-06-25 2018-04-26 Method for performing encoding on basis of parity check matrix of ldpc code in wireless communication system and terminal using same

Country Status (13)

Country Link
US (2) US11190210B2 (en)
EP (1) EP3471277B1 (en)
JP (1) JP6970210B2 (en)
KR (1) KR102059002B1 (en)
CN (1) CN110352562B (en)
AU (1) AU2018294852B2 (en)
BR (1) BR112019027746B1 (en)
CA (1) CA3060788C (en)
CL (1) CL2019002498A1 (en)
MX (1) MX2019009819A (en)
RU (1) RU2730444C1 (en)
SG (1) SG11201907686UA (en)
WO (1) WO2019004581A1 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SG11201907654TA (en) 2017-03-30 2019-09-27 Lg Electronics Inc Method for performing encoding on basis of parity check matrix of low density parity check (ldpc) code in wireless communication system and terminal using same
IL277711B (en) * 2020-09-30 2022-01-01 Elbit Systems C4I And Cyber Ltd Transmission device and method for transmitting punctured data messages having common input bits and reception device and method for reassembling an encoded data message based on punctured data messages
RU2743784C1 (en) * 2020-11-13 2021-02-26 Акционерное Общество "Крафтвэй Корпорэйшн Плс" Data coding method based on ldpc code

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US873001A (en) 1906-12-12 1907-12-10 James W Arrowsmith Shoe-sole support.
KR20050118056A (en) 2004-05-12 2005-12-15 삼성전자주식회사 Method and apparatus for channel encoding and decoding in mobile communication systems using multi-rate block ldpc codes
US7581157B2 (en) * 2004-06-24 2009-08-25 Lg Electronics Inc. Method and apparatus of encoding and decoding data using low density parity check code in a wireless communication system
CN102638275B (en) * 2004-06-24 2015-01-28 Lg电子株式会社 A method and apparatus for encoding and decoding data using low density parity check code in a wireless communication system
CN101395804B (en) * 2004-09-17 2011-09-07 Lg电子株式会社 Method of encoding and decoding using ldpc code
KR100913876B1 (en) * 2004-12-01 2009-08-26 삼성전자주식회사 Method and apparatus for generating low density parity check codes
WO2006062351A1 (en) * 2004-12-08 2006-06-15 Electronics And Telecommunications Research Institute Ldpc encoder and decoder and ldpc encoding and decoding methods
KR100703483B1 (en) 2005-03-04 2007-04-03 삼성전자주식회사 Method for puncturing ldpc code
US7793190B1 (en) 2005-08-10 2010-09-07 Trellisware Technologies, Inc. Reduced clash GRA interleavers
US8433984B2 (en) * 2007-01-24 2013-04-30 Qualcomm Incorporated LDPC encoding and decoding of packets of variable sizes
CN101325474B (en) 2007-06-12 2012-05-09 中兴通讯股份有限公司 Method for encoding channel of mixed automatic request retransmission and modulation mapping of LDPC code
CN101453297B (en) 2007-12-07 2010-12-01 中兴通讯股份有限公司 Encoding method and apparatus for low density generation matrix code, and decoding method and apparatus
US8612823B2 (en) 2008-10-17 2013-12-17 Intel Corporation Encoding of LDPC codes using sub-matrices of a low density parity check matrix
US8739001B2 (en) * 2011-04-23 2014-05-27 Analogies Sa LDPC encoding and decoding techniques
EP2951925B1 (en) * 2013-01-31 2020-07-15 Intracom S.A. Telecom Solutions Ldpc code design and encoding apparatus enabling the adjustment of code rate and codelength
US9379848B2 (en) 2013-06-10 2016-06-28 Broadcom Corporation Cyclic redundancy check (CRC) and forward error correction (FEC) for ranging within communication systems
KR102104937B1 (en) * 2013-06-14 2020-04-27 삼성전자주식회사 Method and apparatus for encoding and decoding of low density parity check codes
US9548759B1 (en) * 2013-11-26 2017-01-17 Marvell International Ltd. Systems and methods for processing LDPC codes with different circulant sizes
US9595977B2 (en) * 2014-09-29 2017-03-14 Apple Inc. LDPC decoder with efficient circular shifters
US20160164537A1 (en) * 2014-12-08 2016-06-09 Samsung Electronics Co., Ltd. Method and apparatus for parallel concatenated ldpc convolutional codes enabling power-efficient decoders
CN109417392B (en) 2016-07-20 2021-10-15 华为技术有限公司 Coding and decoding method and system of LDPC code

Also Published As

Publication number Publication date
KR20190006569A (en) 2019-01-18
RU2730444C1 (en) 2020-08-21
JP2020515166A (en) 2020-05-21
EP3471277B1 (en) 2023-10-18
EP3471277A1 (en) 2019-04-17
US20190245556A1 (en) 2019-08-08
US20210203355A1 (en) 2021-07-01
JP6970210B2 (en) 2021-11-24
AU2018294852B2 (en) 2021-07-22
CA3060788C (en) 2021-07-20
CL2019002498A1 (en) 2019-12-20
US11190210B2 (en) 2021-11-30
CA3060788A1 (en) 2019-10-22
BR112019027746A2 (en) 2020-07-07
CN110352562B (en) 2023-04-25
WO2019004581A1 (en) 2019-01-03
US10560119B2 (en) 2020-02-11
BR112019027746B1 (en) 2023-03-21
AU2018294852A1 (en) 2019-12-05
MX2019009819A (en) 2019-12-02
KR102059002B1 (en) 2019-12-24
CN110352562A (en) 2019-10-18
EP3471277A4 (en) 2020-04-29

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