CN102638275B - A method and apparatus for encoding and decoding data using low density parity check code in a wireless communication system - Google Patents

Abstract

A method of encoding data using low density parity check (LDPC) code defined by a mxn parity check matrix is disclosed. More specifically, the method includes encoding input source data using the parity check matrix, wherein the parity check matrix comprises a plurality of zxz sub-matrices of which row weights and column weights are '0' or '1 '.

Description

The method and apparatus of low density parity check code Code And Decode data is used in wireless communication system

The application is the application number entering National Phase in China submitted on December 20th, 2006 is 200580020419.2 (PCT/KR2005/001988), the applying date is on June 24th, 2005, and denomination of invention is the divisional application of the patent application of " method and apparatus using low density parity check code Code And Decode data in wireless communication system ".

Technical field

The present invention relates to the method for a kind of Code And Decode in wireless communication system, more particularly, relate to a kind of method and apparatus using low-density checksum (LDPC) code Code And Decode in wireless communication system.Although the range of application that the present invention is applicable to is very large, it is specially adapted to simplify complex operations and effectively utilize memory space.

Background technology

Usually, coded representation wherein in transmitting terminal coded data to make receiving terminal to compensate to be sent by air linkage interface the mistake occurred in the distorted signals during data and the loss of signal, and recover the process of initial data.Decoding wherein at receiving terminal, the coded data from transmitting terminal is reverted to the process of its initial data.

The coding method utilizing low-density checksum (LDPC) code is known.LDPC code is a kind of error correcting code of being invented in thesis for the doctorate at him in 1962 by Robert Gallager.More particularly, its element is low-density linear block codes primarily of the parity check matrix H that " 0 " forms.Due to the calculating of high complexity, LDPC code has passed into silence to a great extent when initial introduction, but it is rediscovered in nineteen ninety-five and is proved to be effective.Research also underway (reference: Robert G.Gallager, " Low-Density Parity-Check Codes (low density parity check code) ", The MIT Press, on September 15th, 1963 of LDPC code.[2] D.J.C.Mackay, Good error-correcting codes based on very sparse matrices (the excellent error correcting code based on pole sparse matrix), IEEE Trans.Inform.Theory, IT-45, pp.399-431 (1999)).

Have few " 1 " in the every row and column of parity matrix of LDPC code.As a result, even if in large block, also can be decoded by the decode procedure repeated, and if the size of block becomes very large, LDPC code almost meets the channel capacity limit of Shannon as turbo coding.

LPDC code can be defined by the parity check matrix H of (n-k) × n, and wherein " n " represents the codeword size of carrying out after cataloged procedure, and " k " represents the data bit of carrying out before cataloged procedure.Generator matrix G can derive from following equation:

H × G=0 [formula 1]

For use LDPC code Code And Decode, transmitting terminal uses parity check matrix H and generator matrix G coded data according to formula 2.

C=G × u [formula 2]

In formula 2, symbol " c " represents code word and " u " represents Frame.

Recently, using and only using parity check matrix H and do not use the method for the coded data of generator matrix G.For the coding method using LDPC code, parity check matrix H can be thought of as most important factor.Because the size of parity check matrix H is about 1000 × 2000 or larger in practical communication system, so the process need of Code And Decode calculates in a large number, complicated expression formula and large memory space.

After generating parity check matrix H, use the source data of the parity check matrix H coding input generated.

Summary of the invention

Therefore, the present invention relates to a kind of method and apparatus utilizing low-density checksum coding and decoded data in a wireless communication system, it solves one or more problems that restriction and shortcoming due to prior art cause substantially.

The object of this invention is to provide a kind of method using LDPC code coded data.

Another object of the present invention is to provide a kind of device using LDPC code coded data.

Other advantages of the present invention, object and feature will partly be set forth in the following description, and investigating on following description or the basis that learns from the practice of the present invention, will become obvious for those of ordinary skills.Structure by particularly pointing out in recorded description and its claim and accompanying drawing is realized and obtains object of the present invention and other advantages.

In order to object according to the present invention realizes these objects and other advantages, as concrete and broadly described at this, the invention discloses a kind of method using low-density checksum (LDPC) code coding or decoded data, the method comprises the parity matrix that use comprises zero submatrix of multiple z × z and the permutation submatrix of multiple z × z.Wherein the row weighted sum row weighting of the permutation submatrix of multiple z × z is " 0 " or " 1 ".

In one aspect of the invention, provide the method using low-density checksum (LDPC) code coded data, the method comprises provides permutation matrix, null matrix and basis matrix, launches basis matrix produce parity matrix by using permutation matrix, null matrix; To encode data to be sent with use parity matrix.

In another aspect of this invention, by making each element of basis matrix permuting information had for identifying permutation matrix define the method using low-density checksum (LDPC) code coding input source data, form described permutation matrix by the interval of the specific line number that is shifted in the same direction by the often row of base displacing matrix.In this method, each element of basis matrix be 96 × 96 permutation matrix and this basis matrix be

$\left[\begin{array}{cccccccccccccccccccccccc}2& -1& 19& -1& 47& -1& 48& -1& 36& -1& 82& -1& 47& -1& 15& -1& X& 0& -1& -1& -1& -1& -1& -1\\ -1& 69& -1& 88& -1& 33& -1& 3& -1& 16& -1& 37& -1& 40& -1& 48& -1& 0& 0& -1& -1& -1& -1& -1\\ 10& -1& 86& -1& 62& -1& 28& -1& 85& -1& 16& -1& 34& -1& 73& -1& -1& -1& 0& 0& -1& -1& -1& -1\\ -1& 28& -1& 32& -1& 81& -1& 27& -1& 88& -1& 5& -1& 56& -1& 37& -1& -1& -1& 0& 0& -1& -1& -1\\ 23& -1& 29& -1& 15& -1& 30& -1& 66& -1& 24& -1& 50& -1& 62& -1& -1& -1& -1& -1& 0& 0& -1& -1\\ -1& 30& -1& 65& -1& 54& -1& 14& -1& 0& -1& 30& -1& 74& -1& 0& -1& -1& -1& -1& -1& 0& 0& -1\\ 32& -1& 0& -1& 15& -1& 56& -1& 85& -1& 5& -1& 6& -1& 52& -1& 0& -1& -1& -1& -1& -1& 0& 0\\ -1& 0& -1& 47& -1& 13& -1& 61& -1& 84& -1& 55& -1& 78& -1& 41& X& -1& -1& -1& -1& -1& -1& 0\end{array}\right]$

In addition, " 0 " represents the unit matrix of 96 × 96, and "-1 " represents the null matrix of 96 × 96, the integer representation being more than or equal to 1 by be shifted in the same direction 96 × 96 the often row of unit matrix and the permutation matrix that formed, this identical line number distance is integer " X ", and they are between 0 to 95.

In another aspect of this invention, provide a kind of encoder, it comprises parity matrix generation module, for producing parity matrix by launching basis matrix, each element of this basis matrix has the permuting information of the permutation matrix formed for being identified by replacing base permutation matrix; And coding module, it is for this parity matrix coding input source data.

In another aspect of this invention, provide a kind of method using low-density checksum (LDPC) code decoded data, the method comprises provides permutation matrix, null matrix and basis matrix, launches basis matrix produce parity matrix by using permutation matrix, null matrix; And use this parity matrix decoded data.

In another aspect of this invention, by making each element of basis matrix permuting information had for identifying permutation matrix define the method using low-density checksum (LDPC) code decoding input source data, form described permutation matrix by the interval of the specific line number that is shifted in the same direction by the often row of base displacing matrix.The method comprises the following basis matrix that each element is the permutation matrix of 96 × 96:

$\left[\begin{array}{cccccccccccccccccccccccc}2& -1& 19& -1& 47& -1& 48& -1& 36& -1& 82& -1& 47& -1& 15& -1& X& 0& -1& -1& -1& -1& -1& -1\\ -1& 69& -1& 88& -1& 33& -1& 3& -1& 16& -1& 37& -1& 40& -1& 48& -1& 0& 0& -1& -1& -1& -1& -1\\ 10& -1& 86& -1& 62& -1& 28& -1& 85& -1& 16& -1& 34& -1& 73& -1& -1& -1& 0& 0& -1& -1& -1& -1\\ -1& 28& -1& 32& -1& 81& -1& 27& -1& 88& -1& 5& -1& 56& -1& 37& -1& -1& -1& 0& 0& -1& -1& -1\\ 23& -1& 29& -1& 15& -1& 30& -1& 66& -1& 24& -1& 50& -1& 62& -1& -1& -1& -1& -1& 0& 0& -1& -1\\ -1& 30& -1& 65& -1& 54& -1& 14& -1& 0& -1& 30& -1& 74& -1& 0& -1& -1& -1& -1& -1& 0& 0& -1\\ 32& -1& 0& -1& 15& -1& 56& -1& 85& -1& 5& -1& 6& -1& 52& -1& 0& -1& -1& -1& -1& -1& 0& 0\\ -1& 0& -1& 47& -1& 13& -1& 61& -1& 84& -1& 55& -1& 78& -1& 41& X& -1& -1& -1& -1& -1& -1& 0\end{array}\right]$

In this method, " 0 " represents the unit matrix of 96 × 96, "-1 " represents the null matrix of 96 × 96, the integer representation being more than or equal to 1 by be shifted in the same direction 96 × 96 the often row of unit matrix and the permutation matrix that formed, and this identical line number is spaced apart integer " X ", and they are between 0 to 95.

In another aspect of this invention, provide a kind of decoder, it comprises parity matrix generation module, for producing parity matrix by launching basis matrix, each element of this basis matrix has the permuting information of the permutation matrix formed for being identified by replacing base permutation matrix; And decoder module, for this parity matrix coding input source data.

In another aspect of this invention, provide a kind of device using low-density checksum (LDPC) code coded data, this device comprises: data source, and it is suitable for providing data to be sent; LDPC encoder, it is suitable for by using permutation matrix and null matrix to launch basis matrix and produces parity matrix, and uses this parity matrix to encode data to be sent; Modulation module, its data being suitable for modulating-coding are to produce the coded data of modulation; And antenna, it is suitable for the coded data sending modulation.

In another aspect of this invention, provide a kind of device using low-density checksum (LDPC) code decoded data, this device comprises: antenna, and it is suitable for the coded data receiving modulation; Demodulation module, its coded data being suitable for demodulation modulation is to produce the data of coding; And LDPC decoder, it is suitable for by using permutation matrix and null matrix to launch basis matrix and produce parity matrix, and uses the data of this parity matrix decoding and coding.

The general description and the following specific descriptions that should be understood that more than the present invention are all exemplary and explanatory, and are intended to the of the present invention further explanation that provides as claimed in claim.

Accompanying drawing explanation

Include the accompanying drawing in order to provide a further understanding of the present invention to comprise in the application and form a application's part, one or more embodiment of the present invention is described, and together with the description for explaining principle of the present invention.In the accompanying drawings:

Fig. 1 is the schematic diagram of wireless communication system.

Fig. 2 illustrates H=[H _d| H _p] relation.

Fig. 3 illustrates the structure of dual-diagonal matrix.

Fig. 4 illustrates to have 16 submatrixs, that is, (1,1), (1,2) ..., the H of (4,4) ⁽ⁱ⁾ _d, wherein m=4.

Fig. 5 illustrates the parity check matrix H as r=1/2.

Fig. 6 illustrates the flow chart generating parity check matrix H.

Fig. 7 illustrates and comprises the permutation matrix of multiple z × z or the parity check matrix H of null matrix.

Fig. 8 illustrates basis matrix H _b.

Fig. 9 illustrates another embodiment of the Code And Decode method using LDPC code.

Figure 10 a illustrates that the first foundation matrix from the first foundation permutation matrix of 12 × 12 generates the example of the second basis matrix of the second base displacing matrix of 5 × 5.

Figure 10 b illustrates the method generating the second basis matrix of the second base displacing matrix of 5 × 5 according to formula 5 from the first foundation matrix of the first foundation permutation matrix of 12 × 12.

Figure 11 is the structure chart of the preferred embodiment of the coding module using LDPC code.

Figure 12 is the structure chart of the preferred embodiment of the coding module using LDPC code.

Figure 13 illustrates the line chart of the emulation describing the group technology using model taking method and round method downwards.

Figure 14 a-14f illustrates the basis matrix H with function _bpreferred embodiment.

Figure 15 illustrates the basis matrix H when code check is 1/2 _bembodiment.

Figure 16 illustrates the basis matrix H when code check is 2/3 _banother embodiment.

Figure 17 illustrates another embodiment of the basis matrix when code check is 3/4.

Figure 18 illustrates another embodiment of the basis matrix when code check is 1/2.

Figure 19 illustrates another embodiment of the basis matrix when code check is 1/2.

Figure 20 illustrates another embodiment of the basis matrix when code check is 1/2.

Figure 21 illustrates another embodiment of the basis matrix when code check is 2/3.

Figure 22 illustrates another embodiment of the basis matrix when code check is 3/4.

Figure 23 illustrates another embodiment of the basis matrix when code check is 3/4.

Figure 24 illustrates another embodiment of the basis matrix when code check is 2/3.

Figure 25 illustrates another embodiment of the basis matrix when code check is 2/3.

Figure 26 illustrates another embodiment of the basis matrix when code check is 2/3.

Figure 27 illustrates another embodiment of basis matrix.

Embodiment

Now concrete with reference to the preferred embodiments of the present invention, the example is shown in the drawings.Anywhere, identical reference number is used to indicate same or analogous part throughout accompanying drawing.

Fig. 1 is the schematic diagram of the wireless communication system wherein realizing embodiments of the invention.In FIG, reflector 10 is communicated by wireless channel 20 with receiver 30.From the data source 11 reflector 10, processed the source data " u " of k bit by LDPC encoder 13, source data is encoded and process by the code word " c " as n-bit.Then sent by antenna 17 after code word " c " to be modulated in order to wireless transmission by modulation module 15.The signal sent through wireless channel 20 is received by the antenna 31 in receiver 30.After this, in receiver 30, perform the operation contrary with the operation of reflector 10.Such as, before the code word c of n-bit is transferred to LDPC decoder 35, demodulation module 33 demodulated received signal.Data sending/receiving process is not limited to above-mentioned example.Said process is that the example of simplification is in order to explain embodiments of the invention.

Embodiments of the invention relate to the specific operation using LDPC code Code And Decode in LDPC encoder 13 and LDPC decoder 35.In addition, embodiment relates to the specific descriptions of the encoder of such as LDPC encoder 13 and LDPC decoder 35.It is below the instantiation of embodiment.

Formula 3 illustrates the calculating of code check.When calculating code check, the factor of such as channel status and transmission data volume considered by reflector.

R=k/n [formula 3]

Here, " k " represents the length of source data, and the length of n presentation code data (or code word).

Coded data (or code word) comprises systematic bits and Parity Check Bits.The source data of systematic bits instruction precoding, and Parity Check Bits instruction is determined by systematic bits and generator matrix and is doubly increased to a series of bits at systematic bits rear portion.Value " n " in formula indicates the bit number increased between systematic bits and Parity Check Bits.Reduce the number of Parity Check Bits to increase the code check of LDPC code, and the number reducing systematic bits is to reduce the code check of LDPC code.

As for the coding method using LDPC code, generator matrix G coding input source data can be used according to formula 1 and formula 2.More particularly, through type 2 is encoded the input source data s of k bit _{1 × k}and it becomes the code word x of n-bit _{1 × k}.Code word x comprises x=[s p]=[s ₀, s ₁..., s _k-1, p ₀, p ₁..., p _m-1].Here, (p ₀, p ₁..., p _m-1) represent Parity Check Bits and (s ₀, s ₁..., s _k-1) represent systematic bits.

But the coding method using generator matrix G is complicated.In order to minimize this complexity, not relying on generator matrix G, preferably using parity check matrix H direct coding input source data.Due to x=[s p], use Hx=0, Hx=H [s p]=0.From these relations, Parity Check Bits p can be obtained, and code word x=[s p] can be determined subsequently.

After generating parity check matrix H, use the parity check matrix H coding input source data generated.

Be similar to the method used in receiver 30 in Fig. 1, use following formula decode encoded data:

Hx=0 [formula 4]

Formula 4 describes how to detect decode error.More particularly, if decoded data x is multiplied with parity check matrix H and result is 0, then this result indicates without transmission error.But, if result is the number except 0, then represent to there is transmission error.

Figure 11 and 12 is the block diagrams of the embodiment being similar to the LDPC encoder 13 of Fig. 1 and the encoder 130 of LDPC decoder 35 and decoder 350 respectively.

In formula 1, parity check matrix H can be expressed as H=[H _d| H _p], wherein H _dthere is (n-k) × k tie up and H _pthere is (n-k) × (n-k) dimension.Fig. 2 illustrates H=[H _d| H _p] example of relation, wherein k represents the length of the source data (bitwise) of coding in LDPC encoder 13, and the length of the code word c of n presentation code (bitwise).

From formula 1 and H=[H _d| H _p] between relation, formula G=[I| (H can be determined _p ^-1h _d) ^t] ^t.In addition, LDPC encoder 13 is passed through G=[I| (H according to formula 2 _p ^-1h _d) ^t] ^tbe multiplied by input source data u to perform encoding operation.Subsequently, formula 2 can be expressed as formula 5 below:

C=[I| (H _p ^-1h _d) ^t] ^tu [formula 5]

In this formula, if H _pthere is double diagonal line form, then easily calculate H as lower triangular matrix _p ^-1.

Except using generator matrix G to perform encoding operation, also encoding operation can be performed by using parity check matrix H direct coding source data.

Preferably, can and H _puse (n-k) × (n-k) dual diagonal matrix together.No matter how, dual diagonal matrix represents such matrix to the dimension of matrix: wherein leading diagonal and up or below cornerwise all elements of being close to leading diagonal be all " 1 ", and other elements are " 0 ".Fig. 3 illustrates the structure of the example of dual diagonal matrix.

In the Code And Decode method using LDPC code, code check is thought of as important parameter.Particularly, each code check r should support by various code word size n.Usually, the value of " r " is r=1/2,2/3 or 3/4, but the value of " r " is not limited to these values.As for " n ", often use n=24 × z (at this, z=24+4 × i, wherein i=0,1,2,3,4 ..., 18).Different basis matrixs can be used with Optimized Coding Based and decoding performance to each " r " and " n ".But, if for specific " r " by a basis matrix H _bfor all " n ", then can reduce the use of memory.Therefore, determine how to be included in a basis matrix H _bin permuting information to be modified to the permuting information of other n very important.

Following embodiment provides when using first foundation matrix coder and decoding to have the basis matrix of the second base displacing matrix of other dimensions (z), stores first foundation matrix and has maximal dimension (z _max) first foundation permutation matrix.

Below description is stored first foundation matrix and there is maximal dimension (z _max) first foundation permutation matrix, and the example of method that the basis matrix using first foundation matrix coder and decoding to have the second base displacing matrix of other dimensions (z) generates.

Fig. 8 illustrates basis matrix H _bexample.Basis matrix shown in Fig. 8 is only example, and the basis matrix H used in Code And Decode _bactual size larger.In fig. 8, z _max12.Similarly, basis matrix H _bthere is the base displacing matrix of 12 × 12 dimensions, form multiple permutation matrix, basis matrix H by the interval of the often row cyclic shift of base displacing matrix being specified in particular directions _balso there is null matrix.Such as, basis matrix H _bin " 11 " represent by particular directions by the interval (row or column) of the often row cyclic shift 11 of base displacing matrix formed permutation matrix.

Fig. 9 illustrates another embodiment of the Code And Decode method using LDPC code.The example of following Fig. 9 is the communication system based on Fig. 1.In order to perform encoding operation, LDPC encoder should comprise and has maximal dimension (z _max) first foundation permutation matrix and the first foundation matrix of first foundation permutation matrix.First foundation permutation matrix should be preferably unit matrix.If the fixed matrix of such as unit matrix is used as first foundation permutation matrix, then LDPC encoder does not need the information storing first foundation permutation matrix.

Reflector 10 can send input source data by channel after the H matrix coder input source data by using first foundation matrix to generate.But, when the input source data (code word) of coding being sent to receiver 30 after generating H matrix at the second basis matrix of use second permutation matrix, there is trouble.The dimension of the second permutation matrix is " z ", and it is less than maximal dimension z _maxsize.

As basis (H _b) _d(H _b) _pdefinition basis matrix H _btime, preferably to (H _b) _puse block dual-diagonal matrix.More particularly, (H _b) _d(H _b) _pby H=[(H _b) _d| (H _b) _p] the basis matrix H that represents _ba part.Block dual-diagonal matrix have the leading diagonal that all forms unit matrix and up or below be close to the diagonal of leading diagonal and other elements are all " 0 ".If (H _b) _pbe set to block dual-diagonal matrix, then H _prow weighting " 1 " may be had, and in order to avoid this situation, preferably, unit matrix should be replaced with one or two null matrix.

Basis matrix H _b(H _b) _dby base displacing matrix, pass through in particular directions by multiple permutation matrix of gap-forming of the specific line number of often row cyclic shift of base displacing matrix and being combined to form of null matrix.When passing through the above-mentioned permutation matrix basis of formation matrix H of combination _btime, preferably consider the operation that the Code And Decode of optimum performance is provided.

In H matrix, according to code check (r=k/n), H _dat least one H can be comprised ⁽ⁱ⁾ _d, wherein i=1,2 ..., r/ (1-r).Code check " r " is determined by the length " n " of source data length " k " and coding codeword " c ".Usually, can use such as r=1/2,2/3,3/4, the code check of 4/5.H ⁽ⁱ⁾ _d(n-k) × (n-k) matrix of tieing up, and by H _d=[H ⁽¹⁾ _d| H ⁽²⁾ _d| ... | H ^{(r/ (1-r))} _d] represent.

Preferably, when by each H ⁽ⁱ⁾ _dwhen being divided into m × m (n-k)/m × (n-k)/m dimension submatrix, H _dthe weighting of every row and column be " 1 ".More particularly, every row and column of submatrix has " 1 " element and other elements are " 0 ".In addition, if H _dany two row compare, these are capable does not have the more than one row overlapped each other with " 1 ".At H _din, when two row have at H _pduring the row of middle overlap, two row are not had to have overlapping " 1 " row.More particularly, if H _dany two row compare, such as, can have " 1 " at certain row of row 7, and other row also can have " 1 " at row 7.But, these two capable other row without total " 1 ".If meet this condition, identical concept is applied to row.In other words, two row are not had to have the overline of more than one " 1 ".

Fig. 4 illustrates to have 16 submatrixs, that is, (1,1), (1,2) as m=4 ..., (4,4), example H ⁽ⁱ⁾ _d.Each submatrix has " 1 " and means to only have a row or column to have " 1 " in each submatrix as the weighting of row weighted sum row, and remaining row and column has " 0 ".Preferably m uses " 4 "-" 12 ", and this scope provides optimum performance.

In another example, H _dthe row weighting of submatrix or row weighting can be " 0 " or " 1 ".In other words, at H ⁽ⁱ⁾ _dsubmatrix in, exist and there is the submatrix of the row weighted sum row weighting of " 0 " or " 1 ".Similarly, H ⁽ⁱ⁾ _dpreferably have identical number at H ⁽ⁱ⁾ _drow and column direction on there is the submatrix of the row weighted sum row weighting of " 0 ".

Fig. 5 illustrates the example of the parity check matrix H as r=1/2, H _don the left side and dual-diagonal matrix H _pon the right.In Figure 5, H _dcomprise 25 submatrixs.Here, " 1 " representative of square frame mark has the submatrix of the row and column weighting of " 1 ", and " 0 " representative of square frame mark has the submatrix of the row and column weighting of " 0 ".In Figure 5, there is the submatrix of the row and column weighting of " 0 " at H _din every row and column exist once.

Fig. 6 is the flow chart that the process generating parity check matrix H is shown.The example describing the process generating parity check matrix H is not limited to example described below.

In the first process, for H ⁽ⁱ⁾ _dsubmatrix (1,1), all row and column weightings should be " 0 " or " 1 " (S51).Such as H ⁽ⁱ⁾ _dthe submatrix (other submatrixs all from it produce) of submatrix (1,1) be called as base displacing matrix.In addition, preferably, for base displacing matrix applying unit matrix.

Next, this process comprises the row and column execution replacement operator to base displacing matrix, sequentially to generate H ⁽ⁱ⁾ _deach submatrix (S51-S53).Preferably, H is not had _dtwo row can generation H ⁽ⁱ⁾ _deach submatrix in there are the more than one row with overlapping " 1 ".The submatrix formed by the replacement operator of the row and column of base displacing matrix is called as permutation matrix.

In addition, (S54) H is generated according to first (S51) and second (S52) process ⁽ⁱ⁾ _dremainder (S53).Equally, H is combined ⁽ⁱ⁾ _dall parts to generate H _d(S55).Finally, H is combined _dand H _pto generate H (S56).

Fig. 7 illustrates the parity check matrix H comprising multiple z × z permutation matrix or null matrix.In the figure 7, P _{i, j}represent z × z permutation matrix or null matrix.

As basis (H _b) _d(H _b) _pdefine these basis matrixs H _btime, to (H _b) _ppreferably use block dual-diagonal matrix.More particularly, (H _b) _d(H _b) _pby H=[(H _b) _d| (H _b) _p] the basis matrix H that represents _ba part.Block dual-diagonal matrix have leading diagonal and up or below be close to the diagonal of leading diagonal, they all form unit matrix and remainder is " 0 ".If by (H _b) _pbe set as block dual-diagonal matrix, H _prow weighting " 1 " can be had and in order to avoid this situation, preferably should replace unit matrix with one or two null matrix.

Basis matrix H _b(H _b) _pby being combined to form of base displacing matrix, the multiple permutation matrix formed by particular directions the often row cyclic shift of base displacing matrix being specified the interval of line number and null matrix.When passing through the above-mentioned permutation matrix basis of formation matrix H of combination _btime, preferably consider to provide the Code And Decode of optimum performance to operate.

About basis matrix H _b, must lower than the first selected standard value from the difference in the numeral of any two permuting informations of permuting information.In other words, each permutation matrix numeral should with basis matrix H _bsame or similar.Preferably, the value of the first standard value should be very little, but can between 3-7.

About parity check matrix H, preferably should prevent or minimize the generation of 4-circulation or 6-circulation.Particularly, preferably, parity check matrix H does not have 4-circulation.In addition, preferably, the 6-circulation that parity check matrix H has is less than selected second standard value.When any two row of parity check matrix H have " 1 " at two identical row, be called that 4-circulates.Similarly, 6-circulation is any combination according to two row, when the situation of any three row when two identical row have " 1 " of parity matrix.

In addition, about the H in parity check matrix H _d, the weighting of row weighted sum row should be regular, and rule refers to, because do not reduce performance in order to the realization of low complex degree, to have identical weighting respectively in all row and all row.If z × z unit matrix is used as base displacing matrix, then parity check matrix H can have the systematicness in the weighting of row weighted sum row.

Answer basis of formation matrix H _bto realize efficient coding for all code checks and codeword size and decoding performance.When being combined to form basis matrix H according to base displacing matrix, multiple permutation matrix and null matrix _btime, because to the code check of displacement communication system applications change and codeword size, so answer basis of formation matrix to realize the optimal performance to all code checks and codeword size.

Each element of first foundation matrix can have two or more permuting informations.More particularly, the whole dimensional extent of the base displacing matrix of change can be divided into two or more less scopes, carry optimum permuting information to make each scope.Such as, if the scope of dimension z changed is 10-96, then this scope is divided into two less dimensional extent.First scope comprises 10-53, and the second scope comprises 54-96.Subsequently, by optimize first foundation matrix allocation to each dimension.Although there are two first foundation matrixes now, each first foundation matrix does not need to be separately stored and the plain information that can store two first foundation matrixes of first foundation entry of a matrix.As a result, while needing less storage, improve the performance of Code And Decode.

The element of parity check matrix H can by basis matrix H _bexpress, H _bcomprise the permuting information for identifying the multiple permutation matrixes formed by the displacement of the row and column of base displacing matrix.

For the Code And Decode of the LDPC encoder 13 in Fig. 1 or the use parity check matrix H in LDPC decoder 35, basis matrix H can be launched at use base displacing matrix and permuting information _bgenerate parity check matrix H afterwards.In addition, the parity matrix of generation is preferably used to perform Code And Decode operation.

By launching basis matrix H _b, mean that the z × z matrix representing permuting information replaces basis matrix H _beach element.Z × z matrix refers to permutation matrix or null matrix.Here, at basis matrix H _bexpansion basis on, generate parity check matrix H subsequently.

Also can consider for from basis matrix H _bgenerate the various process of H matrix.First, "-1 " is distributed to " null matrix " and be not that the every other permuting information of "-1 " is assigned to binary basis matrix H _bin, this binary basis matrix H _binmatrix dimension with there is the H " 1 " specified _bidentical.In addition, if H _binfor generating H matrix, then add H _bingenerate H _bprocess.At acquisition H _bthe process generating H matrix is afterwards identical with above.

As mentioned above, on the basis of the designation method from least one base displacing matrix change order and form multiple permutation matrix.Preferably, base displacing matrix is unit matrix.In addition, preferably, at least one base displacing matrix and multiple permutation matrix have the row and column weighting of " 1 ".In other words, preferably the element of all row and columns of multiple permutation matrix has only " 1 " element and other elements are " 0 ".

Can think to be the method forming multiple permutation matrix from base displacing matrix by the method for the every whole row or column cyclic shift appointed interval of base displacing matrix in particular directions.

Parity check matrix H can by the basis matrix H of the permuting information had as the element for identifying the permutation matrix that base displacing matrix or the displacement by every row or column of base displacing matrix are formed _bdefinition.The example below provided illustrates such situation, in particular directions, such as, right or left, by every row or column cyclic shift appointed interval of base displacing matrix, to form multiple permutation matrix from base displacing matrix.

Storage is used for having maximal dimension (z _max) the first foundation matrix H of base displacing matrix _band by replacing each permuting information of first foundation matrix divided by the remainder being worth " z " with each permuting information of first foundation matrix, and generate other basis matrixs being used for other base displacing matrixes with less dimension (z) from first foundation matrix.

According to the size of code word, be necessary to make the dimension of base displacing matrix be 5 × 5 during Code And Decode operation.In this case, mod " mod (A, B) " can be used.Here, mod (A, B) indicates A divided by the remainder of B.In other words, for the base displacing matrix of 5 × 5, basis matrix H _bin " 11 " do not represent that the often row of the base displacing matrix of the dimension size with 5 × 5 is shifted the interval of 11.But it represents in the same direction by row displacement " mod (11,5)=1 ".

Following instance illustrates when the dimension (or value " z ") of base displacing matrix changes owing to changing code word size, how more effectively to generate parity check matrix H and to perform the operation of LDPC Code And Decode according to generated parity check matrix H.The example provided relates to by using first foundation matrix to generate the second basis matrix according to the different dimensions (z) of base displacing matrix.In addition, generate the second basis matrix by the shift mode similar with first foundation matrix, and thus Code And Decode performance can be improved.

In fig .9, reflector 10 uses first foundation matrix to generate the second basis matrix.The basis matrix shown in Fig. 8 is used to explain the generation method of the second basis matrix.In fig. 8, maximal dimension z _maxsize be 12.Therefore, first foundation matrix H is formed by index information _b.Index information comprises 12 × 12 first foundation permutation matrixes, passes through in particular directions by multiple displacement of the gap-forming of the specific line number of often row cyclic shift of base displacing matrix and null matrix.Such as, basis matrix H _bin " 11 " representative by particular directions by base displacing matrix circular displacement 11 interval (row or column) and formed permutation matrix.

Figure 10 a illustrates the method for generating the second basis matrix of 5 × 5 second base displacing matrixes from the first foundation matrix of 12 × 12 first foundation permutation matrixes.If make dimension size (z) of the second base displacing matrix less according to the size of code word during encoding operation in the transmitter, as illustrated in fig. 10 a, then use group technology.In other words, " 0 ", " 1 " and " 2 " of first foundation matrix is grouped and is mapped as " 0 " in the second basis matrix.Similarly, " 3 " and " 4 " of first foundation matrix are grouped and are mapped as " 1 " in the second basis matrix, and " 5 " and " 6 " are grouped and are mapped as " 2 ".Repeat the grouping of model identical and mapping makes " 7 ", " 8 " and " 9 " are grouped and are mapped as " 3 ", and " 10 " and " 11 " are grouped and are mapped as " 4 ".As the result of dividing into groups and map, generate the second basis matrix.

In group technology, the permutation matrix with the first foundation permutation matrix of adjacent shift numeral is mapped to a permutation matrix of the second base displacing matrix.In addition, this group technology is designed to keep most of foundation characteristic of first foundation matrix when generation the second basis matrix.In figure loa, at least two permutation matrixes of first foundation permutation matrix are grouped and are mapped to a permutation matrix in the second base displacing matrix.But, the permutation matrix of a permutation matrix to the second base displacing matrix of first foundation permutation matrix can be mapped.

For specific group technology, the downward bracket function of definition in formula 6 can be used:

Shift (z)=floor (shift (z _max) z/z _max) [formula 6]

In this formula, shift (z) represents the between-line spacing number be shifted in z × z permutation matrix.Equally in the formula, floor (x) represents toward bearing the integer of infinity closest to x.

Figure 10 b illustrates the method generating the second basis matrix of 5 × 5 second base displacing matrixes according to formula 5 from the first foundation matrix of the first foundation permutation matrix of 12 × 12.

Such as, be mapping through the permutation matrix that formed at the interval of the often capable displacement 7 of 12 × 12 first foundation permutation matrixes to 5 × 5 second base displacing matrixes, generate permutation matrix.This displacement can use formula 6 to be expressed as:

Shift(5)＝floor(shift(12)×5÷12)＝floor(7×5÷12)＝floor(2.92)＝2

In other words, the permutation matrix formed by the interval of the often row cyclic shift 7 by 12 × 12 first foundation matrixes is mapped to the permutation matrix at the interval of the often capable displacement 2 of 5 × 5 second permutation matrixes.

By using above-mentioned generation method, can by replacing each element of first foundation matrix to generate the second basis matrix with the element of the second basis matrix.This can the hardware of the downward bracket function of simple implementation or software complexity.

In fig .9, after generation second basis matrix (S41), the second base displacing matrix and the second basis matrix can be used to generate parity check matrix H (S43).By using the second base displacing matrix and the second basis matrix, the second basis matrix can generate the parity check matrix H with z × z dimension size.Second basis matrix comprises null matrix, unit matrix or the permutation matrix by being formed by all row cyclic shift appointed intervals of the second base displacing matrix.The second basis matrix generative process (S41) and parity check matrix H generative process (S43) can be performed simultaneously.Also parity check matrix H can be generated by each element of the second basis matrix replacing through type 6 to obtain with the respective element of null matrix, base displacing matrix or permutation matrix.And use the parity check matrix H coding input source data (S45) generated.

As mentioned above, preferably, generating run is performed for base displacing matrix, first consider the use of memory in memory module and only store there is maximal dimension (z _max) the first foundation matrix of first foundation permutation matrix, and then in the basis matrix of the second base displacing matrix with other dimensions size (z), use first foundation matrix coder and decoding.Equally preferably, the different dimension sizes of base displacing matrix are set according to the change in code word size.

Figure 13 illustrates the line chart of the emulation of the group technology using mod and downward bracket function.At this, this figure shows to round the superior function that method compares mod downwards.

Figure 11 is the structure chart of the preferred embodiment of the coding module using LDPC code.Encoder 130 comprises memory module 131, base matrix generation module 132, parity matrix generation module 133 and coding module 134.Memory module 131 stores the information about first foundation permutation matrix, the second base displacing matrix and first foundation matrix.The information that base matrix generation module 132 uses information to be stored in first foundation permutation matrix in memory module 131 and first foundation matrix generates the second basis matrix.Parity matrix generation module 133 uses information be stored in the second base displacing matrix in memory module 131 and generate parity matrix from the information of the second basis matrix of base matrix generation module 132 generation.Coding module 134 uses the source data of the parity matrix coding input generated from parity matrix generation module 133.

If code word size does not change, then memory module stores a base displacing matrix information and a basis matrix information and does not need base matrix generation module.In addition, if use the simple matrix of such as unit matrix in the first or second permutation matrix, then memory module 131 need not store the information of the first or second base displacing matrix.Can according to the function of the function of each module optimized integration matrix generation module 132, parity matrix generation module 133 and coding module 134 in software or hardware.

Figure 12 is the structure chart of the preferred embodiment of decoder module.Decoder 350 comprises memory module (351), base matrix generation module (352), parity matrix generation module (353) and coding module (354).Memory module 351, base matrix generation module 352 are identical with the corresponding module of Figure 11 with the function of parity matrix generation module 353.Coding module 354 is by using the parity matrix coded input data generated by parity matrix generation module 353.What provided is applicable to Figure 12 about the explanation of function in Figure 11.

Below the specific descriptions of base displacing matrix and basis matrix, to realize the better performance used in the Code And Decode method of LDPC code.

Figure 14 a-14f illustrates the basis matrix H with function described above _bpreferred embodiment.In Figure 14 a-14f, code check is 3/4.When code check is 3/4, for basis matrix, " 0 " represents the unit matrix with z × z dimension, "-1 " represents the null matrix with z × z dimension, and the permutation matrix that the integer representation being greater than 1 is formed by the often row (or row) of the unit matrix at specific direction (that is, right or left) cocycle displacement z × z.The number of the row or column of displacement corresponds to this integer value.Such as, if this integer is 5, then the interval of the row that is shifted (or row) 5.

As shown in Figure 15, if code check is 1/2, then the size of basis matrix can be shortened by the size from basis matrix during code check 3/4, with basis of formation matrix H _b.

Figure 16 is basis matrix H _banother embodiment.The basis of the code check of 2/3 illustrates basis matrix.As above for the description of Figure 14 a-14f, " 0 ", "-1 " and be more than or equal to 1 the importance of integer and effect be identical.

Figure 17 illustrates another embodiment of the basis matrix when code check is 3/4.In this embodiment, minimize in basis matrix 4-circulation and 6-circulate number and regularly to weighting of falling out.In addition, in order to obtain optimal performance, each element shift base displacing matrix of basis matrix to all code checks and codeword size.Compared by Figure 17 and Figure 14 a-14f, although have the size of 1/4, the performance of matrix can compared with Figure 14 a-14f.

Figure 18 illustrates another embodiment of the basis matrix when code check is 1/2.In figure 18, design basis matrix is more effectively to perform parallel processing.More particularly, when arranging the order line order of (1 → 7 → 2 → 8 → 3 → 9 → 4 → 10 → 5 → 11 → 6 → 12) in basis matrix, " non-zero " element of any two row is not overlapping, and simultaneously, in any row of this two row, element is not overlapping." non-zero " element refers to the every other element in basis matrix except the element of null matrix.Such as, in figure 18, if by row 8 compared with row 2 or row 3, then " non-zero " element is not overlapping in any row of contrast row.

Figure 19 illustrates another embodiment of the basis matrix when code check is 1/2.In order to more effective parallel processing, design basis matrix makes the set of two row, such as (1,7), (2,8), (3,9), (4,10), (5,11), " non-zero " element of (6,12) is not overlapping in any row of these row.As shown in the embodiment of figures 18 and 19, effective parallel processing can be realized during decoding.

Figure 20-22 illustrates other embodiments of the basis matrix when code check is 1/2,2/3 and 3/4 respectively.In these figures, basis matrix provides effective performance after being extended to z × z base displacing.

Figure 23 illustrates another embodiment of the basis matrix when code check is 3/4.Basis matrix is launched by the base displacing matrix of all dimensions.Especially, as z=56, best performance.

Figure 24 and 25 illustrates other embodiments of the basis matrix when code check is 2/3.Design this embodiment there is irregular row weighting to improve performance.Especially, Figure 25 illustrates the short code word length of such as c=576 or c=672.

Figure 26 illustrates other embodiments of the basis matrix when code check is 2/3." X " represents the integer from 0 to 95, and preferably, X can be 86,89 or 95.Most preferred value is X=95.Basis matrix in Figure 26 has parallel processing feature and designs it to have effective performance.Parallel processing feature can significantly reduce the decode operation time and more particularly, and when sequential index with 1,2,3,4,5,6,7 and 8 of every row, " non-zero " element is being nonoverlapping between the row exchanging the matrix that adjacent row generates." non-zero " element refers to the number of shift bits from 0 to 95, does not comprise-1.In addition, adjacent cells refers to nonoverlapping " non-zero " element between first and last row in the matrix generated by swapping rows.The example meeting the basis matrix in Figure 26 of above condition is 1-4-7-2-5-8-3-6-(1), as shown in figure 27.

In figure 27, all basis matrixs generated by the row exchanged in basis matrix have the LDPC code identical with the LDPC code that the basis matrix of Figure 26 defines.In addition, for Code And Decode, though be expert at exchanged after use basis matrix, the performance of Code And Decode operation also can be identical with the basis matrix of Figure 26.

Under performance background, good performance and low frame error rate (FER) synonym.

In the following description, the method sending and receive the data of being encoded by LDPC code is described.More particularly, base displacing matrix in basis matrix and permuting information is included in for launching basis matrix.After generation parity check matrix H, use parity check matrix H coding or decoding input source data.The example provided for the method for Code And Decode below can relate between mobile subscriber station (MSS) and base station (BS), send the Code And Decode used in data with reference to IEEE 802.16e specification in BWA.

When MSS enters community, MSS and BS sends with reception SBC-REQ with SBC-RSP message to exchange the capacity of MSS and BS.Table 1 and table 2 illustrate the form of SBC-REQ and SBC-RSP message respectively.

Table 1

Grammer	Size	Annotation
			SBC-REQ_Message_Fromat(){
Management Message Type＝26	8 bits
			TLV Encoded Information	Variable	TLV specifies
}

Table 2

Grammer	Size	Annotation
			SBC-RSP_Message_Fromat(){
Management_Message Type＝27	8 bits
			TLV Encoded Information	Variable	TLV specifies
}

The function of MSS and BS comprises TLV message.The channel coding schemes supported by MSS and BS is included in TLV field.

Table 3 and table 4 illustrate the form of TLV field.Specifically, table 3 and table 4 indicate the demodulator option for downlink data receipt that can find in IEEE 802.16e specification and the modulator option sent for uplink data.In table 3 and 4, corresponding demodulation scheme is not supported in bit value " 0 " instruction and corresponding modulation scheme is supported in bit value " 1 " instruction.

Table 3

Table 4

Although lower code check generally means higher coding gain, the data volume that can send in given bandwidth reduces.In addition, according to radio channel state determination transmission rate.

In good wireless channel environment, send by using higher code check and can send more data in given bandwidth.Otherwise, in severe wireless channel environment, send by using low bit-rate and increase transmission success rate.By channel quality indicating channel (CQICH), channel information is sent to data sending terminal from data receiver.Transmitting terminal by using the method determination modulation order of such as Quadrature Phase Shift Keying (QPSK), 16 quadrature amplitude modulation (QAM) and 64QAM, and according to CQICH information and available channel resources determination code check.

If MSS sends data to BS after the cataloged procedure by use LDPC code carries out chnnel coding, then MSS is LDPC chnnel coding by location uplink channel descriptor (UCD) burst general introduction coding designation data before the data.UCD comprises code rate information.BS uses the information decoding data received from UCD.Table 5 illustrates the example of UCD burst general introduction coded format.

Table 5

If BS sends the data of LDPC chnnel coding to MSS, then BS is LDPC chnnel codings by these data of downlink channel descriptor (DCD) burst general introduction coding instruct MS S before being positioned at data.DCD comprises code check and code rate information.BS uses the information decoding data received from DCD.Table 6 illustrates the example of DCD burst general introduction coded format.

Table 6

It is below the explanation of the method using LDPC code coded data in the encoder of reflector.According to IEEE 802.16e specification, receive data from upper strata within the physical layer.Within the physical layer before coding, data, by some processes, comprise filling, randomizing data and packet concatenation process.If filling process comprises the size not meeting fixed channel encoding block from the size of the data of upper strata reception, then add " 1 " to data rear portion to meet fixing size.If randomizing data process comprises sequentially growth data have fixed mode to prevent input data, when symbol unmodulated during sending occurs, may produced problem when receiving terminal recovered clock.Packet concatenation process comprise encoding block is set size to adapt to given amount of bandwidth.The encoding block determined by these processes is

{ 36,42,48,54,56,60,63,64,66,72,78,80,81,84,88,90,96,99,102,104,108,112,114,117,120,128,132,135,136,138, one of 144,152,153,160,162,168,171,176,180,184,189,192,198,207,216}.The input source data of transmitting terminal encoder are determined after said process.

By physical channel, the data of coding are sent to receiving terminal.As for IEEE 802.16e specification, before transmitting according to OFDM symbol mapped coded data.Specifically, the modulation order of mapping symbols determines after the consideration size of given bandwidth and the state of transmitting channel.

Industrial usability

To one skilled in the art, obviously can make various changes and modifications the present invention without departing from the spirit or scope of the present invention.Thus, the invention is intended to cover the modifications and variations of the present invention in claims and its equivalency range.

Claims (16)

1. use the method that low-density checksum (LDPC) code is encoded to data, described method comprises:

Generate parity matrix by each integer value of replacing basis matrix with the matrix of correspondence, wherein when code check is 2/3, described basis matrix is as follows:

$\begin{array}{cccccccccccccccccccccccc}2& -1& 19& -1& 47& -1& 48& -1& 36& -1& 82& -1& 47& -1& 15& -1& X& 0& -1& -1& -1& -1& -1& -1\\ -1& 69& -1& 88& -1& 33& -1& 3& -1& 16& -1& 37& -1& 40& -1& 48& -1& 0& 0& -1& -1& -1& -1& -1\\ 10& -1& 86& -1& 62& -1& 28& -1& 85& -1& 16& -1& 34& -1& 73& -1& -1& -1& 0& 0& -1& -1& -1& -1\\ -1& 28& -1& 32& -1& 81& -1& 27& -1& 88& -1& 5& -1& 56& -1& 37& -1& -1& -1& 0& 0& -1& -1& -1\\ 23& -1& 29& -1& 15& -1& 30& -1& 66& -1& 24& -1& 50& -1& 62& -1& -1& -1& -1& -1& 0& 0& -1& -1\\ -1& 30& -1& 62& -1& 54& -1& 14& -1& 0& -1& 30& -1& 74& -1& 0& -1& -1& -1& -1& -1& 0& 0& -1\\ 32& -1& 0& -1& 15& -1& 56& -1& 85& -1& 5& -1& 6& -1& 52& -1& 0& -1& -1& -1& -1& -1& 0& 0\\ -1& 0& -1& 47& -1& 13& -1& 61& -1& 84& -1& 55& -1& 78& -1& 41& X& -1& -1& -1& -1& -1& -1& 0\end{array}$

Wherein, "-1 " represents the null matrix of 96 × 96, " 0 " represents the unit matrix of 96 × 96, and positive integer represents that wherein " X " represents the integer from 0 to 95 by the often row of the unit matrix of described 96 × 96 described positive integer that to be shifted in identical direction is generated permutation matrix; And

Described parity matrix is used to encode described data.

2. method according to claim 1, wherein, " X " is 95.

3. method according to claim 1, wherein, generates described parity matrix and comprises:

First value of being replaced each element corresponding to described basis matrix by the second value of each element to correspond to the second basis matrix generates described second basis matrix, wherein, determines each second value based on following equalities:

Shift (z)=floor (shift (z _max) z/z _max), wherein " shift (z _max) " be described first value, " shift (z) " is described second value, and " floor (x) " representative is towards the integer of negative infinity closest to x, and z _maxbe 96, wherein, z is less than z _max; And

Each second value of described second basis matrix is replaced to generate described parity matrix with second permutation matrix or null matrix with the correspondence of z × z size.

4. method according to claim 3, wherein, the quantity of the row of described second basis matrix equals the quantity that arranges in described parity matrix divided by z and is multiplied by (1-code check).

5. method according to claim 3, wherein, generates described second basis matrix and comprises representing that the second value of the null matrix with z × z size is replaced expression and had z further _max× z _maxfirst value of the null matrix of size.

6. use low-density checksum (LDPC) code to a method for the decoding data of coding, described method comprises:

Generate parity matrix by each integer value of replacing basis matrix with the matrix of correspondence, wherein when code check is 2/3, described basis matrix is as follows:

$\begin{array}{cccccccccccccccccccccccc}2& -1& 19& -1& 47& -1& 48& -1& 36& -1& 82& -1& 47& -1& 15& -1& X& 0& -1& -1& -1& -1& -1& -1\\ -1& 69& -1& 88& -1& 33& -1& 3& -1& 16& -1& 37& -1& 40& -1& 48& -1& 0& 0& -1& -1& -1& -1& -1\\ 10& -1& 86& -1& 62& -1& 28& -1& 85& -1& 16& -1& 34& -1& 73& -1& -1& -1& 0& 0& -1& -1& -1& -1\\ -1& 28& -1& 32& -1& 81& -1& 27& -1& 88& -1& 5& -1& 56& -1& 37& -1& -1& -1& 0& 0& -1& -1& -1\\ 23& -1& 29& -1& 15& -1& 30& -1& 66& -1& 24& -1& 50& -1& 62& -1& -1& -1& -1& -1& 0& 0& -1& -1\\ -1& 30& -1& 62& -1& 54& -1& 14& -1& 0& -1& 30& -1& 74& -1& 0& -1& -1& -1& -1& -1& 0& 0& -1\\ 32& -1& 0& -1& 15& -1& 56& -1& 85& -1& 5& -1& 6& -1& 52& -1& 0& -1& -1& -1& -1& -1& 0& 0\\ -1& 0& -1& 47& -1& 13& -1& 61& -1& 84& -1& 55& -1& 78& -1& 41& X& -1& -1& -1& -1& -1& -1& 0\end{array}$

Wherein, "-1 " represents the null matrix of 96 × 96, " 0 " represents the unit matrix of 96 × 96, and positive integer represents that wherein " X " represents the integer from 0 to 95 by the often row of the unit matrix of described 96 × 96 described positive integer that to be shifted in identical direction is generated permutation matrix; And

Described parity matrix is used to decode the data of described coding.

7. method according to claim 6, wherein, " X " is 95.

8. method according to claim 6, wherein, generates described parity matrix and comprises:

First value of being replaced each element corresponding to described basis matrix by the second value of each element to correspond to the second basis matrix generates described second basis matrix, wherein, determines each second value based on following equalities:

Shift (z)=floor (shift (z _max) z/z _max), wherein " shift (z _max) " be described first value, " shift (z) " is described second value, and " floor (x) " representative is towards the integer of negative infinity closest to x, and z _maxbe 96, wherein, z is less than z _max; And

Each second value of described second basis matrix is replaced to generate described parity matrix with second permutation matrix or null matrix with the correspondence of z × z size.

9. method according to claim 8, wherein, the quantity of the row of described second basis matrix equals the quantity that arranges in described parity matrix divided by z and is multiplied by (1-code check).

10. method according to claim 8, wherein, generates described second basis matrix and comprises representing that the second value of the null matrix with z × z size is replaced expression and had z further _max× z _maxfirst value of the null matrix of size.

11. 1 kinds of devices using low-density checksum LDPC code to encode to input data, described device comprises:

Use the encoder that parity matrix is encoded to described input data, described parity matrix generates from the basis matrix of the code check definition for 2/3, and wherein said basis matrix is as follows:

$\begin{array}{cccccccccccccccccccccccc}2& -1& 19& -1& 47& -1& 48& -1& 36& -1& 82& -1& 47& -1& 15& -1& X& 0& -1& -1& -1& -1& -1& -1\\ -1& 69& -1& 88& -1& 33& -1& 3& -1& 16& -1& 37& -1& 40& -1& 48& -1& 0& 0& -1& -1& -1& -1& -1\\ 10& -1& 86& -1& 62& -1& 28& -1& 85& -1& 16& -1& 34& -1& 73& -1& -1& -1& 0& 0& -1& -1& -1& -1\\ -1& 28& -1& 32& -1& 81& -1& 27& -1& 88& -1& 5& -1& 56& -1& 37& -1& -1& -1& 0& 0& -1& -1& -1\\ 23& -1& 29& -1& 15& -1& 30& -1& 66& -1& 24& -1& 50& -1& 62& -1& -1& -1& -1& -1& 0& 0& -1& -1\\ -1& 30& -1& 62& -1& 54& -1& 14& -1& 0& -1& 30& -1& 74& -1& 0& -1& -1& -1& -1& -1& 0& 0& -1\\ 32& -1& 0& -1& 15& -1& 56& -1& 85& -1& 5& -1& 6& -1& 52& -1& 0& -1& -1& -1& -1& -1& 0& 0\\ -1& 0& -1& 47& -1& 13& -1& 61& -1& 84& -1& 55& -1& 78& -1& 41& X& -1& -1& -1& -1& -1& -1& 0\end{array}$

Wherein, "-1 " represents the null matrix of 96 × 96, " 0 " represents the unit matrix of 96 × 96, and positive integer represents that wherein " X " represents the integer from 0 to 95 by the often row of the unit matrix of described 96 × 96 described positive integer that to be shifted in identical direction is generated permutation matrix.

12. devices according to claim 11, wherein, described encoder comprises:

Memory module, for storing described basis matrix;

Base matrix generation module, the first value for being replaced each element corresponding to described basis matrix by the second value of each element to correspond to the second basis matrix generates described second basis matrix, wherein, each second value is determined based on following equalities:

Shift (z)=floor (shift (z _max) z/z _max), wherein " shift (z _max) " be described first value, " shift (z) " is described second value, and " floor (x) " representative is towards the integer of negative infinity closest to x, and z _maxbe 96, wherein, z is less than z _max;

Parity matrix generation module, replaces each second value of described second basis matrix to generate described parity matrix for the second permutation matrix of the correspondence to have z × z size or null matrix; And

Coding module, uses described parity matrix to encode to described input data.

13. devices according to claim 11, wherein, " X " is 95.

14. 1 kinds use low-density checksum LDPC code to the device of the decoding data of coding, and described device comprises:

Use parity matrix to the decoder of input decoding data, described parity matrix generates from the basis matrix of the code check definition for 2/3, and wherein said basis matrix is as follows:

$\begin{array}{cccccccccccccccccccccccc}2& -1& 19& -1& 47& -1& 48& -1& 36& -1& 82& -1& 47& -1& 15& -1& X& 0& -1& -1& -1& -1& -1& -1\\ -1& 69& -1& 88& -1& 33& -1& 3& -1& 16& -1& 37& -1& 40& -1& 48& -1& 0& 0& -1& -1& -1& -1& -1\\ 10& -1& 86& -1& 62& -1& 28& -1& 85& -1& 16& -1& 34& -1& 73& -1& -1& -1& 0& 0& -1& -1& -1& -1\\ -1& 28& -1& 32& -1& 81& -1& 27& -1& 88& -1& 5& -1& 56& -1& 37& -1& -1& -1& 0& 0& -1& -1& -1\\ 23& -1& 29& -1& 15& -1& 30& -1& 66& -1& 24& -1& 50& -1& 62& -1& -1& -1& -1& -1& 0& 0& -1& -1\\ -1& 30& -1& 62& -1& 54& -1& 14& -1& 0& -1& 30& -1& 74& -1& 0& -1& -1& -1& -1& -1& 0& 0& -1\\ 32& -1& 0& -1& 15& -1& 56& -1& 85& -1& 5& -1& 6& -1& 52& -1& 0& -1& -1& -1& -1& -1& 0& 0\\ -1& 0& -1& 47& -1& 13& -1& 61& -1& 84& -1& 55& -1& 78& -1& 41& X& -1& -1& -1& -1& -1& -1& 0\end{array}$

Wherein, "-1 " represents the null matrix of 96 × 96, " 0 " represents the unit matrix of 96 × 96, and positive integer represents that wherein " X " represents the integer from 0 to 95 by the often row of the unit matrix of described 96 × 96 is generated permutation matrix in the equidirectional described positive integer that is shifted.

15. devices according to claim 14, wherein, described decoder comprises:

Memory module, for storing described basis matrix;

Base matrix generation module, the first value for being replaced each element corresponding to described basis matrix by the second value of each element to correspond to the second basis matrix generates described second basis matrix, wherein, each second value is determined based on following equalities:

Shift (z)=floor (shift (z _max) z/z _max), wherein " shift (z _max) " be described first value, " shift (z) " is described second value, and " floor (x) " representative is towards the integer of negative infinity closest to x, and z _maxbe 96, wherein, z is less than z _max;

Parity matrix generation module, replaces each second value of described second basis matrix to generate described parity matrix for the second permutation matrix of the correspondence to have z × z size or null matrix; And

Decoder module, uses described parity matrix to input decoding data.

16. devices according to claim 14, wherein, " X " is 95.