CN101997645A

CN101997645A - Header encoding device and method for single carrier (SC) and/or orthogonal frequency division multiplexing (OFDM)

Info

Publication number: CN101997645A
Application number: CN2010101564056A
Authority: CN
Inventors: 贾森·A·切思戈; 巴中·申
Original assignee: Zyray Wireless Inc
Current assignee: Broadcom Corp; Zyray Wireless Inc
Priority date: 2009-08-21
Filing date: 2010-03-29
Publication date: 2011-03-30
Anticipated expiration: 2030-03-29
Also published as: EP2320574B1; CN101997645B; EP2320574A3; HK1155584A1; EP2320574A2

Abstract

The present invention relates to a header encoding method for SC and/or OFDM signaling using shortening, puncturing, and/or repetition in accordance with encoding header information within a frame to be transmitted via a communication channel employs different respective puncturing patterns as applied to different portions thereof. For example, a first puncturing pattern is applied to a first portion of the frame, and a second puncturing pattern is applied to a second portion of the frame (the second portion may be a repeated version of the first portion). Shortening (e.g., by padding 0-valued bits thereto) may be made to header information bits before they undergo encoding (e.g., in an LDPC encoder). One or both of the information bits and parity/redundancy bits output from the encoder undergo selective puncturing. Moreover, one or both of the information bits and parity/redundancy bits output from the encoder may be repeated/spread before undergoing selective puncturing to generate a header.

Description

The header code device and the method that are used for single carrier and/or OFDM

Technical field

The present invention relates to the interior coding techniques of communication system with field in the frame that is transmitted, more particularly, the technology that relates to the coding header information in a kind of communication equipment of in such communication system, working according to one or both in single carrier (SC) or the OFDM (OFDM).

Background technology

Data communication system sustainable development for many years.Recently one type the communication system that receives much concern is to adopt the communication system of iteration error correcting code (ECC).Special concern be the communication system that adopts low-density checksum (LDPC) sign indicating number.For specific signal to noise ratio (snr), adopt the communication system that repeatedly reaches sign indicating number can reach the error rate (BER) lower usually than other coding.

One of this development field continues and main sensing all recently realizes specific bit error rate in the communication system reducing required noise as far as possible always.The dreamboat of always making great efforts is to reach shannon limit in the communication channel (Shannon ' limit).Shannon limit can be regarded as the data transfer rate that uses in the communication channel, and it has specific signal to noise ratio, realizes the error-free transmission by this communication channel.In other words, shannon limit is the theoretical boundary of specific modulation and code check lower channel capacity.

The LDPC sign indicating number has been proved to be able to the decoding performance that provides fabulous, can reach shannon limit in some cases.For example, some LDPC decoder has been proved to be and has been in the scope of theoretic shannon limit 0.3dB (decibel).Although it is that 1,000,000 abnormal LDPC code realizes that this shows that the application of LDPC sign indicating number in communication system is very promising that this example is to use length.

The use of ldpc coded signal is continued to develop in many new applications.Can adopt some possible communication system of ldpc coded signal to comprise to adopt 4 line twisted-pair cables to be used for Fast Ethernet and use the communication system of the 10Gpbs ethernet operation of the novel standard of IEEE 802.3an (10GBASE-T) (for example according to) and the communication system of working at wireless environment (the IEEE802.11 environment space that for example comprises IEEE 802.11n new standard).

For any so a kind of particular communications system application, realize expecting very much of error correcting code near capacity.The purposes in their these application in ultra high data rate communication system applications field has been got rid of in the stand-by period constraint of using the legacy link sign indicating number to relate to simply.

As a rule, in the communication system environment that adopts the LDPC sign indicating number, there is first communication equipment that is positioned at an end of communication channel and has encoder performance, and the second communication equipment that is positioned at the communication channel other end and has decoder capabilities.In most cases, the one or both in these two communication equipments has encoder performance (for example in intercommunication system).The LDPC sign indicating number also can be applied in various other application, comprise the application of those storage that adopt certain form (for example hard disk drive (HDD) is used and other memory device), wherein data are encoded before being written into storage medium, and data are decoded after reading from storage medium/fetching then.

Summary of the invention

Device that the present invention relates to and method of operation have carried out representing fully and describing in conjunction with at least one width of cloth accompanying drawing, and have obtained more complete elaboration in the claims.

According to an aspect of the present invention, a kind of device comprises:

Fill up circuit, be used at least one bit is filled up a plurality of header information bits, fill up bit block thereby generate;

The LDPC encoder circuit is connected to the described circuit of filling up, thereby the described bit block of filling up that is used to encode generates a plurality of LDPC coded-bits;

Reduction/deletion (puncture) circuit is connected to described encoder circuit, is used for:

Reduce in described a plurality of LDPC coded-bit corresponding at least one bit of being filled up described at least one bit in a plurality of header information bits, thereby generate a plurality of reduction coded-bits;

Described a plurality of reduction coded-bits are carried out repeated encoding, thereby generate at least one copy of described a plurality of reduction coded-bits;

Delete at least one in described a plurality of reduction coded-bit, thereby generate more than first remaining bits; And

Delete at least one bit in described at least one copies of described a plurality of reduction coded-bits, thereby generate more than second remaining bits; And

Expander circuit is connected to described reduction/deletion circuit, is used to handle described more than first remaining bits and more than second remaining bits, thereby generates header.

As preferably, described device further comprises:

The scrambler circuit, be used for described a plurality of header information bits are offered described fill up circuit before, described a plurality of header information bits are carried out scrambling.

As preferably, described header to be inserted in the signal, described signal is transmitted into communication channel by using the single carrier signaling from described device.

As preferably, described expander circuit generates described header by following setting:

Described a plurality of header information bits;

It then is the copy of a plurality of header information bits;

Then be first group of remaining bits;

Then be second group of remaining bits.

Described a plurality of header information bits;

Then be first group of remaining bits;

It then is the copy of a plurality of header information bits;

Then be second group of remaining bits.

As preferably, described at least one copy of described a plurality of reduction coded-bits comprises the first authentic copy of described a plurality of reduction coded-bits and the triplicate of described a plurality of reduction coded-bits; And

Described reduction/deletion circuit is used for:

Delete at least one bit of the described first authentic copy of described a plurality of reduction coded-bits, thereby generate described more than second remaining bits; And

Delete at least one bit of the described triplicate of described a plurality of reduction coded-bits, thereby generate more than the 3rd remaining bits;

Described expander circuit is handled described more than first remaining bits, more than second remaining bits and more than the 3rd remaining bits, thereby generates described header.

As preferably, described header to be inserted in the signal, described signal is transmitted into communication channel by using the OFDM signaling from described device.

Described a plurality of header information bits;

It then is the first authentic copy of a plurality of header information bits;

It then is the triplicate of a plurality of header information bits;

Then be first group of remaining bits;

Then be second group of remaining bits; And

Then be the 3rd group of remaining bits.

Described a plurality of header information bits;

Then be first group of remaining bits;

It then is the first authentic copy of a plurality of header information bits;

Then be second group of remaining bits;

It then is the triplicate of a plurality of header information bits; And

Then be the 3rd group of remaining bits.

As preferably, described device generates the frame that includes described header and data;

Described header is pointed out a plurality of information or the data corresponding to described frame, and described data comprise the code check of frame length, digital coding type, digital coding and at least a modulation type of modulated data symbol.

As preferably, described device is a communication equipment;

Described communication equipment be implemented in following at least a in: satellite communication system, wireless communication system, wired communication system, optical fiber telecommunications system.

According to an aspect of the present invention, a kind of device comprises:

Scrambler circuit is used for a plurality of header information bits are carried out scrambling, thereby generates a plurality of header information bits through scrambling;

Fill up circuit, be used at least one bit is filled up described a plurality of information bits through scrambling, fill up bit block thereby generate;

Reduction/deletion circuit is connected to described encoder circuit, is used for:

Reduce in described a plurality of LDPC coded-bit corresponding at least one bit of being filled up described at least one bit in a plurality of header information bits of scrambling, thereby generate a plurality of reduction coded-bits;

The employing first deletion model (puncturing pattern) is deleted at least one in described a plurality of reduction coded-bit, thereby generates more than first remaining bits; And

Adopt the second deletion model to delete in described at least one copy of described a plurality of reduction coded-bits at least one, thereby generate more than second remaining bits; And

Expander circuit is connected to described reduction/deletion circuit, is used to handle described more than first remaining bits and more than second remaining bits, thereby generates header; Wherein,

Described device is used to generate the frame that includes described header and data;

As preferably, described header is placed in the signal, and described signal is transmitted into communication channel by using the single carrier signaling from described device.

Described a plurality of header information bits through scrambling;

It then is the copy of described a plurality of header information bits through scrambling;

Then be first group of remaining bits;

Then be second group of remaining bits.

Described a plurality of header information bits through scrambling;

Then be first group of remaining bits;

Then be second group of remaining bits.

Described reduction/deletion circuit is used for:

Described a plurality of header information bits through scrambling;

It then is the first authentic copy of described a plurality of header information bits through scrambling;

It then is the triplicate of described a plurality of header information bits through scrambling;

Then be first group of remaining bits;

Then be second group of remaining bits; And

Then be the 3rd group of remaining bits.

Described a plurality of header information bits through scrambling;

Then be first group of remaining bits;

Then be second group of remaining bits;

It then is the triplicate of described a plurality of header information bits through scrambling; And

Then be the 3rd group of remaining bits.

As preferably, described device is a communication equipment;

According to an aspect of the present invention, a kind of method comprises:

At least one bit is filled up in a plurality of header information bits, filled up bit block thereby generate;

Thereby adopt the described bit block of filling up of LDPC encoder circuit coding to generate a plurality of LDPC coded-bits;

The employing first deletion model is deleted at least one in described a plurality of reduction coded-bit, thereby generates more than first remaining bits; And

Handle described more than first remaining bits and more than second remaining bits, thereby generate header.

As preferably, described method further comprises:

Described a plurality of header information bits are offered described fill up circuit before, described a plurality of header information bits are carried out scrambling.

As preferably, described method further comprises:

Described header is inserted in the signal, and described signal is transmitted into communication channel by using the single carrier signaling.

As preferably, described method further comprises by following setting and generates described header:

Described a plurality of header information bits;

It then is the copy of a plurality of header information bits;

Then be first group of remaining bits;

Then be second group of remaining bits.

Described a plurality of header information bits;

Then be first group of remaining bits;

It then is the copy of a plurality of header information bits;

Then be second group of remaining bits.

Described reduction/deletion circuit is used for:

As preferably, described method further comprises:

Described header is inserted in the signal, and described signal is transmitted into communication channel by using the OFDM signaling.

Described a plurality of header information bits;

It then is the first authentic copy of a plurality of header information bits;

It then is the triplicate of a plurality of header information bits;

Then be first group of remaining bits;

Then be second group of remaining bits; And

Then be the 3rd group of remaining bits.

Described a plurality of header information bits;

Then be first group of remaining bits;

It then is the first authentic copy of a plurality of header information bits;

Then be second group of remaining bits;

It then is the triplicate of a plurality of header information bits; And

Then be the 3rd group of remaining bits.

As preferably, described method is implemented in the communication equipment;

Various advantage of the present invention, various aspects and character of innovation, and the details of the embodiment of example shown in it will describe in detail in following description and accompanying drawing.

Description of drawings

The invention will be further described below in conjunction with drawings and Examples, in the accompanying drawing:

Fig. 1 is the schematic diagram of an embodiment of communication system;

Fig. 2 is the schematic diagram of an embodiment of communication system;

Fig. 3 is the bipartite graph of an embodiment of LDPC sign indicating number;

Fig. 4 A is the schematic diagram with reference to an embodiment of the variable node renewal of LDPC sign indicating number bipartite graph;

Fig. 4 B is the schematic diagram with reference to an embodiment of the check-node renewal of LDPC sign indicating number bipartite graph;

Fig. 5 is the schematic diagram of an example of frame, shows these appropriate sections of lead code, header and data in it;

Thereby Fig. 6 is used to handle the schematic diagram of an embodiment that header information bits generates the device of header;

Thereby Fig. 7 handles header information bits according to 1/8 efficient coding rate to generate the schematic diagram of header with the embodiment of the device of physical layer (PHY) frame that is used for sending by the single carrier signaling;

Thereby Fig. 8 handles header information bits according to 1/12 efficient coding rate to generate the schematic diagram of header with the embodiment of the device of the PHY frame that is used for sending by the OFDM signaling;

Fig. 9 be according to K/N (K and N are integer) thus the efficient coding rate handle header information bits and generate the schematic diagram of header with the embodiment of the device of the PHY frame that is used for sending by the single carrier signaling;

Thereby Figure 10 handles header information bits according to 1/8 efficient coding rate to generate the schematic diagram of header with the embodiment of the device of the PHY frame that is used for sending by the single carrier signaling;

Thereby Figure 11, Figure 12 and Figure 13 handle header information bits by the deletion of adopt selecting, efficient coding rate according to 1/7 to generate the schematic diagram of header with each embodiment of the device of the PHY frame that is used for sending by the single carrier signaling;

Thereby Figure 14 handles header information bits by the deletion of adopt selecting, efficient coding rate according to 9/56 to generate the schematic diagram of header with the embodiment of the device of the PHY frame that is used for sending by the single carrier signaling;

Figure 15 is the performance comparison diagram of various LDPC sign indicating numbers, and each LDPC sign indicating number adopts corresponding header coding techniques, uses single carrier signaling and Quadrature Phase Shift Keying (QPSK) modulation on self adaptation white Gauss noise (AWGN) communication channel;

Figure 16 is the performance comparison diagram of various LDPC sign indicating numbers, and each LDPC sign indicating number adopts corresponding header coding techniques, uses single carrier signaling and exponential decay power delay profile (PDP) Rayleigh (Rayleigh) decline communication channel QPSK modulation;

Figure 17 be by the deletion of adopt selecting, according to K/N (K and N are integers) thus the efficient coding rate handle header information bits and generate the schematic diagram of header with the embodiment of the device of the PHY frame that is used for sending by the OFDM signaling;

Thereby Figure 18 handles header information bits according to 1/12 efficient coding rate to generate the schematic diagram of header with each embodiment of the device of the PHY frame that is used for sending by the OFDM signaling;

Thereby Figure 19, Figure 20 and Figure 21 handle header information bits by the deletion of adopt selecting, efficient coding rate according to 2/21 to generate the schematic diagram of header with each embodiment of the device of the PHY frame that is used for sending by the OFDM signaling;

Thereby Figure 22 handles header information bits by the deletion of adopt selecting, efficient coding rate according to 3/28 to generate the schematic diagram of header with each embodiment of the device of the PHY frame that is used for sending by the OFDM signaling;

Figure 23 is the performance comparison diagram of various LDPC sign indicating numbers, and each LDPC sign indicating number adopts corresponding header coding techniques, uses OFDM signaling and Quadrature Phase Shift Keying (QPSK) modulation on self adaptation white Gauss noise communication channel;

Figure 24 is the performance comparison diagram of various LDPC sign indicating numbers, and each LDPC sign indicating number adopts corresponding header coding techniques, uses OFDM signaling and exponential decay power delay profile (PDP) Rayleigh fading communication channel QPSK modulation;

Figure 25 be by the deletion of adopt selecting (except deletion odd even/redundant bit is also deleted information bit), according to K/N (K and N are integers) thus the efficient coding rate handle header information bits and generate the schematic diagram of header with each embodiment of the device of the PHY frame that is used for sending by the single carrier signaling;

Figure 26 is the performance comparison diagram of various LDPC sign indicating numbers, and each LDPC sign indicating number adopts corresponding header coding techniques, uses single carrier signaling and Quadrature Phase Shift Keying (QPSK) modulation on self adaptation white Gauss noise communication channel;

Figure 27 is the performance comparison diagram of various LDPC sign indicating numbers, and each LDPC sign indicating number adopts corresponding header coding techniques, uses single carrier signaling and exponential decay power delay profile (PDP) Rayleigh fading communication channel QPSK modulation;

Thereby Figure 28 A is used to handle the flow chart of an embodiment that header information bits generates the method for header;

Thereby Figure 28 B is used to handle the flow chart of another embodiment that header information bits generates the method for header.

Embodiment

The target of digital communication system is from a position or subsystem sends numerical data to another position or subsystem error-freely or with acceptable low error rate.As shown in Figure 1, data can be transmitted by the various communication channels in the plurality of communication systems: the media of magnetic media, wired, wireless, optical fiber, copper cable and other type.

Fig. 1 and Fig. 2 are respectively 100 and 200 schematic diagrames according to the communication system of different embodiments of the invention.

As shown in Figure 1, communication system 100 comprises a communication channel 199, and the communication equipment 110 (comprising transmitter 112 that has encoder 114 and the receiver 116 that has decoder 118) that will be positioned at communication channel 199 1 ends communicates to connect with another communication equipment 120 that is positioned at communication channel 199 other ends (comprising transmitter 126 that has encoder 128 and the receiver 122 that has decoder 124).In certain embodiments, communication equipment 110 and 120 all can only comprise a transmitter or a receiver.Communication channel 199 can realize by various dissimilar media (for example, utilize disc type satellite earth antenna 132 and 134 satellite communication channel 130, utilize signal tower 142 and 144 and/or radio communication channel 140, the wire communication channel 150 of local antenna 152 and 154 and/or utilize electrical-optical (E/O) interface 162 and the fiber optic communication channel 160 of light-electricity (O/E) interface 164).In addition, thus can link together by more than one media and form communication channel 199.

Not expect the error of transmission that occurs in the communication system in order reducing, to adopt error correction and channel coding schemes usually.Generally, these error correction and channel coding schemes comprise the use of transmitter end encoder and the use of receiver end decoder.Certainly, any such communication equipment in the communication system of describing among the application that is implemented in such communication system or other type, it himself can be the communication equipment of transceiver type, have the coder module signal to be sent (for example information in the code signal) that is used to encode in it, also have decoder module and be used to the signal (for example decoded signal is to estimate information encoded in it) of decoding and receiving.

The Code And Decode embodiment of any kind of describing among the application, all can be applicable to any desired communication system (for example, comprising that those are out of shape according to Fig. 1), any information storing device (for example HDD, network information memory device and/or server) or any hope and carry out the application of information coding and/or decoding.

In the communication system 200 as shown in Figure 2, transmitting terminal in communication channel 299, information bit 201 is provided for transmitter 297, transmitter 297 can use encoder and symbol mapper 200 (can be considered as respectively is different functional blocks 222 and 224) to carry out coding to these information bits 201, thereby generate a centrifugal pump modulation symbol sequence 203, offer then and send driver 230.Send driver 230 use DAC (digital to analog converter) 232 and generate the continuous signal 204 that sends of a time, then by transmitting filter 234, the time sends signal 205 continuously after the filtering of the fully suitable communication channel 299 of generation.Receiving terminal in communication channel 299, time, continuous received signal 206 was provided for AFE (AFE (analog front end)) 260, and AFE 260 comprises receiving filter 262 (continuous received signal 207 of time after the generation filtering) and ADC (analog to digital converter) 264 (generating discrete time received signal 208).Tolerance maker (metric generator) 270 compute signs tolerance 209 (for example symbol and/or bit bases (bit basis)), decoder 280 uses symbol tolerance 209 to make centrifugal pump modulation symbol the best-estimated 210 with coding information bit within it.

In addition, the signal of a kind of particular type that foundation some aspect of the present invention and/or embodiment handle comprises the frame of being made up of various field, and one of them field is feature with the header.The such header information that comprises in the frame that sends according to single carrier and/or OFDM signaling in the communication system.Coding to header information can and/or repeat to finish by reduction, deletion.

Decoder in the previous embodiment has various feature of the present invention.In addition, following some accompanying drawings and relevant description will be introduced other and the specific embodiment (introduction of some embodiment is more detailed) of supporting equipment of the present invention, system, functional and/or method.The signal of a kind of particular type of handling according to the present invention is a ldpc coded signal.Below provide the summary description of LDPC sign indicating number.

Fig. 3 is the schematic diagram of the LDPC sign indicating number bipartite graph 300 of an embodiment.In the prior art, the LDPC bipartite graph is also referred to as Tan Natu (Tanner Graph) sometimes.The LDPC sign indicating number can be considered as having the code of binary parity check matrix, and like this, nearly all element value is 0 (for example: this binary parity check matrix is a sparse matrix) in this matrix.For example, H=(h _{I, j}) _{N * M}Can be counted as block length is the parity matrix of the LDPC sign indicating number of N.

The LDPC sign indicating number is a linear block code, so the set x ∈ C of all code words is distributed in the kernel of parity check matrix H.

H x^{T} = 0, &ForAll; x &Element; C - - - (1)

For the LDPC sign indicating number, H is the sparse binary matrix of m * n dimension.Every row of H is corresponding to a parity check, a group element h _IjExpression data symbol j participates in parity check i.Every row of H are corresponding to code-word symbol.

For each code word x, n symbol arranged, wherein m is parity character.Therefore, encoding rate r is given as:

r＝(n-m)/n (2)

The weight of row and column is defined as the quantity of set element of the given row or column of H respectively.The set element of H is chosen to be the performance requirement that satisfies coding.1 quantitaes is d in the i row of parity check matrix H _v(i), the quantitaes of the j of parity check matrix H 1 in capable is d _c(j).If to all i, d _v(i)=d _v, to all j, d _c(j)=d _c, so this LDPC sign indicating number is called as (d _v, d _c) regular LDPC sign indicating number, otherwise be called as abnormal LDPC code.

Introduction about the LDPC sign indicating number please refer to following three parts of reference papers:

[1]R.Gallager，Low-Dentisy?Parity-Check?Codes，Cambridge，MA：MITPress，1963.

[2]R.G.Gallager，“Low?Dentisy?Parity?Check?Codes”，IRE?Trans.Info.Theory，Vol.IT-8，Jan.1962，PP.21-28.

[3]M.G.Luby，M.Mitzenmacher，M.A.Shokrollahi，D.A.Spielman，and?V.Stemann，“Practical?Loss-Resilient?Codes”，Proc.29 ^th?Symp.On?Theory?ofComputing，1997，pp.150-159.

Rule LDPC sign indicating number can be expressed as bipartite graph 300, the left node of its parity matrix is code bit variable (or being " variable node " (or " bit node ") 310 in the bit coding/decoding method of adapted for decoding LDPC code signal), and the right side node is check equations (or " check-node " 320).Bipartite graph 300 (or being called smooth Figure 30 of receiving 0) by the LDPC sign indicating number of H definition can be defined by N variable node (for example, N bit node) and M check-node.Each variable node in N variable node 310 all has accurate d _v(i) individual limit (as limit 330) connects for example v of bit node _i312 with one or more check-nodes (M check-node interior).Limit 330 shown in the figure connects position node v _i312 with check-node c _j322.This d _vIndividual limit is (as d _vShown in 314) quantity d _vThe degree i that is called as variable node.Similarly, each check-node in M check-node 320 all has accurate d _c(j) individual limit is (as d _cShown in 324), connect this node and one or more variable node (or bit node) 310.The quantity d on this limit _cThe degree j that is called as check-node.

Variable node v _i(or bit node b _i) 312 with check-node c _jLimit 330 between 322 can be defined as e=(i, j).But on the other hand, (i, j), then the node on this limit can be expressed as e=(v (e), c (e)) (or e=(b (e), c (e))) to give deckle e=.Perhaps, the limit in the bipartite graph is corresponding to the set element of H, wherein, and set element h _JiRepresent that a limit connects bit (for example, variable) node i and parity check node j.

Suppose and provide variable node v _i(or bit node b _i), can be with from node v _i(or bit node b _i) one group of limit of launching is defined as E _V(i)={ e/v (e)=i} (or E _b(i)={ e/b (e)=i}).These limits are called as the bit limit, and are called as bit limit message corresponding to the message on these bit limits.

Suppose and provide check-node c _j, can be with from node c _jOne group of limit of launching is defined as E _c(j)={ e/c (e)=j}.These limits are called as the verification limit, and are called as verification limit message corresponding to the message on these verification limits.Then, the result of derivation is | E _v(i) |=d _v(or | E _b(i) |=d _b) and | E _c(j) |=d _c

In general, the code that any available bipartite graph is represented, its feature all is a graphic code.Be noted that the also available bipartite graph of abnormal LDPC code represents.But the degree of the every group node in the abnormal LDPC code can be selected according to some distribution.Therefore, for two different variable nodes of abnormal LDPC code With

| E _v(i ₁) | may be not equal to | E _v(i ₂) |.For two check-nodes also is this relation.The notion of abnormal LDPC code has provided introduction in above-mentioned reference paper [3].

In a word, by the diagram of LDPC sign indicating number, the parameter of LDPC sign indicating number can be defined by the degree that distributes, and described in the above-mentioned reference paper [3], relevant description is arranged also in the following reference paper as M.Luby etc.:

[4]T.J.Richardson?and?R.L.Urbanke，“The?capacity?of?low-densityparity-check?code?under?message-passing?decoding”，IEEE?Trans.Inform.Theory，Vol.47，No.2，Feb.2001，pp.599-618.

This distribution can be described below:

Use λ _iExpression is from the mark on the limit of the variable node emission of i degree, ρ _iExpression is from the mark on the limit of the check-node emission of degree i, then degree distribute to (λ ρ) is defined as follows:

With M wherein _vAnd M _cThe maximal degree of representing variable node and check-node respectively.

Though a plurality of embodiment described here adopts regular LDPC sign indicating number, be noted that feature of the present invention both had been applicable to regular LDPC sign indicating number, also was applicable to abnormal LDPC code.

It is also noted that the most embodiment that describe among the application adopt the such name of statement of " bit node " and " bit limit message " or equivalence.But in the prior art of LDPC decoding, " bit node " and " bit limit message " is otherwise known as " variable node " and " variable edge message " usually, and therefore, bit value (or variate-value) is that those attempt estimated value.These two kinds of names can be adopted by the application.

Fig. 4 A is the schematic diagram with reference to an embodiment 401 of the variable node renewal of LDPC sign indicating number bipartite graph.Fig. 4 B is the schematic diagram with reference to an embodiment 402 of the check-node renewal of LDPC sign indicating number bipartite graph.This two secondary figure can be bonded to each other and consider.

Receive next signal through suitable demodulation (for example, in AFE (analog front end), handling) from communication channel, generate the bit sequence that receives with digital sample, filtering, gain-adjusted etc.Then, at each bit position in the bit sequence that receives, calculate log-likelihood ratio (LLR).These log-likelihood ratios correspond respectively to bit node and its corresponding LDPC bipartite graph of LDPC sign indicating number.

In the initialization procedure, the bit limit message (for example, external information (extrinsic information)) on every limit of launching from each variable node is adopted log-likelihood ratio.Then, use original bit limit message (LLR that for example calculates) to carry out code check node processing or check-node renewal.Verification limit message after these upgrade is used to then carry out that bit node is handled or bit node upgrades, with renewal be used for the decoding soft information of variable node of iteration next time.The soft information of this variable node is used to calculate the variable node limit message (external information) that is used for this iteration of next time decoding subsequently.

These variable node limit message are used for code check node processing or check-node then to be upgraded, to calculate the verification limit message after the renewal.Subsequently, the verification limit message of these recent renewals is used to carry out the bit node processing or bit node upgrades, to upgrade the soft information of variable node once more.

After the last decoding iteration (it can be determined based on some parameter (when for example all check of Yu Ding decoding iterations or LDPC sign indicating number are zero)), the soft information via of the variable node that calculates at last limits the estimated value that (for example in limiter) back generates the bit in the signal that is coded in reception firmly.

Fig. 5 shows the frame 500 of an embodiment, shows these appropriate sections of lead code, header and data in it.Frame, for example physical layer frame is sent to communication channel from communication equipment, can have the form of using among this figure.Though a large amount of frame of describing among the application is with reference to describing with the number format, but digital signal can be through various processing (for example certainly, digital-to-analogue conversion, frequency inverted, filtering (simulation or numeral), convergent-divergent or the like) to generate the duration signal, it is launched into this communication channel.

Frame shown in Fig. 5 comprises lead code, header and data (payload portions of the frame that is otherwise known as).Data generally include the actual information that is sent to the second place from primary importance.

Lead code comprises the one group of sequence (it can be repetition) at various application, and this application comprises: initial frame/pulse detection, carrier frequency are obtained, automatic gain is controlled (AGC), timing recovery, channel estimating, noise/interference are estimated and/or use the information of using at other.

In a kind of design, lead code is identical for single-carrier modulated with OFDM PHY pattern.Lead code can be encoded into one group of Gray (Golay) sequence (or other has the sequence of good correlation), uses BPSK to follow each symbol to carry out ± pi/2 the rotation of (promptly ± 90 °) to carry out coding.

Header information bits forms on " header " through coding (for example, using the code of the same type that is adopted with coded data or the distortion of same basic code).Header can use SC modulation or OFDM to carry out coded/modulated.OFDM uses the data subcarrier (for example 336) of some and the pilot tone/stator carrier wave of some (for example 16).By relatively, the SC modulation can be used the BPSK modulation, and each symbol carries out ± rotation of pi/2 (promptly ± 90 °).Header information bits (forming header through coding) includes the full detail that makes frame self-described required.For example, the information that comprises is corresponding to the modulation/coding that is used for data field (for example code check, type of code, constellation/mapping or the like), with eight bit byte or duration be the data length of unit, and/or any other training information (for example can for example use in the MIMO communication system at some wireless environment) according to the velocity of wave figuration.Data field can use SC modulation or use any modulation among the OFDM of any possible constellation and mapping.

Introduce a kind of method of new generation header among the application, its permission all provides preamble bit size flexibly at SC and OFDM PHY.It is a predetermined size (for example be generally the X bit, or concrete value for example being used for 448 bits and 672 bits that are used for OFDM PHY of SC PHY) that the big I of last output of header sets the goal.OFDM header and SC header coding is alignment (for example, using the LDPC sign indicating number of 3/4 code check of 672 sizes as the basis two kinds of models under yard).

In OFDM PHY, then PLCP header (header as shown in FIG.) after the lead code.The PLCP header is made up of several fields, and it defines the details of the PHY protocol Data Unit (PPDU) that is launched.Header is according to the coding of any method or equivalents and be modulated at this and illustrate.Below an embodiment of header fields has been described in the form relevant with OFDM.

OFDM table-header fields

Field name	Amount of bits	Initial bits	Describe
				Scrambler initialization	7	0	The bit X1-X7 of initial scrambler state
MCS
		5	7	Index to modulation and encoding scheme table
Length					18	12	The quantity of data eight bit groups in the PSDU.Scope is 0-262143
	Extra PPDU	1	30	Value be behind 1 this PPDU of expression followed by being another PPDU, and do not have IFS or lead code on one PPDU of back.Value is the PPDU that does not have other behind 0 this PPDU of expression.
Type of data packet					2	31	Type of data packet: 0-normal data packet 1-TRN-R packet
				2-TRN-T packet 3-reserves
Training length
		5	33	The length of training field
Assemble					1	38	The interior PPDU of data division that is made as 1 expression packet includes AMPDU, otherwise is made as 0
	Reserve	9	39	Be made as 0, be received device and ignore
HCS					16	48	Header check sequence

More than shown in embodiment in, all numeric fields are encoded into signless binary system, at first are least significant bits.

Perhaps, in the embodiment that comprises SC PHY, then PLCP header (header as shown in FIG.) after the lead code.The PLCP header is made up of several fields, and it defines the details of the PHY protocol Data Unit (PPDU) that is launched.Header is according to the coding of any method or equivalents and be modulated at this and illustrate.Below an embodiment of header fields has been described in the form relevant with SCM PHY.

SCM table-header fields

Field name	Amount of bits	Initial bits	Describe
				Scrambler initialization	7	0	The bit X1-X7 of initial scrambler state
MCS
		5	7	Index to modulation and encoding scheme table
Length					18	12	The quantity of data eight bit groups in the PSDU.Scope is 0-262143
	Extra PPDU	1	30	Value be behind 1 this PPDU of expression followed by being another PPDU, and do not have IFS or lead code on one PPDU of back.Value is the PPDU that does not have other behind 0 this PPDU of expression.
Type of data packet					2	31	Type of data packet: 0-normal data packet 1-TRN-R packet
				2-TRN-T packet 3-reserves
Training length
		4	33	The length of training field
Reserve
		1	37	Be made as 0, be received device and ignore
Assemble					1	38	The interior PPDU of data division that is made as 1 expression packet includes AMPDU, otherwise is made as 0
	Reserve	9	39	Be made as 0, be received device and ignore
HCS					16	48	Header check sequence

Equally, more than shown in embodiment in, all numeric fields are encoded into signless binary system, at first are least significant bits.

Fig. 6 handles the schematic diagram of header information bits with the device 600 of generation header.Header information bits (those bits-those parameters for example described above that for example comprise all appropriate information that make the frame readme) can be provided for scrambler circuit 610.In scrambler circuit 610, carry out (using some scrambling model-wherein a kind of model/option can be not scramblings in any case) after the scrambling, these bits are provided for then fills up circuit 620, and it is inserted at least one and fills up bit (for example value is 0 bit) in these bits.Described at least one fill up bit and be placed into which position that offers in the bit of filling up circuit 620, in various different embodiment, can be different, for example in original position, at afterbody, in the middle of being inserted in, or the like.

Encoder circuit 630 codings are filled up bit block (from filling up circuit 620 outputs), thereby generate coded-bit.Encoder circuit 630 can use the code (for example LDPC sign indicating number) of any type.Reduction and/or 640 pairs of these coded-bits of deletion circuit are operated, and reduce this coded-bit (for example removing the bit of filling) thereby generate and reduce coded-bit.Reduction and/or deletion circuit 640 also can reduce at least one bit of deletion the coded-bit from this, thereby generate deletion back bit.These deletion back bits are transmitted to expander (duplicator) 650, and it carries out expansion (for example merge, repeat) to deleting the back bit, thereby generates the header that will be placed in the frame, sends by communication channel from communication equipment.

Thereby Fig. 7 handles header information bits according to 1/8 efficient coding rate to generate the schematic diagram of header with the embodiment of the device 700 of physical layer (PHY) frame that is used for sending by the single carrier signaling.Fig. 7 shows the SC start of header of generation in the encoding scheme of 56 header information bits, and this encoding scheme is according to 1/8 efficient execution.

These 56 header information bits have been passed through scrambling.Then, the bit of a certain amount of data is filled up therein, uses the LDPC sign indicating number that these bits are encoded then, and it is to generate by reducing (672,504) ratio 3/4LDPC sign indicating number.After the bit that will fill up removes from coded-bit, output LDPC encoder circuit.Usage factor 2 is carried out the expansion/repetition of these remaining bits then.The efficient coding rate is 56/448=1/8.

Thereby Fig. 8 handles header information bits according to 1/12 efficient coding rate to generate the schematic diagram of header with the embodiment of the device 800 of the PHY frame that is used for sending by the OFDM signaling.In some aspects, its header encoding scheme is similar to the previous embodiment among Fig. 7, and at least one difference is that usage factor 3 carries out expansion/repetition (last embodiment is 2).Fig. 8 shows the OFDM start of header of generation in the encoding scheme of 56 header information bits, and this encoding scheme is according to 1/12 efficient execution.

In certain embodiments, may wish to adopt more header information bits (for example more than 56 header information bits).For example, among some embodiment,, may need a large amount of header information bits in order to comprise information to describe all details corresponding to intraframe data.

Fig. 9 be according to K/N (K and N are integer) thus the efficient coding rate handle header information bits and generate the schematic diagram of header with the embodiment of the device 900 of the PHY frame that is used for sending by the single carrier signaling.In some embodiment of aforesaid Ah, only adopted reduction and repetition.Yet, also adopted selectively removing herein, and used the coding that the mode of deletion can carry out when generating header very low performance impact is relatively arranged.

For example, when having adopted more header information bits (for example, those bits that include the information that makes the frame readme), and when still adopting identical basic LDPC sign indicating number to expect again that simultaneously the last header that generates has fixing output size, can also carry out selectable deletion to this header encoding scheme according to the header coding techniques.This selectable deletion can be adopted multiple puncturing pattern, is applied to the different piece of one group of bit.For example, selectable deletion can be applicable to the duplicating of odd even/redundant bit, these odd even/redundant bits/copy part (as according to read again/expansion generates), the duplicating/the copy part of original header information bit self and/or these information bits self.

SC PHY header

Except 2 times of repetitions adopting a reduction LDPC code word (for example the LDPC encoder is generated), can also adopt it has been used the reduction of two kinds of different deletion models and two copies of deleted LDPC code word replace.Certainly, as a rule, also can adopt it has been used the reduction of the different deletion of N kind model and N the copy (N is an integer) of deleted LDPC code word replaces.

OFDM PHY header

Except 3 times of repetitions adopting a reduction LDPC code word (for example the LDPC encoder is generated), can also adopt it has been used the reduction of three kinds of different deletion models and three copies of deleted LDPC code word replace.Certainly, as a rule, also can adopt it has been used the reduction of the different deletion of N kind model and N the copy (N is an integer) of deleted LDPC code word replaces.

Any embodiment about this place introduction about SC PHY header and OFDM PHY header, it should be noted that, can generate final header by the means of any desired merging bit, for example, reset bit according to scrambling, staggered etc., comprise the order that exchanges any two or more bits; The order of header information bits, residue/deleted bit [no matter they are header information bits or odd even/redundant bit] can not inserted in the final header according to any desired mode or order, as first-selected or required specific embodiment or realization.For example, though the application has introduced a lot of embodiment, and then odd even/redundant bit (it also is repeated) after the header information bits (it is repeated).Yet, comprise these bits also can change with the order that forms final header and do not depart from the scope of the present invention and spirit (for example odd even/redundant bit before this then is a header information bits; Perhaps, header information bits then was odd even/redundant bit before this, then was the copy of header information bits, was the copy of odd even/redundant bit then).

Decoding

In the receiver side communication equipment, the same decoder that is used to carry out basic LDPC sign indicating number decoding can be used for carrying out each the header decoding of SC PHY header and OFDM PHY header.In other words, by the appropriate designs and the realization (according to SC or OFDM signaling) of header, various types of headers that decoder can not only be decoded and be generated, the corresponding data part of the frame that generates according to the LDPC coding of also decoding.

According to decoding, with metric (metrics) or the log-likelihood ratio (for example referring to metric generating run shown in Figure 2) and suitable scaling merging (addition) of repetition bits.Because different deletion schemes is applied to the different piece of this group bit and (for example uses the initial protion of the first deletion model to this group bit, and use the copy of second puncturing pattern) to this group bit, the intelligence of carrying out LLR then merges, to compensate any coding loss that applied deletion action is brought.

According to decoding processing, the LLR of reduction bit is known (for example, because they corresponding to the 0 value bit for example of the bit with predetermined value).So talk about, they can be endowed fixing/predetermined value.Because all reduction bits generally all are endowed general value (for example bit value is 0), also can all give identical fixing/predetermined value with its corresponding LLR.

Yet because the value of deletion back bit is unknown, the LLR corresponding with it is unknown, and can all give predetermined value (for example 0).Yet,, after the LLR with other repeatable block generation merges, just can avoid occurring the LLR of any the unknown by different repeatable blocks is used different deletion models.

By these new methods, compared with prior art, new have more that the encoding scheme of long letter breath bit will have better or equivalent performance after being offset the gain of efficient coding rate.

In the embodiment shown in fig. 9, provided some parameter, having comprised: the output size=N bit (for example N=448) of SC header coding, ratio R (L, T) LDPC sign indicating number, i.e. LDPC (R), wherein L is a block size, T is the size of information bit.

K information header bit (K≤T) can pass through scrambling, thus bit d (1) generated ..., d (K), it is then through filling up.After in it, filling up T-K 0 bit (for example, be expressed as z (K+1) ..., z (T)) 0 value bit, filled up (reduction) after K the information bit), this K header information bits and the bit filled up are provided for the LDPC encoder circuit then.Certainly, it should be noted that 0 value bit (for example filling up bit) does not transmit by communication channel (for example among the radio communication channel embodiment aerial).

The LDPC encoder circuit uses LDPC sign indicating number LDPC (R) to d (1) ..., d (K), z (K+1) ..., z (T) coding obtains L-T odd even/redundant bit, is expressed as p (1) ..., p (L-T).

L-T parity bits adopted two independent and different deletion models respectively, is expressed as punc[1] and punc[2], two parity bits subsequences obtained, i.e. p (set1)={ p (i ₁), p (i ₂) ..., p (i _a) and p (set2)={ p (j ₁), p (j ₂) ..., p (j _b), thereby 2 * K+a+b=N.It should be noted punc[1] be 1 ..., the size of L-T} is the child group of L-T-a, and punc[2] be 1 ..., the size of L-T} is the child group of L-T-b.The information bit that duplicates of output, d (1) for example ..., d (K), d (1) ..., d (K), the back and then is p (set1) and p (set2).The efficient coding rate of such header coding method is K/N.

Any embodiment about the application's described SC PHY header and OFDM PHY header, this embodiment shows and merges bit (for example using expanded circuit) to generate the example of header, it adopts for example d (1) of information bit, ..., d (K), d (1) ..., d (K) back and then is p (set1) and p (set2), and is as implied above.Among another embodiment, header generates in the following way: adopt for example d (1) of information bit ..., d (K) then is p (set1), then is the copy d (1) of information bit ..., d (K) is p (set2) then.

Note once more, can generate final header, for example reset bit, comprise the order that exchanges any two or more bits according to scrambling, staggered etc. by the mode of any desired merging bit; The order of header information bits, residue/deleted bit [no matter they are header information bits or odd even/redundant bit] can not inserted in the final header according to any desired mode or order, as first-selected or required specific embodiment or realization.For example, though the application has introduced a lot of embodiment, and then odd even/redundant bit (it also is repeated) after the header information bits (it is repeated).Yet, comprise these bits also can change with the order that forms final header and do not depart from the scope of the present invention and spirit (for example odd even/redundant bit before this then is a header information bits; Perhaps, header information bits then was odd even/redundant bit before this, then was the copy of header information bits, was the copy of odd even/redundant bit then).

Thereby Figure 10 handles header information bits according to 1/8 efficient coding rate to generate the schematic diagram of header with the embodiment of the device 1000 of the PHY frame that is used for sending by the single carrier signaling.This embodiment does not adopt deletion action, thereby does not use different deletion models and give the selectively removing of the different piece of piece.This embodiment can be called as SC header coding example 1, has (672,504) LDPC sign indicating number efficient 1/8, K=56, N=448.Do not carry out deletion action among this embodiment, promptly again,

Embodiment is by adopting for example information bit d (1) ..., d (56), d (1) ..., d (56) then is p (1) ..., p (168), p (1) ..., p (168) constitutes header.Yet, among another embodiment, by employing information bit d (1) ..., d (56) then is p (1) ..., p (168) then is the copy d (1) of information bit ..., d (56) then is p (1) then ..., p (168) constitutes header.Can generate final header by the method for any desired merging bit again.

Thereby Figure 11, Figure 12 and Figure 13 handle header information bits by the deletion of adopt selecting, efficient coding rate according to 1/7 to generate the schematic diagram of header with each embodiment of the

device

1100,1200,1300 of the PHY frame that is used for sending by the single carrier signaling.

Referring to embodiment shown in Figure 11, adopted than the more header information bits of previous embodiment (for example 64 header information bits, rather than 54).In addition, carried out the deletion of the bit of selecting among this embodiment 1100.General deletion model is applied to its different piece.

This embodiment 1100 can be called as SC header coding example 2, has (672,504) LDPC sign indicating number efficient 1/7, K=64, N=448.As can be seen, general deletion model is applied to odd even/redundant bit and from the copy of its generation, this deletion model representation is punc[1]=punc[2]=161,162 ..., 168}.

Among other embodiment, some header information bits self also can be through deletion (shown in following other embodiment).Again, this embodiment 1100 can generate final header by the method for any desired merging bit as any embodiment among the application.

An embodiment adopts for example information bit d (1) by using expander circuit ..., d (64), d (1) ..., d (64) then is p (1) ..., p (160), p (1) ..., p (160) constitutes header.Yet, among another embodiment, by employing information bit d (1) ..., d (64) then is p (1) ..., p (160) then is the copy d (1) of information bit ..., d (64) then is p (1) then ..., p (160) constitutes header.Can generate final header by the method for any desired merging bit again.

Referring to embodiment shown in Figure 12 1200, adopted than the more header information bits of previous embodiment (for example 64 header information bits, rather than 54).In addition, carried out the deletion of the bit of selecting among this embodiment 1200.At least two independent and different deletion models are applied to its different piece.

This embodiment 1200 can be called as SC header coding example 3, has (672,504) LDPC sign indicating number efficient 1/7, K=64, N=448.As can be seen, two independent and different deletion models are applied to odd even/redundant bit and from the copy of its generation, these two different deletion model representations are punc[1]=161,162 ..., 168} and punc[2]=153,154 ..., 160}.After deletion, remaining/not deleted bit is made of p (153:160) and p (161:168) respectively.

The deletion action that this embodiment 1200 shows execution has been used continuous deletion.For example, one continuously/continual bit group is deleted.

Among other embodiment, some header information bits self also can be through deletion (shown in following other embodiment).Again, this embodiment 1200 can generate final header by the method for any desired merging bit as any embodiment among the application.

An embodiment adopts for example information bit d (1) by using expander circuit ..., d (64), d (1) ..., d (64) then is p (1) ..., p (152) then is p (153), ..., p (160) and p (1) ..., p (152) then is p (161), ..., p (168) constitutes header.Yet, among another embodiment, by adopting information bit d (1), ..., d (64) then is p (1) ..., p (152) then is p (153) ..., p (160) then is the copy d (1) of information bit then, ..., d (64) then is p (1) then ..., p (152) then is p (161), ..., p (168) constitutes header.Can generate final header by the method for any desired merging bit again.

Referring to embodiment shown in Figure 13 1300, adopted than the more header information bits of previous embodiment (for example 64 header information bits, rather than 54).In addition, carried out the deletion of the bit of selecting among this embodiment 1300.At least two independent and different deletion models are applied to its different piece.

This embodiment 1300 can be called as SC header coding example 4, has (672,504) LDPC sign indicating number efficient 1/7, K=64, N=448.As can be seen, two independent and different deletion models are applied to odd even/redundant bit and from the copy of its generation, these two different deletion model representations are punc[1]=154,156 ..., 168} and punc[2]=153,155 ..., 167}.

After deletion, remaining/not deleted bit is made of p (153,155,157,159,161,163,165,167) and p (154,156,158,160,162,164,166,168) respectively.

The deletion action that this embodiment 1300 shows execution has been used discontinuous deletion.For example, the bit group of a discontinuous/interruption is deleted.Different discontinuous/discontinuities branch of odd even/redundant bit and its copy has passed through deletion action.

Again, among other embodiment, some header information bits self also can be through deletion (shown in following other embodiment).Again, this embodiment 1300 can generate final header by the method for any desired merging bit as any embodiment among the application.

An embodiment adopts for example information bit d (1) by using expander circuit ..., d (64), d (1), ..., d (64) then is p (1) ..., p (152) then is p (153,155,157,159,161,163,165,167) and p (1) ..., p (152) then is p (154,156,158,160,162,164,166,168) constitute header.Yet, among another embodiment, by employing information bit d (1) ..., d (64) then is p (1), ..., p (152) then is p (153,155,157,159,161,163,165,167) then be the copy d (1) of information bit then ..., d (64) then is p (1) then ..., p (152) then is p (154,156,158,160,162,164,166,168) constitute header.Can generate final header by the method for any desired merging bit again.

According to the header coding method among the application, some embodiment that uses a SCM piece to carry out header coding (for example scrambling and coding) provides following.The coding of header uses one and has N _CBPBIndividual symbol and N _GRThe SCM piece of individual protection symbol.Bit is by following by scrambling and coding:

(1) input preamble bit (b ₁, b ₂..., b _LH), wherein LH=64 by scrambling, since the 8th bit, creates d _1s=(q ₁, q ₂..., q _LH).

(2) d by 504-LH zero is linked to _1sLH bit, generate parity bits p then ₁, p ₂..., p ₁₆₈Make Hc ^T=0 creates LDPC code word c=(q ₁, q ₂..., q _LH, 0 ₁, 0 ₂..., 0 _504-LH, p ₁, p ₂..., p ₁₆₈), wherein H is the parity matrix at ratio 3/4LDPC sign indicating number.

(3) remove bit LH+1 to 504 and the bit 665 to 672 of code word c, obtain sequence cs1=(q ₁, q ₂..., q _LH, p ₁, p ₂..., p ₁₆₀).

(4) remove bit LH+1 to 504 and the bit 657 to 664 of code word c, then with once fill up sequence (begin and each nibble, at first use LSB) and advance XOR from the left side, obtain sequence cs2=(q ₁, q ₂..., q _LH, p ₁, p ₂..., p ₁₅₂, p ₁₆₁, p ₁₆₂..., p ₁₆₈).

(5) cs1 and cs2 linked with form series (cs1, cs2).448 bits that obtain are mapped according to pi/2-BPSK then.Then with N _GIIndividual protection symbol places the N that obtains _CBPBIndividual symbol front.

Thereby Figure 14 handles header information bits by the deletion of adopt selecting, efficient coding rate according to 9/56 to generate the schematic diagram of header with the embodiment of the device 1400 of the PHY frame that is used for sending by the single carrier signaling.

In this embodiment 1400, adopted the header information bits more much more (for example 72 header information bits, rather than 64 or 54) than previous embodiment.In addition, carried out the deletion of the bit of selecting among this embodiment 1400.At least two independent and different deletion models are applied to its different piece.

This embodiment 1400 can be called as SC header coding example 5 (adopting the header information bits of k=72), has (672,504) LDPC sign indicating number efficient 9/56, K=72, N=448.As can be seen, two independent and different deletion models are applied to odd even/redundant bit and from the copy of its generation, these two different deletion model representations are punc[1]=153:168} and punc[2]={ 137:152}.

After deletion, each 16 interior position is made of p (137:152) and p (153:168) respectively in odd even/redundant bit and its copy, the residue/not deleted bit.

The deletion action that this embodiment 1400 shows execution has been used continuous deletion.For example, one continuously/continual bit group is deleted.

Embodiment by as use expander circuit, adopt for example information bit d (1) ..., d (72), d (1), ..., d (72) then is p (1) ..., p (136) then is p (137:152) and p (1) ..., p (136) then is that p (153:158) constitutes header.Yet, among another embodiment, by employing information bit d (1) ..., d (72) then is p (1), ..., p (136) then is that p (137:152) then is the copy d (1) of information bit then ..., d (72) then is p (1) then, ..., p (136) then is that p (153:158) constitutes header.Can generate final header by the method for any desired merging bit again.

Often, by BLER (Block Error Rate) [or BER (bit error rate (BER))] contrast E _b/ N _o(energy per bit E _bWith pectrum noise density N _oRatio) or SNR (signal to noise ratio) describe performance map.Ratio E _b/ N _oIt is the measured value of SNR in the digital communication system.When checking such performance curve, can be at any given E _b/ N _oOr SNR determines BLER or BER, thereby provides the accurate relatively performance of coding/decoding method to represent.

Figure 15 is the performance comparison diagram 1500 of various LDPC sign indicating numbers, and each LDPC sign indicating number adopts corresponding header coding techniques, uses single carrier signaling and Quadrature Phase Shift Keying (QPSK) modulation on self adaptation white Gauss noise (AWGN) communication channel.

Various examples 1,2,3 and 4 shown in the aforementioned figures are all shown in this figure, to demonstrate its relative performance based on the AWGN communication channel.

Compare the coding deviation that different efficient coding rate 1/8 (corresponding to example 1) is brought in order to compensate with efficient coding rate 1/7 (corresponding to example 2,3,4), the performance curve of example 1 has carried out suitable skew to realize accurate comparison.

Figure 16 is the performance comparison diagram 1600 of various LDPC sign indicating numbers, and each LDPC sign indicating number adopts corresponding header coding techniques, uses single carrier signaling and exponential decay power delay profile (PDP) Rayleigh (Rayleigh) decline communication channel QPSK modulation.

Various examples 1,2,3 and 4 shown in the aforementioned figures are all shown in this figure, to demonstrate its relative performance based on exponential decay power delay profile (PDP) Rayleigh (Rayleigh) decline communication channel QPSK modulation.

Again, as embodiment 1500, compare the coding deviation that different efficient coding rate 1/8 (corresponding to example 1) is brought in order to compensate with efficient coding rate 1/7 (corresponding to example 2,3,4), the performance curve of example 1 has carried out suitable skew to realize accurate comparison.

The performance evaluation of SC header

When considering the ratio loss of 1/8 contrast 1/7, can bring clean coding gain or loss.Yet the clean coding gain of 1/8 efficient code or loss are certainly by skew about 10log10 ((1/7)/(1/8))=0.58dB (curve of representing referring to the dotted line in the aforementioned properties comparison diagram).

By comparing 1/8 efficient code (for example example 1) and the 1/7 efficient code (for example example 2,3,4) on the awgn channel, can obtain to draw a conclusion.Example 3 and 4 does not have clean performance loss.Example 2 has the performance loss of 0.25dB.Example 3 and absolute (not considering the ratio gain) SNR loss of 4 are 0.58dB.

1/8 efficient code (for example example 1) and 1/7 efficient code (for example example 2,3,4) by on comparison index formula decay power delay distribution (PDP) Rayleigh (Rayleigh) decline communication channel QPSK channel can obtain to draw a conclusion.Example 2,3 and 4 does not have clean performance loss.Example 2,3 and absolute (not considering the ratio gain) SNR loss of 4 are 0.58dB.

The coding method of OFDM header

Figure 17 be by the deletion of adopt selecting, according to K/N (K and N are integers) thus the efficient coding rate handle header information bits and generate the schematic diagram of header with the embodiment 1700 of the device of the PHY frame that is used for sending by the OFDM signaling.

Again, when having adopted more header information bits (those bits that include the information that makes the frame readme), and when expecting that when adopting identical basic LDPC sign indicating number the final header that generates has the output of fixing size, can also carry out selectable deletion to this header encoding scheme according to the header coding techniques.This selectable deletion can be adopted multiple puncturing pattern, is applied to the different piece of one group of bit.For example, selectable deletion can be applicable to the duplicating of odd even/redundant bit, these odd even/redundant bits/copy part (as according to read again/expansion generates), the duplicating/the copy part of original header information bit self and/or these information bits self.

According to the OFDM signaling, definable goes out some operating parameter, comprising: the output size of OFDM header coding, i.e. N; Ratio R (L, T) LDPC sign indicating number, i.e. LDPC (R), wherein L is a block size, T is the size of information bit.

K information header bit (K≤T) can pass through scrambling, thus bit d (1) generated ..., d (K), it is then through filling up.

After in K information header bit, filling up T-K 0 bit, (be expressed as z (K+1), ..., z (T)) 0 value bit is filled up (reduction) after K the information bit), this K header information bits and the bit filled up are provided for the LDPC encoder circuit then.Certainly, it should be noted that 0 value bit (for example filling up bit) does not transmit by communication channel (for example among the radio communication channel embodiment aerial).

With regard to OFDM, adopted more than two independent and different deletion model.On the contrary, three independent and different deletion models are applied to L-T parity bits respectively, are expressed as punc[1], punc[2] and punc[3], obtain three not deleted parity bits subsequences, i.e. p (set1)={ p (i ₁), p (i ₂) ..., p (i _a), p (set2)={ p (j ₁), p (j ₂) ..., p (j _b) and p (set3)={ p (k ₁), p (k ₂) ..., p (k _c), thereby 3 * K+a+b+c=N.

Note punc[1] be 1 ..., the size of L-T} is the child group of L-T-a, and punc[2] be 1 ..., the size of L-T} is the child group of L-T-b, punc[3] be 1 ..., the size of L-T} is the child group of L-T-c.The information bit that duplicates of output, d (1) for example ..., d (K), d (1) ..., d (K), the back and then is p (set1), p (set2) and p (set3).The efficient coding rate of such header coding method is K/N.

Any embodiment about the application's described SC PHY header and OFDM PHY header, this embodiment shows and merges bit (for example using expanded circuit) to generate the example of header, it adopts for example d (1) of information bit, ..., d (K), d (1) ..., d (K) back and then is p (set1), p (set2) and p (set3), and is as implied above.Among another embodiment, header generates in the following way: adopt for example d (1) of information bit ..., d (K), then being p (set1), then is the copy d (1) of information bit ..., d (K), being p (set2) then, then is the copy d (1) of information bit ..., d (K) is p (set3) then.

Note again, can generate final header, for example reset bit, comprise the order that exchanges any two or more bits according to scrambling, staggered etc. by the mode of any desired merging bit; The order of header information bits, residue/deleted bit [no matter they are header information bits or odd even/redundant bit] can not inserted in the final header according to any desired mode or order, as first-selected or required specific embodiment or realization.For example, though the application has introduced a lot of embodiment, and then odd even/redundant bit (it also is repeated) after the header information bits (it is repeated).Yet, comprise these bits also can change with the order that forms final header and do not depart from the scope of the present invention and spirit (for example odd even/redundant bit before this then is a header information bits; Perhaps, header information bits then was odd even/redundant bit before this, then was the copy of header information bits, was the copy of odd even/redundant bit then).

Thereby Figure 18 handles header information bits according to 1/12 efficient coding rate to generate the schematic diagram of header with the embodiment of the device 1800 of the PHY frame that is used for sending by the OFDM signaling.

This embodiment does not adopt deletion action, thereby does not use different deletion models and give the selectively removing of the different piece of piece.This embodiment can be called as OFDM header coding example 1, has (672,504) LDPC sign indicating number efficient 1/12, K=56, N=672.Do not carry out deletion action among this embodiment, promptly again,

Embodiment is by using expander circuit, adopt for example information bit d (1) ..., d (56), d (1) ..., d (56) and d (1) ..., d (56) then is p (1) ..., p (168), p (1) ..., p (168) and p (1) ..., p (168) constitutes header.Yet, among another embodiment, by adopting information bit d (1), ..., d (56) then is p (1) ..., p (168) then is the copy d (1) of information bit ..., d (56) then is p (1) then, ..., p (168) then is the copy d (1) of information bit ..., d (56) then is p (1) then, ..., p (168) constitutes header.Can generate final header by the method for any desired merging bit again.

Thereby Figure 19, Figure 20 and Figure 21 handle header information bits by the deletion of adopt selecting, efficient coding rate according to 2/21 to generate the schematic diagram of header with each embodiment of the

device

1900,2000,2100 of the PHY frame that is used for sending by the OFDM signaling.

Referring to embodiment shown in Figure 19 1900, adopted than the more header information bits of previous embodiment (for example 64 header information bits, rather than 54).In addition, carried out the deletion of the bit of selecting among this embodiment 1900.General deletion model is applied to its different piece.

This embodiment 1900 can be called as OFDM header coding example 2, has (672,504) LDPC sign indicating number efficient 1/2, K=64, N=672.As can be seen, general deletion model is applied to odd even/redundant bit and from the copy of its generation, this deletion model representation is punc[1]=punc[2]=punc[3]=161,162 ..., 168}.

Among other embodiment, some header information bits self also can be through deletion (shown in following other embodiment).Again, this embodiment 1900 can generate final header by the method for any desired merging bit as any embodiment among the application.

Embodiment is by using expander circuit, adopt for example information bit d (1) ..., d (64), d (1) ..., d (64) and d (1) ..., d (64) then is p (1) ..., p (160), p (1) ..., p (160) and p (1) ..., p (160) constitutes header.Yet, among another embodiment, by adopting information bit d (1), ..., d (64) then is p (1) ..., p (160) then is the copy d (1) of information bit ..., d (64) then is p (1) then, ..., p (160) then is the copy d (1) of information bit ..., d (64) then is p (1) then, ..., p (160) constitutes header.Can generate final header by the method for any desired merging bit again.

Referring to embodiment shown in Figure 20 2000, adopted than the more header information bits of previous embodiment (for example 64 header information bits, rather than 54).In addition, carried out the deletion of the bit of selecting among this embodiment 2000.At least two independent and different deletion models are applied to its different piece.

This embodiment 2000 can be called as OFDM header coding example 3, has (672,504) LDPC sign indicating number efficient 2/21, K=64, N=672.As can be seen, three independent and different deletion models are applied to odd even/redundant bit and from the copy of its generation, these three different deletion model representations are punc[1]={ 161,162, ..., 168}, punc[2]={ 153,154, ..., 160} and punc[3]={ 145,146, ..., 152}.After deletion, remaining/not deleted bit is made of p (145:152), p (153:160), p (161:168) respectively.

The deletion action that this embodiment 2000 shows execution has been used continuous deletion.For example, one continuously/continual bit group is deleted.The different part continuously/uninterruptedly of odd even/redundant bit and copy thereof experiences deletion action.

Again, among other embodiment, some header information bits self also can be through deletion (shown in following other embodiment).Again, this embodiment 2000 can generate final header by the method for any desired merging bit as any embodiment among the application.

Embodiment is by using expander circuit, adopt for example information bit d (1) ..., d (64), d (1) ..., d (64) and d (1), ..., d (64) then is p (1) ..., p (144) then is that p (145:160) then is p (1), ..., p (144) (then being thereafter p (145:152) U p (161:168)) then is p (1) then, ..., p (144) and p (153:168) constitute header.Yet, among another embodiment, by adopting information bit d (1), ..., d (64) then is p (1) ..., p (144) then is that p (145:160) then is the copy d (1) of information bit then ..., d (64) then is p (1) then, ..., p (144) then is p (145:152) Up (161:168), is the copy d (1) of information bit then, ..., d (64) then is p (1) ..., p (144) and p (153:168) constitute header.Can generate final header by the method for any desired merging bit again.

Referring to embodiment shown in Figure 21 2100, adopted than the more header information bits of previous embodiment (for example 64 header information bits, rather than 54).In addition, carried out the deletion of the bit of selecting among this embodiment 2100.At least two independent and different deletion models are applied to its different piece.

This embodiment 2100 can be called as OFDM header coding example 4, has (672,504) LDPC sign indicating number efficient 2/21, K=64, N=672.As can be seen, three independent and different deletion models are applied to odd even/redundant bit and from the copy of its generation, these three different deletion model representations are punc[1]=1:8}, punc[2]=85:92} and punc[3]={ 161:168}.After deletion, remaining/not deleted bit is made of p (set1)=p (9:168), p (set2)=p (1:84) U p (93:168) and p (set3)=p (1:160) respectively.

The deletion action that this embodiment 2100 shows execution has been used continuous deletion.For example, one continuously/continual bit group is deleted.Different discontinuous/discontinuities branch of odd even/redundant bit and its copy has passed through deletion action.

Again, among other embodiment, some header information bits self also can be through deletion (shown in following other embodiment).Again, this embodiment 2100 can generate final header by the method for any desired merging bit as any embodiment among the application.

About the SC PHY that illustrates and any embodiment of OFDM PHY header herein, this embodiment shows the example that generates header by combined bit, it is by adopting for example information bit d (1) ..., d (64), d (1), ..., d (64) and d (1) ..., d (64) then is p (set1), p (set2) and p (set3), as mentioned above.Among other embodiment, SC PHY and OFDM PHY header generate in the following way: information bit is d (1) for example ..., d (64) then is p (set1), then be the copy d (1) of information bit, ..., d (64) then is p (set2), be the copy d (1) of information bit then, ..., d (64) is p (set3) then.

According to the header coding method among the application, some embodiment that uses single OFDM symbol to carry out header coding (for example scrambling and coding) provides following:

(1) 64 preamble bit (b ₁, b ₂..., b _LH), wherein LH=64 by scrambling, since the 8th bit, creates q=(q ₁, q ₂..., q _LH).

(2) by with 440 zero sequence q that fill up, obtain 504 bits, i.e. (q altogether ₁, q ₂..., q _LH, 0 _LH+1, 0 _LH+2... 0 ₅₀₄), its then usage rate-3/4LDPC sign indicating number encode, thereby generate 168 parity bits p ₁, p ₂..., p ₁₆₈

(3) formation sequence c ₁Be (q ₁, q ₂..., q _LH, p ₉, p ₁₀... p ₁₆₈).

(4) formation sequence c ₂Be (q ₁, q ₂..., q _LH, p ₁, p ₂... p ₈₄, p ₉₃, p ₉₄... p ₁₆₈), and once fill up sequence (begin and each nibble, at first use LSB) XOR (XOR) from the left side.

(5) formation sequence c ₃Be (q ₁, q ₂..., q _LH, p ₁, p ₂... p ₁₆₀), and once fill up sequence [it can be different from top] (begin and each nibble, at first use LSB) XOR from the left side.

(6) with sequence c ₁, c ₂And c ₃Link, form the sequence d=(d of 672 bits ₁, d ₂, d ₃..., d ₆₇₂)=(c ₁, c ₂, c ₃).

(7) the 672 bit sequence d that obtain come mapped then according to the mapped specific of constellation point in it according to QPSK, pilot code (for example frequency pilot sign) is inserted into, and the sequence of Sheng Chenging is modulated to the OFDM symbol then.

Thereby Figure 22 handles header information bits by the deletion of adopt selecting, efficient coding rate according to 3/28 to generate the schematic diagram of header with each embodiment of the device 2200 of the PHY frame that is used for sending by the OFDM signaling.

In this embodiment 2200, adopted the header information bits more much more (for example 72 header information bits, rather than 64 or 54) than previous embodiment.In addition, carried out the deletion of the bit of selecting among this embodiment 2200.At least three independent and different deletion models are applied to its different piece.

This embodiment 2200 can be called as OFDM header coding example 5 and (act on more header information bits (for example K=72), and have (672,504) LDPC sign indicating number efficient 3/28, K=72, N=672.As can be seen, three independent and different deletion models are applied to odd even/redundant bit and from the copy of its generation, these three different deletion models are all deleted 16 positions.After deletion, residue/not deleted bit is made of p (121:152), p (121:136) U p (153:168) and p (137:168) respectively.

The deletion action that this embodiment 2200 shows execution has been used continuous deletion.For example, one continuously/continual bit group is deleted.Different discontinuous/discontinuities branch of odd even/redundant bit and its copy has passed through deletion action.

Again, among other embodiment, some header information bits self also can be through deletion (shown in following other embodiment).Again, this embodiment 2200 can generate final header by the method for any desired merging bit as any embodiment among the application.

About the SC PHY that illustrates and any embodiment of OFDM PHY header herein, as mentioned above, this embodiment shows and uses expander circuit to generate the example of header by combined bit, and it is by adopting for example information bit d (1) ..., d (72), d (1) ..., d (72) and d (1), ..., d (72) then is that p (set1), p (set2) and p (set3) constitute header.Yet, among another embodiment, by adopting information bit d (1), ..., d (72) then is that p (set1) then is the copy d (1) of information bit then ..., d (72) then is that p (set2) then is the copy d (1) of information bit then, ..., d (72) then is that p (set3) constitutes header then.

Figure 23 is the performance comparison diagram 2300 of various LDPC sign indicating numbers, and each LDPC sign indicating number adopts corresponding header coding techniques, uses OFDM signaling and Quadrature Phase Shift Keying (QPSK) modulation on self adaptation white Gauss noise communication channel.

Compare the coding deviation that different efficient coding rate 1/12 (corresponding to example 1) is brought in order to compensate with efficient coding rate 2/21 (corresponding to example 2,3,4), the performance curve of example 1 has carried out suitable skew to realize accurate comparison.

Figure 24 is the performance comparison diagram 2400 of various LDPC sign indicating numbers, and each LDPC sign indicating number adopts corresponding header coding techniques, uses OFDM signaling and exponential decay power delay profile (PDP) Rayleigh fading communication channel QPSK modulation.

The performance evaluation of OFDM header

When considering the ratio loss of 1/12 contrast 2/21, can bring clean coding gain or loss.Yet the clean coding gain of 1/12 efficient code or loss are certainly by skew about 10log10 ((2/21)/(1/12))=0.58dB (curve of representing referring to the dotted line in the aforementioned properties comparison diagram).

By comparing 1/12 efficient code (for example example 1) and the 2/21 efficient code (for example example 2,3,4) on the awgn channel, can obtain to draw a conclusion.Example 3 does not have clean performance loss.Example 4 has the performance loss of 0.25dB.Absolute (not considering the ratio gain) SNR loss of example 4 is 0.25dB.

1/12 efficient code (for example example 1) and 2/21 efficient code (for example example 2,3,4) by on comparison index formula decay power delay distribution (PDP) Rayleigh (Rayleigh) decline communication channel QPSK channel can obtain to draw a conclusion.Example 3 has the clean performance gain of 0.12dB.Example 4 has the clean performance gain of 0.25dB.Absolute (not considering the ratio gain) SNR loss of example 4 is 0.25dB.

Figure 25 be by the deletion of adopt selecting (except deletion odd even/redundant bit is also deleted information bit), according to K/N (K and N are integers) thus the efficient coding rate handle header information bits and generate the schematic diagram of header with the embodiment of the device 2500 of the PHY frame that is used for sending by the single carrier signaling.

General header coding method (selectively removing that comprises information bit)

How these embodiment not only show odd even/redundant bit by the deletion of selectivity, how also show header information bits self (those bits that for example include the information that makes the frame readme) by the deletion of selectivity.As having used among the application that two or more deletion models are given odd even/redundant bit and according to as shown in other embodiment of its ghost, similar two or more deletion models can be applicable to header information bits and according to any copy of its generation.

According to the SC signaling, defined some operating parameter, comprising: the output size of header coding, i.e. N; Ratio R (L, T) LDPC sign indicating number, i.e. LDPC (R), wherein L is a block size, T is the size of information bit.

K information header bit (at this, K≤T) can pass through scrambling, thus generate bit c (1) ..., c (K), it is then through filling up.After in it, filling up T-K 0 bit (for example be expressed as z (1) ..., z (T-K) 0 value bit is filled up (reduction) after K the information bit), this K header information bits and the bit filled up are provided for the LDPC encoder circuit then.Certainly, it should be noted that 0 value bit (for example filling up bit) does not transmit by communication channel (for example among the radio communication channel embodiment aerial).

The LDPC encoder circuit uses LDPC sign indicating number LDPC (R) to c (1) ..., c (K), z (1) ..., z (T-K) coding, the output bit that obtains comprises odd even/redundant bit, is expressed as c (1), c (2) ..., c (K), c (K+1) ..., c (K+L-T).

Then, K+L-T c bit adopted M independent and different deletion model respectively, is expressed as punc[1], punc[2] ..., punc[M], obtain following subsequence: c (set1)=c (i ₁), c (i ₂) ..., c (i _A1); C (set2)=c (j ₁), c (j ₂) ..., c (j _A2); ...; C (setM)=c (k ₁), c (k ₂) ..., c (k _AM), thereby make a1+a2+...+aM=N.

The bit group c (set1) of output, c (set2) ..., c (setM) is with any preferred order output.The efficient coding rate of such header coding method is K/N.

This embodiment can be called as SC header coding example 6, have efficient 1/7, K=64, N=448, (672,504) LDPC sign indicating number.

This shows, two independent and different deletion models, punc[1]=63 64 217 218 219,220 221 222} and punc[2]={ 225 226 227 228 229 230 231 232} are applied to from the various bit outputs (comprising the header information bits from its output) of LDPC coding circuit and the copy that generates in view of the above.

Through after the deletion action, residue/not deleted bit is made of c (set1)=c (1:62) U c (65:216) U c (223:232) and c (set2)=c (1:224) respectively.

The deletion of discontinuous/interruption that the deletion action that this embodiment 2500 shows execution has been used.For example, the bit group of a discontinuous/interruption is deleted.Passed through deletion action from the various bits (comprising header information bits) of LDPC coding circuit output with dividing according to different discontinuous/discontinuities of the copy of its generation.

Among this embodiment, some header information bits self also can be through deletion.Again, this embodiment can generate final header by the method for any desired merging bit as any embodiment among the application.

About the SC PHY that illustrates and any embodiment of OFDM PHY header herein, this embodiment shows the example that generates header by combined bit, and it constitutes header by adopting first group of c (set1) followed by c (set2).Note again, can generate final header, for example, reset bit, comprise the order that exchanges any two or more bits according to scrambling, staggered etc. by the means of any desired merging bit; The order of header information bits, residue/deleted bit [no matter they are header information bits or odd even/redundant bit] can not inserted in the final header according to any desired mode or order, as first-selected or required specific embodiment or realization.For example, though the application has introduced a lot of embodiment, and then odd even/redundant bit (it also is repeated) after the header information bits (it is repeated).Yet, comprise these bits also can change with the order that forms final header and do not depart from the scope of the present invention and spirit (for example odd even/redundant bit before this then is a header information bits; Perhaps, header information bits then was odd even/redundant bit before this, then was the copy of header information bits, was the copy of odd even/redundant bit then).

Figure 26 is the performance comparison diagram 2600 of various LDPC sign indicating numbers, and each LDPC sign indicating number adopts corresponding header coding techniques, uses single carrier signaling and Quadrature Phase Shift Keying (QPSK) modulation on self adaptation white Gauss noise communication channel.

Various examples 1,4 and 5 shown in the aforementioned figures are all shown in this figure, to demonstrate its relative performance based on the AWGN communication channel.

In order to compensate the coding deviation that different efficient coding rates is brought, the performance curve of example 1 has carried out suitable skew to realize accurate comparison.

Figure 27 is the performance comparison diagram 2700 of various LDPC sign indicating numbers, and each LDPC sign indicating number adopts corresponding header coding techniques, uses single carrier signaling and exponential decay power delay profile (PDP) Rayleigh fading communication channel QPSK modulation.

Various examples 1,4 and 5 shown in the aforementioned figures are all shown in this figure, to demonstrate its relative performance based on exponential decay power delay profile (PDP) Rayleigh (Rayleigh) decline communication channel QPSK modulation.

Again, as embodiment 2600, in order to compensate the coding deviation that different efficient coding rates is brought, the performance curve of example 1 has carried out suitable skew to realize accurate comparison.

Thereby Figure 28 A is used to handle the flow chart of an embodiment that header information bits generates the method 2800 of header.

Referring to the method 2800 shown in Figure 28 A, thereby start from the step 2810 header information bits is carried out header information bits after scrambling generates scrambling.Then in the step 2820, at least one bit (for example 0 value bit) is filled up in the header information bits after this scrambling, thereby bit block is filled up in generation.

In step 2830, encode then, generate coded-bit filling up bit block.Then in the step 2840, reduce coded-bit (for example removing the bit of filling up) thereby generate and reduce coded-bit.In the step 2850, at least one bit of deletion from the reduction bit is deleted the back bit thereby generate then.

Then in the step 2860, expansion (for example merge, repeat) thus this deletion bit generation afterwards header.In the step 2870, method 2800 is inserted header in the frame.

Thereby Figure 28 B is used to handle the flow chart of another embodiment that header information bits generates the method 2800 of header.

Referring to the method 2801 shown in Figure 28 B, start from replica code bit in the step 2811 (or reduction after coded-bit) (for example odd even/redundant bit of LDPC code word) thus at least a portion ghost bit.In step 2821, according to the first deletion model, at least one bit of deletion from the coded-bit after the reduction is deleted the back bit thereby generate first then.

Then in the step 2831,, from the coded-bit after the reduction, delete at least one bit, thereby generate the second deletion back bit according to the second deletion model.Then in the step 2841, expansion (for example merge, repeat etc.) the first deletion back bit and the second deletion back bit, thereby header generated.Then in the step 2851, method 2800 is inserted header in the frame.

It should be noted that each module (for example, coding module, decoder module, bit-engine, verification engine etc.) described in the application can be single treatment facility or a plurality of treatment facility.Such processor can be microprocessor, microcontroller, digital signal processor, microcomputer, CPU, field programmable gate array, programmable logic device, state machine, logical circuit, analog circuit, digital circuit and/or based on any device of operational order processing signals (simulation and/or numeral).Operational order can be stored in the memory.This memory can be single memory device or a plurality of memory device.Such memory device can be any equipment of read-only memory, random access storage device, volatile memory, nonvolatile storage, static memory, dynamic memory, flash memory and/or storing digital information.Note, when treatment facility was carried out its one or more functions by state machine, analog circuit, digital circuit and/or logical circuit, the memory of storage respective operations instruction was embedded in the circuit that comprises state machine, analog circuit, digital circuit and/or logical circuit.Among such embodiment, the memory stores operational order, processing module is connected to memory and instructs with executable operations, and this operational order is corresponding at least a portion in step described above and/or the function.

The present invention is by having showed specific function of the present invention and relation thereof by method step.The scope of described method step and order are to define arbitrarily for convenience of description.As long as can carry out specific function and order, also can use other boundary and order.Therefore any boundary or order described or choosing fall into scope and spirit essence of the present invention.

The present invention also is described some important function by functional module.The boundary of described functional module and the relation of various functional modules are to define arbitrarily for convenience of description.As long as can carry out specific function, also can use other boundary or relation.Therefore described other boundary or relation also falls into scope and spirit essence of the present invention.

Those of ordinary skills also as can be known, the functional module among the application and other displaying property module and assembly can be embodied as the processor and the aforesaid combination in any of discrete component, application-specific integrated circuit (ASIC), the appropriate software of execution.

In addition, although more than be the description of the present invention being carried out by some embodiment, those skilled in the art know that the present invention is not limited to these embodiment, under the situation that does not break away from the spirit and scope of the present invention, can carry out various changes or equivalence replacement to these features and embodiment.Protection scope of the present invention is only limited by claims of the application.

Claims

1. a device is characterized in that, comprising:

2. device according to claim 1 is characterized in that, described device further comprises:

3. device according to claim 1 is characterized in that, described header is inserted in the signal, and described signal is transmitted into communication channel by using the single carrier signaling from described device.

4. device according to claim 1 is characterized in that, described expander circuit generates described header by following setting:

Described a plurality of header information bits;

It then is the copy of a plurality of header information bits;

Then be first group of remaining bits;

Then be second group of remaining bits.

5. device according to claim 1 is characterized in that, described expander circuit generates described header by following setting:

Described a plurality of header information bits;

Then be first group of remaining bits;

It then is the copy of a plurality of header information bits;

Then be second group of remaining bits.

6. device according to claim 1 is characterized in that, described at least one copy of described a plurality of reduction coded-bits comprises the first authentic copy of described a plurality of reduction coded-bits and the triplicate of described a plurality of reduction coded-bits; And

Described reduction/deletion circuit is used for:

7. a device is characterized in that, comprising:

Adopt the second deletion model to delete at least one bit in described at least one copy of described a plurality of reduction coded-bits, thereby generate more than second remaining bits; And

Expander circuit is connected to described reduction/deletion circuit, is used to handle described more than first remaining bits and more than second remaining bits, thereby generates a header; Wherein,

8. device according to claim 7 is characterized in that, described header is inserted in the signal, and described signal is transmitted into communication channel by using the single carrier signaling from described device.

9. a method is characterized in that, comprising:

10. method according to claim 9 is characterized in that, described method further comprises: