SG11201607150TA - Testing apparatuses, hierarchical priority encoders, methods for controlling a testing apparatus, and methods for controlling a hierarchical priority encoder - Google Patents

Testing apparatuses, hierarchical priority encoders, methods for controlling a testing apparatus, and methods for controlling a hierarchical priority encoder

Info

Publication number
SG11201607150TA
SG11201607150TA SG11201607150TA SG11201607150TA SG11201607150TA SG 11201607150T A SG11201607150T A SG 11201607150TA SG 11201607150T A SG11201607150T A SG 11201607150TA SG 11201607150T A SG11201607150T A SG 11201607150TA SG 11201607150T A SG11201607150T A SG 11201607150TA
Authority
SG
Singapore
Prior art keywords
controlling
methods
hierarchical priority
testing
testing apparatus
Prior art date
Application number
SG11201607150TA
Inventor
Wenyu Jiang
Rongshan Yu
Xiaoming Bao
Susanto Rahardja
Original Assignee
Agency Science Tech & Res
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to SG10201400303Y priority Critical
Priority to SG10201400292T priority
Application filed by Agency Science Tech & Res filed Critical Agency Science Tech & Res
Priority to PCT/SG2015/000065 priority patent/WO2015130234A1/en
Priority to SG11201607150TA priority patent/SG11201607150TA/en
Publication of SG11201607150TA publication Critical patent/SG11201607150TA/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F16/00Information retrieval; Database structures therefor; File system structures therefor
    • G06F16/20Information retrieval; Database structures therefor; File system structures therefor of structured data, e.g. relational data
    • G06F16/24Querying
    • G06F16/245Query processing
    • G06F16/24569Query processing with adaptation to specific hardware, e.g. adapted for using GPUs or SSDs
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from or digital output to record carriers, e.g. RAID, emulated record carriers, networked record carriers
    • G06F3/0601Dedicated interfaces to storage systems
    • G06F3/0602Dedicated interfaces to storage systems specifically adapted to achieve a particular effect
    • G06F3/061Improving I/O performance
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from or digital output to record carriers, e.g. RAID, emulated record carriers, networked record carriers
    • G06F3/0601Dedicated interfaces to storage systems
    • G06F3/0628Dedicated interfaces to storage systems making use of a particular technique
    • G06F3/0629Configuration or reconfiguration of storage systems
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from or digital output to record carriers, e.g. RAID, emulated record carriers, networked record carriers
    • G06F3/0601Dedicated interfaces to storage systems
    • G06F3/0668Dedicated interfaces to storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • G06F3/0679Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C15/00Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
    • G11C15/04Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using semiconductor elements
    • G11C15/046Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using semiconductor elements using non-volatile storage elements
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/26Sensing or reading circuits; Data output circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00 - G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00 - G11C25/00 using resistive RAM [RRAM] elements
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0425Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a merged floating gate and select transistor
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0433Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and one or more separate select transistors
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G11C16/3427Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written
SG11201607150TA 2014-02-28 2015-03-02 Testing apparatuses, hierarchical priority encoders, methods for controlling a testing apparatus, and methods for controlling a hierarchical priority encoder SG11201607150TA (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
SG10201400303Y 2014-02-28
SG10201400292T 2014-02-28
PCT/SG2015/000065 WO2015130234A1 (en) 2014-02-28 2015-03-02 Testing apparatuses, hierarchical priority encoders, methods for controlling a testing apparatus, and methods for controlling a hierarchical priority encoder
SG11201607150TA SG11201607150TA (en) 2014-02-28 2015-03-02 Testing apparatuses, hierarchical priority encoders, methods for controlling a testing apparatus, and methods for controlling a hierarchical priority encoder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SG11201607150TA SG11201607150TA (en) 2014-02-28 2015-03-02 Testing apparatuses, hierarchical priority encoders, methods for controlling a testing apparatus, and methods for controlling a hierarchical priority encoder

Publications (1)

Publication Number Publication Date
SG11201607150TA true SG11201607150TA (en) 2016-09-29

Family

ID=54009429

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11201607150TA SG11201607150TA (en) 2014-02-28 2015-03-02 Testing apparatuses, hierarchical priority encoders, methods for controlling a testing apparatus, and methods for controlling a hierarchical priority encoder

Country Status (3)

Country Link
US (1) US20170169075A1 (en)
SG (1) SG11201607150TA (en)
WO (1) WO2015130234A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9875799B1 (en) * 2015-01-12 2018-01-23 Micron Technology, Inc. Methods for pattern matching using multiple cell pairs

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7069378B2 (en) * 2002-07-22 2006-06-27 Integrated Device Technology, Inc. Multi-bank content addressable memory (CAM) devices having staged segment-to-segment soft and hard priority resolution circuits therein and methods of operating same
US20080007995A1 (en) * 2006-07-10 2008-01-10 Schwerin Ulrike Gruening-Von Memory cell having a switching active material, and corresponding memory device
US7783654B1 (en) * 2006-09-19 2010-08-24 Netlogic Microsystems, Inc. Multiple string searching using content addressable memory
US9245653B2 (en) * 2010-03-15 2016-01-26 Intelligent Intellectual Property Holdings 2 Llc Reduced level cell mode for non-volatile memory
WO2011005665A1 (en) * 2009-07-10 2011-01-13 Aplus Flash Technology, Inc. Novel high speed high density nand-based 2t-nor flash memory design
SG11201504839PA (en) * 2012-08-02 2015-07-30 Agency Science Tech & Res Testing apparatuses, servers and methods for controlling a testing apparatus

Also Published As

Publication number Publication date
US20170169075A1 (en) 2017-06-15
WO2015130234A1 (en) 2015-09-03

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