SG10201802809TA - Device chip manufacturing method - Google Patents

Device chip manufacturing method

Info

Publication number
SG10201802809TA
SG10201802809TA SG10201802809TA SG10201802809TA SG10201802809TA SG 10201802809T A SG10201802809T A SG 10201802809TA SG 10201802809T A SG10201802809T A SG 10201802809TA SG 10201802809T A SG10201802809T A SG 10201802809TA SG 10201802809T A SG10201802809T A SG 10201802809TA
Authority
SG
Singapore
Prior art keywords
wafer
device chip
chip manufacturing
passivation film
along
Prior art date
Application number
SG10201802809TA
Inventor
Tabuchi Tomotaka
Original Assignee
Disco Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Disco Corp filed Critical Disco Corp
Publication of SG10201802809TA publication Critical patent/SG10201802809TA/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H01L21/3043—Making grooves, e.g. cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67132—Apparatus for placing on an insulating substrate, e.g. tape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/32—Processing objects by plasma generation
    • H01J2237/33—Processing objects by plasma generation characterised by the type of processing
    • H01J2237/334—Etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H01L2221/68336—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding involving stretching of the auxiliary support post dicing

Abstract

DEVICE CHIP MANUFACTURING METHOD A device chip manufacturing method includes a passivation film removing step of removing a passivation film along each division line, a wafer dividing step of performing plasma etching using a fluorine-based gas to the front side of a wafer in the condition where the passivation film is used as a mask, thereby dividing the wafer along the division lines, and a die attach film removing step of performing plasma etching using an oxygen-based gas to the front side of the wafer in the condition where the passivation film is used as a mask, thereby removing a part or the whole of a die attach film along each division line. (Figure 1B)
SG10201802809TA 2017-04-19 2018-04-04 Device chip manufacturing method SG10201802809TA (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2017082561A JP6903375B2 (en) 2017-04-19 2017-04-19 Device chip manufacturing method

Publications (1)

Publication Number Publication Date
SG10201802809TA true SG10201802809TA (en) 2018-11-29

Family

ID=63854692

Family Applications (1)

Application Number Title Priority Date Filing Date
SG10201802809TA SG10201802809TA (en) 2017-04-19 2018-04-04 Device chip manufacturing method

Country Status (6)

Country Link
US (1) US10468303B2 (en)
JP (1) JP6903375B2 (en)
KR (1) KR102512596B1 (en)
CN (1) CN108735667B (en)
SG (1) SG10201802809TA (en)
TW (1) TWI744503B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6994646B2 (en) * 2018-01-17 2022-01-14 パナソニックＩｐマネジメント株式会社 Method of manufacturing element chips
TWI741262B (en) * 2018-06-04 2021-10-01 美商帕斯馬舍門有限責任公司 Method for dicing die attach film
JP7281709B2 (en) * 2019-05-30 2023-05-26 パナソニックＩｐマネジメント株式会社 Element chip manufacturing method
TWI771893B (en) * 2021-02-03 2022-07-21 國立陽明交通大學 Method for cutting an array of chips

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1059086B (en) * 1976-04-14 1982-05-31 Ates Componenti Elettron PROCEDURE FOR THE PASSIVATION OF HIGH-REVERSE HIGH VOLTAGE POWER SEMICONDUCTOR DEVICES
JP4056854B2 (en) * 2002-11-05 2008-03-05 新光電気工業株式会社 Manufacturing method of semiconductor device
JP2006114825A (en) * 2004-10-18 2006-04-27 Disco Abrasive Syst Ltd Dividing method of wafer
JP4840174B2 (en) * 2007-02-08 2011-12-21 パナソニック株式会社 Manufacturing method of semiconductor chip
JP5224837B2 (en) 2008-02-01 2013-07-03 株式会社東芝 Substrate plasma processing apparatus and plasma processing method
US8557683B2 (en) * 2011-06-15 2013-10-15 Applied Materials, Inc. Multi-step and asymmetrically shaped laser beam scribing
JP6219565B2 (en) * 2012-12-26 2017-10-25 株式会社ディスコ Wafer processing method
US20150011073A1 (en) 2013-07-02 2015-01-08 Wei-Sheng Lei Laser scribing and plasma etch for high die break strength and smooth sidewall
US9041198B2 (en) * 2013-10-22 2015-05-26 Applied Materials, Inc. Maskless hybrid laser scribing and plasma etching wafer dicing process
JP6188587B2 (en) * 2014-01-15 2017-08-30 株式会社ディスコ Wafer dividing method
US20150255349A1 (en) * 2014-03-07 2015-09-10 JAMES Matthew HOLDEN Approaches for cleaning a wafer during hybrid laser scribing and plasma etching wafer dicing processes
US9852998B2 (en) * 2014-05-30 2017-12-26 Taiwan Semiconductor Manufacturing Company, Ltd. Ring structures in device die
US10020285B2 (en) * 2014-09-04 2018-07-10 Infineon Technologies Austria Ag Method of producing a semiconductor device and a semiconductor device
JP2016207737A (en) * 2015-04-17 2016-12-08 株式会社ディスコ Division method
JP6506606B2 (en) * 2015-04-27 2019-04-24 株式会社ディスコ Wafer division method
JP2017059766A (en) * 2015-09-18 2017-03-23 株式会社ディスコ Wafer processing method
JP6564670B2 (en) * 2015-10-06 2019-08-21 株式会社ディスコ Device manufacturing method
JP6512454B2 (en) * 2016-12-06 2019-05-15 パナソニックＩｐマネジメント株式会社 Method of manufacturing element chip

Also Published As

Publication number Publication date
TW201903872A (en) 2019-01-16
CN108735667B (en) 2023-12-15
KR102512596B1 (en) 2023-03-21
TWI744503B (en) 2021-11-01
JP6903375B2 (en) 2021-07-14
US20180308755A1 (en) 2018-10-25
CN108735667A (en) 2018-11-02
US10468303B2 (en) 2019-11-05
KR20180117545A (en) 2018-10-29
JP2018182179A (en) 2018-11-15

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