SE9002124L - DEVICE FOR MULTIPLICATION OF TWO ELEMENTS IN A GALOIC BODY - Google Patents
DEVICE FOR MULTIPLICATION OF TWO ELEMENTS IN A GALOIC BODYInfo
- Publication number
- SE9002124L SE9002124L SE9002124A SE9002124A SE9002124L SE 9002124 L SE9002124 L SE 9002124L SE 9002124 A SE9002124 A SE 9002124A SE 9002124 A SE9002124 A SE 9002124A SE 9002124 L SE9002124 L SE 9002124L
- Authority
- SE
- Sweden
- Prior art keywords
- elements
- multiples
- above mentioned
- galoic
- multiplication
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
- G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
- G06F7/724—Finite field arithmetic
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/033—Theoretical methods to calculate these checking codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Pure & Applied Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Computational Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Algebra (AREA)
- Error Detection And Correction (AREA)
- Complex Calculations (AREA)
Abstract
The present invention provides a novel apparatus for computing products in Galois fields GF(p<m>) with emphasis on the case p = 2. The elements of the field are represented in polynomial basis and no basis conversion is required. The apparatus consists of two distinct subunits. The first subunit simultaneously produces the first m alpha -multiples of one of the two elements to be multiplied. The second subunit simultaneously produces the m inner products of the second element and the m vectors consisting of suitable components of the above mentioned alpha -multiples. Both subunits are capable of operating over any Galois field GF(p<m>) where m is an integer in the range [2, M]. Consequently, the apparatus is programmable for operation over any of the above mentioned Galois fields.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE9002124A SE466822B (en) | 1990-06-15 | 1990-06-15 | DEVICE FOR MULTIPLICATION OF TWO ELEMENTS IN A GALOIC BODY |
PCT/SE1991/000384 WO1991020028A1 (en) | 1990-06-15 | 1991-05-31 | Universal galois field multiplier |
AU80765/91A AU8076591A (en) | 1990-06-15 | 1991-05-31 | Universal galois field multiplier |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE9002124A SE466822B (en) | 1990-06-15 | 1990-06-15 | DEVICE FOR MULTIPLICATION OF TWO ELEMENTS IN A GALOIC BODY |
Publications (3)
Publication Number | Publication Date |
---|---|
SE9002124D0 SE9002124D0 (en) | 1990-06-15 |
SE9002124L true SE9002124L (en) | 1991-12-16 |
SE466822B SE466822B (en) | 1992-04-06 |
Family
ID=20379773
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SE9002124A SE466822B (en) | 1990-06-15 | 1990-06-15 | DEVICE FOR MULTIPLICATION OF TWO ELEMENTS IN A GALOIC BODY |
Country Status (3)
Country | Link |
---|---|
AU (1) | AU8076591A (en) |
SE (1) | SE466822B (en) |
WO (1) | WO1991020028A1 (en) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5768168A (en) * | 1996-05-30 | 1998-06-16 | Lg Semicon Co., Ltd. | Universal galois field multiplier |
GB9622539D0 (en) * | 1996-10-30 | 1997-01-08 | Discovision Ass | Galois field multiplier for reed-solomon decoder |
GB9627069D0 (en) * | 1996-12-30 | 1997-02-19 | Certicom Corp | A method and apparatus for finite field multiplication |
JP3833412B2 (en) | 1999-04-09 | 2006-10-11 | 富士通株式会社 | Expression data generation apparatus and method in finite field operation |
US6662346B1 (en) | 2001-10-03 | 2003-12-09 | Marvell International, Ltd. | Method and apparatus for reducing power dissipation in finite field arithmetic circuits |
WO2004001701A1 (en) * | 2002-06-20 | 2003-12-31 | Hitachi, Ltd. | Code calculating device |
EP2434650A1 (en) * | 2010-09-23 | 2012-03-28 | Panasonic Corporation | Reed-Solomon encoder with simplified Galois field multipliers |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3805037A (en) * | 1972-02-22 | 1974-04-16 | J Ellison | N{40 th power galois linear gate |
US4251875A (en) * | 1979-02-12 | 1981-02-17 | Sperry Corporation | Sequential Galois multiplication in GF(2n) with GF(2m) Galois multiplication gates |
JPH0680491B2 (en) * | 1983-12-30 | 1994-10-12 | ソニー株式会社 | Finite field arithmetic circuit |
-
1990
- 1990-06-15 SE SE9002124A patent/SE466822B/en not_active IP Right Cessation
-
1991
- 1991-05-31 AU AU80765/91A patent/AU8076591A/en not_active Abandoned
- 1991-05-31 WO PCT/SE1991/000384 patent/WO1991020028A1/en unknown
Also Published As
Publication number | Publication date |
---|---|
SE9002124D0 (en) | 1990-06-15 |
WO1991020028A1 (en) | 1991-12-26 |
AU8076591A (en) | 1992-01-07 |
SE466822B (en) | 1992-04-06 |
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