SE8903763L - BISTABLE INTEGRATED SEMICONDUCTOR CIRCUIT - Google Patents
BISTABLE INTEGRATED SEMICONDUCTOR CIRCUITInfo
- Publication number
- SE8903763L SE8903763L SE8903763A SE8903763A SE8903763L SE 8903763 L SE8903763 L SE 8903763L SE 8903763 A SE8903763 A SE 8903763A SE 8903763 A SE8903763 A SE 8903763A SE 8903763 L SE8903763 L SE 8903763L
- Authority
- SE
- Sweden
- Prior art keywords
- transistors
- type
- connection
- conducting
- circuit
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 230000005669 field effect Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
- H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
- H10B10/125—Static random access memory [SRAM] devices comprising a MOSFET load element the MOSFET being a thin film transistor [TFT]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
- H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
Landscapes
- Semiconductor Memories (AREA)
- Thin Film Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
A bistable integrated semiconductor circuit has four field effect transistors (1, 2, 3, 4), two (1, 2) of P-type and two (3, 4) of N-type. The circuit has connections (5, 6) for a supply voltage between which the transistors are series-connected in pairs, each series connection comprising one P-type transistor and one N-type transistor. The points of connection of the transistors are connected to signal connections (7, 8). The transistors of P-type (1, 2) are connected to the positive supply connection (5) and the transistors (3, 4) of the N-type are connected to the negative supply connection (6). The two transistors (1, 2) of P-type are arranged at different levels and separated by a thin electrically insulating layer. That main region (13 and 23, respectively) of each transistor, which is connected to a signal connection, overlaps the channel region (25 and 15, respectively) of the other transistor. The two transistors of N-type are arranged in a corresponding way. By applying a positive voltage to a signal connection (7), the circuit is brought to assume one of its two stable positions with the transistors (1 and 4) conducting and the transistors (2 and 3) non-conducting. By applying a negative voltage to a signal connection, the circuit is brought to change to the second of its two stable positions, with the transistors (2 and 3) conducting and the transistors (1 and 4) non-conducting.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE8903763A SE464950B (en) | 1989-11-09 | 1989-11-09 | BISTABLE INTEGRATED SEMICONDUCTOR CIRCUIT |
PCT/SE1990/000695 WO1991007781A1 (en) | 1989-11-09 | 1990-10-26 | Bistable integrated semiconductor circuit |
AU67575/90A AU6757590A (en) | 1989-11-09 | 1990-10-26 | Bistable integrated semiconductor circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE8903763A SE464950B (en) | 1989-11-09 | 1989-11-09 | BISTABLE INTEGRATED SEMICONDUCTOR CIRCUIT |
Publications (3)
Publication Number | Publication Date |
---|---|
SE8903763D0 SE8903763D0 (en) | 1989-11-09 |
SE8903763L true SE8903763L (en) | 1991-05-10 |
SE464950B SE464950B (en) | 1991-07-01 |
Family
ID=20377434
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SE8903763A SE464950B (en) | 1989-11-09 | 1989-11-09 | BISTABLE INTEGRATED SEMICONDUCTOR CIRCUIT |
Country Status (3)
Country | Link |
---|---|
AU (1) | AU6757590A (en) |
SE (1) | SE464950B (en) |
WO (1) | WO1991007781A1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
SE513284C2 (en) * | 1996-07-26 | 2000-08-14 | Ericsson Telefon Ab L M | Semiconductor component with linear current-to-voltage characteristics |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3685026D1 (en) * | 1986-07-09 | 1992-05-27 | Itt Ind Gmbh Deutsche | CLOCKED CMOS SWITCHING WITH AT LEAST ONE CMOS SWITCH. |
SE460448B (en) * | 1988-02-29 | 1989-10-09 | Asea Brown Boveri | DOUBLE DIRECT MOS SWITCH |
-
1989
- 1989-11-09 SE SE8903763A patent/SE464950B/en not_active IP Right Cessation
-
1990
- 1990-10-26 WO PCT/SE1990/000695 patent/WO1991007781A1/en unknown
- 1990-10-26 AU AU67575/90A patent/AU6757590A/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
WO1991007781A1 (en) | 1991-05-30 |
SE8903763D0 (en) | 1989-11-09 |
AU6757590A (en) | 1991-06-13 |
SE464950B (en) | 1991-07-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
NUG | Patent has lapsed |
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