SE8500337L - DIGITAL SIGNAL PROCESSING DEVICE WITH DATA COLLECTION BODY CONTAINING SAMPLES OF THE SIGNAL TO BE PROCESSED - Google Patents
DIGITAL SIGNAL PROCESSING DEVICE WITH DATA COLLECTION BODY CONTAINING SAMPLES OF THE SIGNAL TO BE PROCESSEDInfo
- Publication number
- SE8500337L SE8500337L SE8500337A SE8500337A SE8500337L SE 8500337 L SE8500337 L SE 8500337L SE 8500337 A SE8500337 A SE 8500337A SE 8500337 A SE8500337 A SE 8500337A SE 8500337 L SE8500337 L SE 8500337L
- Authority
- SE
- Sweden
- Prior art keywords
- digital signal
- processed
- signal processing
- signal
- processing device
- Prior art date
Links
- 238000012545 processing Methods 0.000 title abstract 3
- 238000013480 data collection Methods 0.000 title 1
- 230000000717 retained effect Effects 0.000 abstract 1
- 238000000844 transformation Methods 0.000 abstract 1
- 230000009466 transformation Effects 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Computer Hardware Design (AREA)
- Image Analysis (AREA)
- Complex Calculations (AREA)
Abstract
In this digital signal treatment arrangement, which involves N operator circuits (2n) which communicate with themselves and each one has an arithmetical unit (3n) and a memory (4n) which contains the sample of that signal which is to be processed, a programme control circuit (1), which controls the N circuits in exactly the same way, and an addressing device (1,5n, 6n) for registering and for reading of the N-memories, whereby the addressing units for registering and for reading of the N-memories are so arranged that several processings can be managed in parallel, whereby at the same time, one carries out the same elementary transformations on those tests of the samples which correlate to equidistant corresponding terminals along the section of the retained signal.Application of digital signal processing.<IMAGE>
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE8500337A SE8500337L (en) | 1985-01-24 | 1985-01-24 | DIGITAL SIGNAL PROCESSING DEVICE WITH DATA COLLECTION BODY CONTAINING SAMPLES OF THE SIGNAL TO BE PROCESSED |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE8500337A SE8500337L (en) | 1985-01-24 | 1985-01-24 | DIGITAL SIGNAL PROCESSING DEVICE WITH DATA COLLECTION BODY CONTAINING SAMPLES OF THE SIGNAL TO BE PROCESSED |
Publications (3)
Publication Number | Publication Date |
---|---|
SE8500337D0 SE8500337D0 (en) | 1985-01-24 |
SE444089B SE444089B (en) | 1986-03-17 |
SE8500337L true SE8500337L (en) | 1986-03-17 |
Family
ID=20358884
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SE8500337A SE8500337L (en) | 1985-01-24 | 1985-01-24 | DIGITAL SIGNAL PROCESSING DEVICE WITH DATA COLLECTION BODY CONTAINING SAMPLES OF THE SIGNAL TO BE PROCESSED |
Country Status (1)
Country | Link |
---|---|
SE (1) | SE8500337L (en) |
-
1985
- 1985-01-24 SE SE8500337A patent/SE8500337L/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
SE8500337D0 (en) | 1985-01-24 |
SE444089B (en) | 1986-03-17 |
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