SE7603315L - METHOD OF DESIGNING DIELECTRICALLY ISOLATED REGIONS IN A SILICONE SUBSTRATE - Google Patents
METHOD OF DESIGNING DIELECTRICALLY ISOLATED REGIONS IN A SILICONE SUBSTRATEInfo
- Publication number
- SE7603315L SE7603315L SE7603315A SE7603315A SE7603315L SE 7603315 L SE7603315 L SE 7603315L SE 7603315 A SE7603315 A SE 7603315A SE 7603315 A SE7603315 A SE 7603315A SE 7603315 L SE7603315 L SE 7603315L
- Authority
- SE
- Sweden
- Prior art keywords
- designing
- isolated regions
- silicone substrate
- dielectrically isolated
- dielectrically
- Prior art date
Links
- 229920001296 polysiloxane Polymers 0.000 title 1
- 239000000758 substrate Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
- H01L21/76205—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/036—Diffusion, nonselective
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/049—Equivalence and options
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/051—Etching
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/082—Ion implantation FETs/COMs
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/085—Isolated-integrated
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/117—Oxidation, selective
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US05/568,636 US4044454A (en) | 1975-04-16 | 1975-04-16 | Method for forming integrated circuit regions defined by recessed dielectric isolation |
Publications (2)
Publication Number | Publication Date |
---|---|
SE7603315L true SE7603315L (en) | 1976-10-17 |
SE411814B SE411814B (en) | 1980-02-04 |
Family
ID=24272102
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SE7603315A SE411814B (en) | 1975-04-16 | 1976-03-16 | METHOD FOR MANUFACTURING INTEGRATED CIRCUITS WITH DIELECTRICALLY ISOLATED AREAS DESIGNED IN A SILICONE SUBSTRATE |
Country Status (13)
Country | Link |
---|---|
US (1) | US4044454A (en) |
JP (1) | JPS51124386A (en) |
AU (1) | AU497861B2 (en) |
BE (1) | BE839579A (en) |
BR (1) | BR7602384A (en) |
CA (1) | CA1045724A (en) |
CH (1) | CH592959A5 (en) |
DE (1) | DE2615438A1 (en) |
FR (1) | FR2308204A1 (en) |
GB (1) | GB1515639A (en) |
IT (1) | IT1064171B (en) |
NL (1) | NL7603747A (en) |
SE (1) | SE411814B (en) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5275989A (en) * | 1975-12-22 | 1977-06-25 | Hitachi Ltd | Production of semiconductor device |
JPS6035818B2 (en) * | 1976-09-22 | 1985-08-16 | 日本電気株式会社 | Manufacturing method of semiconductor device |
FR2422257A1 (en) * | 1977-11-28 | 1979-11-02 | Silicium Semiconducteur Ssc | FILLING AND GLASSIVIATION PROCESS AND NEW FILLING STRUCTURE |
US4261761A (en) * | 1979-09-04 | 1981-04-14 | Tektronix, Inc. | Method of manufacturing sub-micron channel width MOS transistor |
FR2476912A1 (en) * | 1980-02-22 | 1981-08-28 | Thomson Csf | METHOD FOR ISOLATING INTERCONNECTIONS IN INTEGRATED CIRCUITS, AND INTEGRATED CIRCUIT USING THE SAME |
US4505026A (en) * | 1983-07-14 | 1985-03-19 | Intel Corporation | CMOS Process for fabricating integrated circuits, particularly dynamic memory cells |
US4536947A (en) * | 1983-07-14 | 1985-08-27 | Intel Corporation | CMOS process for fabricating integrated circuits, particularly dynamic memory cells with storage capacitors |
US4519128A (en) * | 1983-10-05 | 1985-05-28 | International Business Machines Corporation | Method of making a trench isolated device |
US4594769A (en) * | 1984-06-15 | 1986-06-17 | Signetics Corporation | Method of forming insulator of selectively varying thickness on patterned conductive layer |
US4983537A (en) * | 1986-12-29 | 1991-01-08 | General Electric Company | Method of making a buried oxide field isolation structure |
US5061654A (en) * | 1987-07-01 | 1991-10-29 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor integrated circuit having oxide regions with different thickness |
EP0309788A1 (en) * | 1987-09-30 | 1989-04-05 | Siemens Aktiengesellschaft | Process for producing an embedded oxide |
JP2886183B2 (en) * | 1988-06-28 | 1999-04-26 | 三菱電機株式会社 | Method of manufacturing field isolation insulating film |
US5049520A (en) * | 1990-06-06 | 1991-09-17 | Micron Technology, Inc. | Method of partially eliminating the bird's beak effect without adding any process steps |
JPH06349820A (en) * | 1993-06-11 | 1994-12-22 | Rohm Co Ltd | Manufacture of semiconductor device |
JP2911394B2 (en) * | 1995-08-22 | 1999-06-23 | 株式会社アルテクス | Ultrasonic bonding equipment and resonator |
US5882982A (en) * | 1997-01-16 | 1999-03-16 | Vlsi Technology, Inc. | Trench isolation method |
EP0856886B1 (en) * | 1997-01-31 | 2003-06-25 | STMicroelectronics S.r.l. | Process for forming an edge structure to seal integrated electronic devices, and corresponding device |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL159817B (en) * | 1966-10-05 | 1979-03-15 | Philips Nv | PROCESS FOR THE MANUFACTURE OF A SEMI-CONDUCTOR DEVICE. |
NL170348C (en) * | 1970-07-10 | 1982-10-18 | Philips Nv | METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE APPLYING TO A SURFACE OF A SEMICONDUCTOR BODY AGAINST DOTTING AND AGAINST THERMAL OXIDICATION MASK MATERIAL, PRE-FRIENDLY COVERING THE WINDOWS OF THE WINDOWS IN THE MATERIALS The semiconductor body with the mask is subjected to a thermal oxidation treatment to form an oxide pattern that at least partially fills in the recesses. |
NL173110C (en) * | 1971-03-17 | 1983-12-01 | Philips Nv | METHOD FOR MANUFACTURING A SEMI-CONDUCTOR DEVICE APPLICATING ON A SURFACE OF A SEMI-CONDUCTOR BODY AT LEAST TWO PART-LAYERS OF DIFFERENT MATERIAL COATING. |
JPS5710569B2 (en) * | 1972-03-31 | 1982-02-26 | ||
NL7204741A (en) * | 1972-04-08 | 1973-10-10 | ||
US3808058A (en) * | 1972-08-17 | 1974-04-30 | Bell Telephone Labor Inc | Fabrication of mesa diode with channel guard |
US3853633A (en) * | 1972-12-04 | 1974-12-10 | Motorola Inc | Method of making a semi planar insulated gate field-effect transistor device with implanted field |
JPS5214594B2 (en) * | 1973-10-17 | 1977-04-22 | ||
US3962779A (en) * | 1974-01-14 | 1976-06-15 | Bell Telephone Laboratories, Incorporated | Method for fabricating oxide isolated integrated circuits |
US3904450A (en) * | 1974-04-26 | 1975-09-09 | Bell Telephone Labor Inc | Method of fabricating injection logic integrated circuits using oxide isolation |
US3899363A (en) * | 1974-06-28 | 1975-08-12 | Ibm | Method and device for reducing sidewall conduction in recessed oxide pet arrays |
US3961999A (en) * | 1975-06-30 | 1976-06-08 | Ibm Corporation | Method for forming recessed dielectric isolation with a minimized "bird's beak" problem |
-
1975
- 1975-04-16 US US05/568,636 patent/US4044454A/en not_active Expired - Lifetime
-
1976
- 1976-03-02 FR FR7606741A patent/FR2308204A1/en active Granted
- 1976-03-08 GB GB9131/76A patent/GB1515639A/en not_active Expired
- 1976-03-15 BE BE165175A patent/BE839579A/en not_active IP Right Cessation
- 1976-03-16 SE SE7603315A patent/SE411814B/en unknown
- 1976-03-24 IT IT21525/76A patent/IT1064171B/en active
- 1976-04-09 JP JP51039455A patent/JPS51124386A/en active Granted
- 1976-04-09 NL NL7603747A patent/NL7603747A/en unknown
- 1976-04-09 DE DE19762615438 patent/DE2615438A1/en active Pending
- 1976-04-12 CH CH459476A patent/CH592959A5/xx not_active IP Right Cessation
- 1976-04-13 AU AU12957/76A patent/AU497861B2/en not_active Expired
- 1976-04-13 CA CA250,193A patent/CA1045724A/en not_active Expired
- 1976-04-19 BR BR7602384A patent/BR7602384A/en unknown
Also Published As
Publication number | Publication date |
---|---|
AU1295776A (en) | 1977-10-20 |
CH592959A5 (en) | 1977-11-15 |
AU497861B2 (en) | 1979-01-25 |
BR7602384A (en) | 1976-10-12 |
NL7603747A (en) | 1976-10-19 |
FR2308204A1 (en) | 1976-11-12 |
SE411814B (en) | 1980-02-04 |
GB1515639A (en) | 1978-06-28 |
BE839579A (en) | 1976-07-01 |
FR2308204B1 (en) | 1978-09-01 |
JPS5413349B2 (en) | 1979-05-30 |
JPS51124386A (en) | 1976-10-29 |
DE2615438A1 (en) | 1976-10-28 |
US4044454A (en) | 1977-08-30 |
IT1064171B (en) | 1985-02-18 |
CA1045724A (en) | 1979-01-02 |
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