SE319838B - - Google Patents

Info

Publication number
SE319838B
SE319838B SE362/67A SE36267A SE319838B SE 319838 B SE319838 B SE 319838B SE 362/67 A SE362/67 A SE 362/67A SE 36267 A SE36267 A SE 36267A SE 319838 B SE319838 B SE 319838B
Authority
SE
Sweden
Application number
SE362/67A
Inventor
K Raithel
R Rosenheinrich
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of SE319838B publication Critical patent/SE319838B/xx

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/69—Etching of wafers, substrates or parts of devices using masks for semiconductor materials
    • H10P50/691—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials
    • H10P50/692—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials characterised by their composition, e.g. multilayer masks or materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/69—Etching of wafers, substrates or parts of devices using masks for semiconductor materials
    • H10P50/691—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials
    • H10P50/693—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials characterised by their size, orientation, disposition, behaviour or shape, in horizontal or vertical plane
    • H10P50/695—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials characterised by their size, orientation, disposition, behaviour or shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks or sidewalls or to modify the mask
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/106—Masks, special
SE362/67A 1966-02-12 1967-01-11 SE319838B (en:Method)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DES0101984 1966-02-12

Publications (1)

Publication Number Publication Date
SE319838B true SE319838B (en:Method) 1970-01-26

Family

ID=7524118

Family Applications (1)

Application Number Title Priority Date Filing Date
SE362/67A SE319838B (en:Method) 1966-02-12 1967-01-11

Country Status (8)

Country Link
US (1) US3589937A (en:Method)
BE (1) BE693884A (en:Method)
CH (1) CH450556A (en:Method)
DE (1) DE1514683B1 (en:Method)
FR (1) FR1511259A (en:Method)
GB (1) GB1107497A (en:Method)
NL (1) NL6701904A (en:Method)
SE (1) SE319838B (en:Method)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4079406A (en) * 1974-08-13 1978-03-14 Siemens Aktiengesellschaft Thyristor having a plurality of emitter shorts in defined spacial relationship
DE3744308A1 (de) * 1987-12-28 1989-07-06 Bbc Brown Boveri & Cie Leistungshalbleiter-bauelement sowie verfahren zu dessen herstellung

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE966879C (de) * 1953-02-21 1957-09-12 Standard Elektrik Ag Verfahren zur Reinigung und/oder Abtragung von Halbleitermaterial, insbesondere von Germanium- und Siliziumsubstanz
DE1152293B (de) * 1958-08-12 1963-08-01 Siemens Ag Verfahren zum oertlich begrenzten AEtzen von pn-UEbergaengen benachbarten Flaechen an Halbleiterkoerpern von elektrischen Halbleiteranordnungen
DE1132405B (de) * 1960-11-04 1962-06-28 Siemens Ag Verfahren zum lokalisierten AEtzen der Oberflaeche von Werkstuecken, insbesondere von Halbleiterkristallen

Also Published As

Publication number Publication date
BE693884A (en:Method) 1967-08-09
US3589937A (en) 1971-06-29
FR1511259A (fr) 1968-01-26
DE1514683B1 (de) 1970-04-02
GB1107497A (en) 1968-03-27
CH450556A (de) 1968-01-31
NL6701904A (en:Method) 1967-08-14

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