FR1511259A - Procédé d'établissement de dérivations électriques servant au shuntage des jonctions p-n dans des corps semiconducteurs - Google Patents

Procédé d'établissement de dérivations électriques servant au shuntage des jonctions p-n dans des corps semiconducteurs

Info

Publication number
FR1511259A
FR1511259A FR94598A FR94598A FR1511259A FR 1511259 A FR1511259 A FR 1511259A FR 94598 A FR94598 A FR 94598A FR 94598 A FR94598 A FR 94598A FR 1511259 A FR1511259 A FR 1511259A
Authority
FR
France
Prior art keywords
shunting
junctions
semiconductor bodies
establishing electrical
electrical branches
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR94598A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Application granted granted Critical
Publication of FR1511259A publication Critical patent/FR1511259A/fr
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting
    • H01L21/3046Mechanical treatment, e.g. grinding, polishing, cutting using blasting, e.g. sand-blasting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3081Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3083Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/3086Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/106Masks, special

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Thyristors (AREA)
FR94598A 1966-02-12 1967-02-10 Procédé d'établissement de dérivations électriques servant au shuntage des jonctions p-n dans des corps semiconducteurs Expired FR1511259A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DES0101984 1966-02-12

Publications (1)

Publication Number Publication Date
FR1511259A true FR1511259A (fr) 1968-01-26

Family

ID=7524118

Family Applications (1)

Application Number Title Priority Date Filing Date
FR94598A Expired FR1511259A (fr) 1966-02-12 1967-02-10 Procédé d'établissement de dérivations électriques servant au shuntage des jonctions p-n dans des corps semiconducteurs

Country Status (8)

Country Link
US (1) US3589937A (fr)
BE (1) BE693884A (fr)
CH (1) CH450556A (fr)
DE (1) DE1514683B1 (fr)
FR (1) FR1511259A (fr)
GB (1) GB1107497A (fr)
NL (1) NL6701904A (fr)
SE (1) SE319838B (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4079406A (en) * 1974-08-13 1978-03-14 Siemens Aktiengesellschaft Thyristor having a plurality of emitter shorts in defined spacial relationship
DE3744308A1 (de) * 1987-12-28 1989-07-06 Bbc Brown Boveri & Cie Leistungshalbleiter-bauelement sowie verfahren zu dessen herstellung

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE966879C (de) * 1953-02-21 1957-09-12 Standard Elektrik Ag Verfahren zur Reinigung und/oder Abtragung von Halbleitermaterial, insbesondere von Germanium- und Siliziumsubstanz
DE1152293B (de) * 1958-08-12 1963-08-01 Siemens Ag Verfahren zum oertlich begrenzten AEtzen von pn-UEbergaengen benachbarten Flaechen an Halbleiterkoerpern von elektrischen Halbleiteranordnungen
DE1132405B (de) * 1960-11-04 1962-06-28 Siemens Ag Verfahren zum lokalisierten AEtzen der Oberflaeche von Werkstuecken, insbesondere von Halbleiterkristallen

Also Published As

Publication number Publication date
GB1107497A (en) 1968-03-27
NL6701904A (fr) 1967-08-14
BE693884A (fr) 1967-08-09
US3589937A (en) 1971-06-29
SE319838B (fr) 1970-01-26
CH450556A (de) 1968-01-31
DE1514683B1 (de) 1970-04-02

Similar Documents

Publication Publication Date Title
BR6915742D0 (pt) Dispositivo semicondutor
FR1435786A (fr) Procédé pour la préparation de jonctions p-n dans le silicium
BR6915753D0 (pt) Estrutura de semicondutor
ZA698728B (en) Improvements in and relating to methods of manufacturing semiconductor devices
FR1535501A (fr) Solutions de polyamides acides, procédés pour les préparer et utilisation de ces solutions
BR6915308D0 (pt) Dispositivo de retificadores semicondutores
CH501316A (de) Monolithische Halbleitervorrichtung
MY7300448A (en) Improvements in or relating to methods of etching semiconductor devices
FR1511259A (fr) Procédé d'établissement de dérivations électriques servant au shuntage des jonctions p-n dans des corps semiconducteurs
FR1495558A (fr) Polyuréthane, son procédé de préparation et son utilisation dans des compositions d'enduits collants
MY7300447A (en) Improvements in or relating to methods of making semiconductor devices
BE613425A (fr) Procédé pour l'attaque chimique de corps semi-conducteurs en substance monocristallins
CH508985A (de) Sperrschicht-Halbleitervorrichtung
FR1526830A (fr) Nouvelle préparation de résine benzimidazolique
GB1118536A (en) Improvements in or relating to semiconductor devices
CH471666A (fr) Nouvel article en forme et procédé pour l'obtenir
FR1487056A (fr) Procédé de fabrication de diodes au phosphure de gallium
FR1547287A (fr) Diode semiconductrice
FR1373822A (fr) Procédé de réalisation de diffusion localisée d'une impureté dans un semiconducteur
FR1402377A (fr) Formation de jonctions p-n dans du silicium
FR1495476A (fr) Procédé d'oxydation de l'arséniure de gallium
FR1547821A (fr) Nouveaux agents agissant sur la croissance des végétaux
FR1501996A (fr) Procédé de fabrication de diodes tunnel en arséniure de gallium
FR1462591A (fr) Procédé de dopage de régions dans des corps semi-conducteurs
BE753308A (fr) Corps de refroidissement pour elements a semi-conducteur