SE302056B - - Google Patents
Info
- Publication number
- SE302056B SE302056B SE12679/60A SE1267960A SE302056B SE 302056 B SE302056 B SE 302056B SE 12679/60 A SE12679/60 A SE 12679/60A SE 1267960 A SE1267960 A SE 1267960A SE 302056 B SE302056 B SE 302056B
- Authority
- SE
- Sweden
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
- G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
- G06F7/729—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic using representation by a residue number system
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Computational Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computing Systems (AREA)
- Mathematical Physics (AREA)
- General Engineering & Computer Science (AREA)
- Complex Calculations (AREA)
- Paper (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CH8248859A CH412411A (de) | 1959-12-30 | 1959-12-30 | Vorrichtung zur Durchführung von Multiplikationen und Divisionen im Zahlensystem der Restklassen |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| SE302056B true SE302056B (xx) | 1968-07-01 |
Family
ID=4539821
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| SE12679/60A SE302056B (xx) | 1959-12-30 | 1960-12-30 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US3167645A (xx) |
| CH (1) | CH412411A (xx) |
| GB (1) | GB969495A (xx) |
| NL (1) | NL259443A (xx) |
| SE (1) | SE302056B (xx) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| SU579618A1 (ru) * | 1975-03-25 | 1977-11-05 | Институт математики и механики АН Казахской ССР | Устройство дл умножени |
| DE2619307A1 (de) * | 1976-04-30 | 1977-11-10 | Inst Mat I Mekh Akademii Nauk | Multipliziereinrichtung |
| US4041284A (en) * | 1976-09-07 | 1977-08-09 | The United States Of America As Represented By The Secretary Of The Navy | Signal processing devices using residue class arithmetic |
| US4107783A (en) * | 1977-02-02 | 1978-08-15 | The Board Of Trustees Of The Leland Stanford Junior University | System for processing arithmetic information using residue arithmetic |
| US4334277A (en) * | 1977-09-28 | 1982-06-08 | The United States Of America As Represented By The Secretary Of The Navy | High-accuracy multipliers using analog and digital components |
| JPS6042965B2 (ja) * | 1979-06-01 | 1985-09-26 | 愛介 片山 | 複数法形高速乗算装置 |
| US4458327A (en) * | 1979-06-28 | 1984-07-03 | John Larson | Prime or relatively prime radix data processing system |
| DE3138698A1 (de) * | 1981-09-29 | 1983-04-07 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zur potenzierung grosser binaerzahlen in einer restklasse modulo n, insbesondere zur verschluesselung und entschluesselung digital dargestellter nachrichten |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US2697549A (en) * | 1950-03-18 | 1954-12-21 | Gen Electric | Electronic multiradix counter of matrix type |
| US3081032A (en) * | 1959-02-26 | 1963-03-12 | Bendix Corp | Parallel digital adder system |
-
1959
- 1959-12-30 CH CH8248859A patent/CH412411A/de unknown
-
1960
- 1960-12-08 US US74516A patent/US3167645A/en not_active Expired - Lifetime
- 1960-12-23 NL NL259443A patent/NL259443A/nl unknown
- 1960-12-30 GB GB44816/60A patent/GB969495A/en not_active Expired
- 1960-12-30 SE SE12679/60A patent/SE302056B/xx unknown
Also Published As
| Publication number | Publication date |
|---|---|
| CH412411A (de) | 1966-04-30 |
| GB969495A (en) | 1964-09-09 |
| NL259443A (nl) | 1964-04-27 |
| US3167645A (en) | 1965-01-26 |