RU2813854C1 - High-frequency key cascade bias circuit with high-speed amplitude-shift keying - Google Patents

Abstract

FIELD: high-frequency radio engineering.

SUBSTANCE: invention relates to high-frequency (HF) radio engineering. High-frequency key stage bias circuit with high-speed amplitude-shift keying comprises high-frequency (HF) stage and pulse modulation inputs, push-pull field transistor LDMOSFET driver, input HF transformer T1, power HF transistor LDMOSFET VT1, output HF transformer T2, power filter choke L1, HF output of cascade K4, circuit R1C1, connected in parallel to middle point of secondary winding of input HF transformer T1, connected to gates of power HF transistor LDMOSFET VT1, as well as diodes VD1, VD2, together with capacitor C1, forming a positive half-wave detector, and inputs of the HF cascade and pulse modulation through the push-pull field transistor LDMOSFET driver are connected to the primary winding of the input HF transformer, arms of the power HF transistor LDMOSFET VT1 are connected to the primary winding of the output HF transformer T2, and to the middle point of the primary winding of the output HF transformer T2 the supply filter choke L1 is connected.

EFFECT: preservation of time of decay of trailing edge of radio pulse initially high and complete elimination of overshoot on drains of power high-frequency (HF) transistor.

1 cl, 4 dwg

Description

The invention relates to high-frequency (HF) radio engineering, to amplification cascades operating in a key mode with 100% amplitude modulation (manipulation).

Amplitude manipulation in key stages, if it is carried out by interrupting the RF signal at the input of the stage, is characterized by very steep edges, both leading and trailing. In modern key stages, an almost TTL signal is supplied to the gates of the RF power transistor. The fronts of the radio pulse can be 2-3 periods of the RF signal.

At the trailing edge of the radio pulse, with a sharp drop in current consumption, a voltage surge appears at the drains of the RF transistor due to the fact that in the transistor power circuit there is a sufficiently large inductance of the output transformer, power filter chokes, etc.

The voltage diagram at the drain of the RF transistor during amplitude manipulation, obtained experimentally, is presented in Fig. 1. The working part of the radio pulse has a voltage U ₁ , which is determined by the result of designing the cascade and calculating its output circuit.

Eliminating the described phenomenon by artificially increasing the decay time of the trailing edge of the radio pulse is possible, but in the vast majority of cases it is unacceptable due to the deterioration of the modulation qualities of the cascade, such as, for example, the information transmission rate.

There is a known LDMOSFET drive circuit [1], [2], [3] using direct connection of field-effect transistor drivers, Fig. 2, containing the RF input of the cascade, the input of pulse manipulation, the power terminal, the RF output of the cascade, the driver of a push-pull field-effect transistor LDMOSFET, the power RF LDMOSFET transistor, RF output transformer, power filter choke. or using an impedance transformer, Fig. 3, containing the RF input of the stage, the input of pulse manipulation, the power terminal, the RF output of the stage, the LDMOSFET push-pull field-effect transistor driver, the LDMOSFET power RF transistor, the RF input transformer, the RF output transformer, the power filter choke.

These circuits of RF power transistors have a reference voltage U _(BR)DSS (drain-source breakdown voltage) - self-triggering voltage. A slight excess of this voltage is not dangerous, because modern LDMOSFETs are produced using technology that provides a certain avalanche resistance. However, the avalanche breakdown energy is limited (in Fig. 1, U _{AVAL Limit} ). If the initial voltage at the drain of the transistor develops such that the energy avalanche it causes exceeds the limit, the transistor fails.

The technical problem solved by the claimed invention is to increase reliability.

The technical result consists in maintaining the decay time of the trailing edge of the radio pulse initially high and completely eliminating the formation of a surge at the drains of the high-frequency (RF) power transistor.

The specified technical result is achieved in a bias circuit of a high-frequency switching stage with high-speed amplitude manipulation, containing inputs of a high-frequency (RF) stage and pulse modulation, a push-pull LDMOSFET field-effect transistor driver, an RF input transformer T1, a RF power transistor LDMOSFET VT1, an RF output transformer T2, a filter inductor power supply L1, RF output of stage K4, additionally containing circuit R1C1, connected in parallel to the midpoint of the secondary winding of the input RF transformer T1, connected to the gates of the power RF transistor LDMOSFET VT1, as well as diodes VD1, VD2, which together with capacitor C1 form a detector positive half wave.

The claimed invention is illustrated in graphic materials, where

Figure 1 - Diagrams of voltages at the drains of a power RF transistor during amplitude manipulation.

Figure 2 - LDMOSFET drive circuit using direct connection of field-effect transistor drivers, where:

K1 - RF input of the cascade;

K2 - pulse manipulation input;

K3 - power terminal;

K4 - RF output of the cascade;

D1 - driver of a push-pull field-effect transistor LDMOSFET;

VT1 - RF power transistor LDMOSFET;

T2 - output RF transformer;

L1 - power filter choke.

Figure 3 is a diagram for driving an LDMOSFET using an impedance transformer, where:

T1 - input RF transformer;

D1 - field-effect transistor driver;

T2 - output RF transformer.

Figure 4 is a diagram of the claimed invention, where:

R1 – resistor;

C1 – capacitor;

VD1 - diode;

VD2 – diode.

The claimed circuit simultaneously maintains the decay time of the trailing edge of the radio pulse initially high and completely eliminates the formation of a surge at the drains of the power RF transistor, Fig. 4.

The circuit differs in that there is a resistor R1 and a capacitor C1 connected in parallel to the midpoint of the secondary winding (gate winding of the RF power transistor) of the RF input transformer on one side and a common wire (ground) on the other side. There are diodes VD1, VD2, connected by cathodes to the gates of the RF power transistor and anodes to ground.

Diodes VD1 and VD2, together with capacitor C1, form an amplitude detector of the positive half-wave, which leads to the appearance of a constant voltage (bias voltage) at the gates of the RF power transistor VT1 (bias voltage) while the RF input signal is present. The bias voltage is equal to half the swing of the input RF signal and does not remove transistor VT1 from the key mode and does not reduce the efficiency of the cascade.

When the RF input signal is interrupted by modulation (absent), the bias voltage continues to be present for a time determined by the time constant of circuit R1, C1. This voltage is greater than the unlocking voltage of transistor VT1. Thus, both arms of VT1 are simultaneously open for some time and, by shunting the output transformer, they extinguish the current stored in the inductances of the output circuit T2 and L1, thereby preventing the appearance of a voltage surge on the drains of VT1, as if the arms of transistor VT1 instantly both closed when the input RF signal ceased .

The time constant of the circuit R1C1 is selected sufficient to completely extinguish the current stored in inductances T2 and L1, but at the same time without excess. In this case, a decrease in efficiency will only be observed to a small extent only in the high-speed modulation mode, when the time fraction of the durations of the leading and trailing edges occupies 10% or more in the RF signal period, and will not be observed at all in the continuous mode. The time constant R1C1 should be equal to approximately three periods of the RF signal, because observations and experiments have shown that 90% of the emission energy is contained in the specified interval.

An example of a circuit implementation at a given RF signal frequency

For example, let’s choose a frequency of the RF signal equal to

F=10 MHz = 10 ⁶ Hz.

The period of the RF signal is

T= 1/F = 10 ^-7 s.

Since 90% of the energy of the inductive surge is contained in three periods of HF oscillations, the time required to extinguish it is

T _GASH = 3T = 3×10 ^-7 s.

The time constant of circuit R1C1 should also be 0.3 μs. Since the chain constant is determined by the formula

τ = RC,

then only the value of R can be calculated for a given C and vice versa. Let R=1 kOhm, then

C = τ / R,

C = 3×10 ^-7 / 10 ³ = 3×10 ^-10 = 300 pF

Information sources:

1. https://www.microsemi.com/sites/default/files/micnotes/DRF1200.pdf , publication date 12/22/2008, 13.56 MHz, CLASS-E, 1KW RF Generator using a Microsemi DRF1200 Driver/MOSFET Hybrid (Fig. .2).

2. https://ww1.microchip.com/downloads/en/Appnotes/1811_C.pdf 13.56 MHz, CLASS-E, 1KW RF Generator using a Microsemi DRF1200 Driver/MOSFET (Fig. 7)

https://ww1.microchip.com/downloads/en/Appnotes/1812%20C.pdf , publication date September, 2011, 13.56 MHz, Class D Push-Pull, 2KW RF Generator with Microsemi DRF1300 Power MOSFET Hybrid (Fig. 3 ).

Claims (1)

High-frequency switching stage bias circuit with high-speed amplitude shift keying, containing high-frequency (RF) stage and pulse modulation inputs, LDMOSFET push-pull field-effect transistor driver, RF input transformer T1, RF power transistor LDMOSFET VT1, RF output transformer T2, power filter choke L1, RF output cascade K4, characterized in that it additionally contains circuit R1C1 connected in parallel to the midpoint of the secondary winding of the input RF transformer T1, connected to the gates of the RF power transistor LDMOSFET VT1, as well as diodes VD1, VD2, which together with capacitor C1 form a positive half-wave detector, in this case, the inputs of the RF cascade and pulse modulation through the driver of the push-pull field-effect transistor LDMOSFET are connected to the primary winding of the input RF transformer, the arms of the power RF transistor LDMOSFET VT1 are connected to the primary winding of the output RF transformer T2, and a filter choke is connected to the midpoint of the primary winding of the output RF transformer T2 power supply L1.