RU2784904C1 - Image capture display terminal - Google Patents

Abstract

FIELD: images capturing and processing.

SUBSTANCE: invention relates to the field of capturing and processing images. The effect is achieved in that the image capturing display terminal comprises a control module, a first optimization unit, a second optimization unit, a first image capture module, a second image capture module, and a first node. The control unit outputs a control signal for controlling the first image capturing unit and the second image capturing unit to perform time division in the running state. The first signal interface is electrically connected to the first node. The first optimization unit is electrically connected between the first node and the first image capture module, and the second optimization unit is electrically connected between the first node and the second image capture module. The first optimization block is used to smooth the curve of the first image signal corresponding to the first image captured when the first image capturing unit is in operation, and the second optimization block is used to smooth the curve of the second image signal corresponding to the second image captured when the second image capture module is in working order.

EFFECT: improving the quality of the captured image without increasing the number of required components and connecting lines between the camera modules and the image processing module.

16 cl, 16 dwg

Description

The present application claims priority under Chinese Patent Application No. 201910667438.8 titled "IMAGE CAPTURE DISPLAY TERMINAL" filed with the National Intellectual Property Office of China on July 23, 2019, the contents of which are incorporated herein by reference in their entirety.

FIELD OF TECHNOLOGY

Embodiments of the present application relate to the field of image processing technologies and, in particular, to an image capturing display terminal.

BACKGROUND OF THE INVENTION

With the increasing demands of users on image quality, electronic terminals usually use two or more camera modules, such as high-definition cameras, to simultaneously capture images in order to achieve a better shooting effect and meet users' image quality requirements. However, an increase in the number of camera modules also leads to an increase in the number of required components and connecting lines between the camera modules and the image processing module, which affects the board footprint and circuit board layout complexity.

SUMMARY OF THE INVENTION

In order to solve the above technical problems, the present invention proposes an image capturing display terminal in order to reduce the impact on the board footprint on the circuit board.

An image capturing display terminal is provided, comprising an image capturing switching module capable of switching different image capturing modules. The switching image capture module comprises a control module, a first optimization unit, a second optimization unit, a first image capture module, a second image capture module, and a first node. The control module comprises a first control bus and a first signal interface, wherein the control module is electrically connected to the first image capture module and the second image capture module by using the first control bus, and the control module outputs a control signal to control the first image capture module and the second image capture module so that they are in working order with time separation. The first signal interface is electrically connected to the first node. The first optimization unit is electrically connected to the first node and the first image capture module, and the second optimization unit is electrically connected to the first node and the second image capture module. The first image capturing module is configured to capture the first image and output the first image signal, and the second image capture module is configured to capture the second image and output the second image signal. The first image signal corresponding to the captured first image is transmitted to the first signal interface by using the first optimization unit, when the first image capturing module is in operation under the control of the control signal, and the first optimization unit is configured to smooth the first image signal curve. The second image signal corresponding to the captured second image is transmitted to the first signal interface by using the second optimizer when the second image capturing module is in operation under the control of the control signal, and the second optimizer is configured to smooth the second image signal curve.

The control unit can directly control the operating state of the first image capturing unit or the second image capturing unit by using a control bus. In addition, a signal interface capable of transmitting image signals provided by different image capturing modules is effectively saved by sharing the first signal interface, and it is completely unnecessary to set the analog transmission switch separately for the working state of the first image capturing module or module. capture the second image, which effectively reduces the number of components and wires on the circuit board, simplifies the structure of the circuit board, and provides more layout space for installing other functional components.

In the embodiment of the present application, controlling the control module of the first image capturing module and the second image capturing module to be in a time-division working state is as follows: when the first image capturing module is in working state, the second image capturing module is in non-working state. state, and when the first image capturing module is in the working state, the second image capturing module is in the non-working state. When the first image capturing module is in the working state, that is, the first image capturing module is in high speed low resistance mode to capture the first image signal and transmits the first image signal from the first signal interface to the control module, the second image capturing module is in idle state, that is, the second image capturing module is in low power high resistance mode, the second image capturing module stops capturing the second image. When the second image capturing module is in the working state, that is, the second image capturing module is in the high speed low resistance mode, and the first image capturing module is in the idle state, that is, the first image capturing module is in the low power, high resistance mode, the second image capturing module captures the second image signal and transmits the second image signal from the first signal interface to the control module, and the first image capturing module stops capturing the first image.

When the first image capture module is in the high-resistance low power mode, the impedance of the first image capture module is greater than 100 Ω; and, when the second image pickup module is in the high-resistance low power mode, the impedance of the second image pickup module is greater than 100 Ω. Since the impedance of the image pickup module in the non-working state is greater than 100 Ω, signal interference to the image pickup module in the working state can be effectively reduced to ensure the quality of the image signal.

In an embodiment of the present application, when the first image capturing module is in a high speed, low resistance mode and the second image capturing module is in a low power, high resistance mode, the first optimization block specifically eliminates the first image signal callback to ensure smoothness. signal curve about the first image. When the second image capturing module is in the high speed low resistance mode and the first image capturing module is in the low power high resistance mode, the second optimizer specifically eliminates the second image signal callback to ensure that the second image signal curve is flattened. The first optimizer and the second optimizer can effectively eliminate the callback and noise generated by the idle state image pickup module on the image signal curve of the live image capture module due to wire loops.

In an embodiment of the present application, the first optimizer comprises first resistors and the second optimizer comprises second resistors. The first resistors are electrically connected to the control module by using the first node, and the second resistors are electrically connected to the control module by using the first node.

The distance from the first node to the control module is greater than the distance from the first node to the first image capture module; or the distance from the first node to the control module is greater than the distance from the first node to the second image capture module. The first node, the first optimization unit and the second optimization unit are located as close as possible to the image capture modules in order to effectively reduce the impact of wire loops.

In an embodiment of the present application, the first image capturing module and the second image capturing module are arranged in a row on the first straight line, wherein the first straight line is parallel to the control module, and the first node is located on the first straight line, or the first node is located between the first straight line and the module management. Therefore, the distance from the first node to the first image capture module and the distance from the first node to the second image capture module are relatively small, further reducing the effect of wire loops.

In an embodiment of the present application, the first optimization unit further comprises first inductors, and the first inductors are connected in series between the first resistors and the first image capture module. The second optimization unit further comprises second inductors, and the second inductors are connected in series between the second resistors and the second image capture module. The first inductors are configured to filter the signal noise about the first image; and the second inductors are configured to filter the noise of the second image. Therefore, it is further ensured that the image signals supplied to the control unit are consistent, accurate and of relatively good quality.

In an embodiment of the present application, the first signal interface comprises a clock signal interface and a data signal interface, wherein the clock signal interface is configured to receive a clock control signal in a first image signal or a second image signal, and the data signal interface is configured to receive image data in the first picture signal or the second picture signal. The clock signal interface comprises a differential clock pair interface pair, and the differential clock pair interface pair is electrically connected to the first node. The data signal interface comprises a pair of differential data pair interfaces, and the pair of differential data pair interfaces is electrically connected to the first node.

Specifically, the first optimization unit comprises four first resistors, and the first four resistors are respectively electrically connected to the first node and the first image capture module corresponding to the differential clock pair interfaces and the differential data pair interfaces. The second optimization block comprises four second resistors, and the four second resistors are respectively electrically connected to the first node and the second image capture module corresponding to the clock differential pair interfaces and the data differential pair interfaces.

In an embodiment of the present application, in particular, the first optimization unit further comprises four first inductors, and the four first inductors are respectively electrically connected between the four first resistors and the first image capture module. In particular, the second optimization unit further comprises four second inductors, and the four second inductors are respectively electrically connected between the four second resistors and the second image capture module.

Each interface in the shared clock differential pair interfaces and the shared data differential pair interfaces in the first signal interface is provided with a resistor and an inductor to optimize the image signal, thereby ensuring that the image signals transmitted and received by each interface are as free from interference as possible. and the integrity, accuracy and relatively good quality are maintained.

In an embodiment of the present application, the first optimization unit further comprises two first common-mode inductors, wherein each of the first common-mode inductors comprises two first small inductors, and one of the first resistors is connected in series with one of the first small inductors. The second optimization block further comprises two second common-mode inductors, wherein each of the second common-mode inductors comprises two second small inductors, and one of the first resistors is connected in series with one of the second small inductors. Two of the first resistors and one of the first common mode inductors are connected in series and electrically connected between the first node and the first image capture module corresponding to the differential clock pair interfaces, and two of the second resistors and one of the second common mode inductors are connected in series and electrically connected between the first node and a second image capture module corresponding to the differential clock pair interfaces. The other two first resistors and the other of the first common mode inductors are connected in series and electrically connected between the first node and the first image capture module corresponding to the differential data pair interfaces, and the other two second resistors and the other of the second common mode inductors are connected in series and electrically connected between the first node and a second image capture module corresponding to the interfaces of the differential data pair.

Due to the high degree of integration of common-mode inductors, the complexity of the wiring can be simplified and its efficiency can be increased, while eliminating image signal noise.

In an embodiment of the present application, the first node is separated from the first image capture module by a first distance; the first node is separated from the second image capture module by a second distance; and the first distance is the same as the second distance, the first resistors and the second resistors have the same resistance value, and the first inductors and the second inductors have the same inductance value. The distance from the first node to the first image capture module and the distance from the first node to the second image capture module are the same, and the first image capture module and the second image capture module have the same size and component parameter, so that the effects of the wire stubs between the first node and the module of the first image capture and between the first node and the second image capture module are the same to further ensure that the image signals transmitted from the first node to the control module have relatively good consistency under the condition of relatively low interference.

Specifically, when the first distance and the second distance are 10 mm, the resistance values of the first resistors and the second resistors are the same at 10 Ω, and the inductance values of the first inductors and the second inductors are 27 nH.

In an embodiment of the present application, the first node is separated from the first image capture module by a first distance, the second node is separated from the second image capture module by a second distance, and the first distance is different from the second distance. The resistance values of the first resistors and the second resistors are the same, and the inductance values of the first inductors and the second inductors are different. When the distance from the first node to the first image capturing module and the distance from the first node to the second image capturing module are different, the parameters of the resistors and inductors in the first optimization unit and the second optimization unit are also made so that they are respectively different, in order to eliminate interference and noise of different degree caused by different parameters of the wire stubs, and to ensure that the image signals have relatively low interference and relatively good consistency.

Specifically, the first distance is 10 mm, the second distance is 35 mm, the resistance values of the first resistors and the second resistors are the same at 10 Ω, the inductance value of the first inductor is 27 nH, and the inductance value of the second inductor is 15 nH.

In an embodiment of the present application, the image capture switching control module further comprises a third image capture module, a second node, and a third optimization unit. The third image capturing module is electrically connected to the control module by using a control bus, and is configured to capture the third image to obtain a third image signal, and the control module controls the first image capture module, the second image capture module, and the third image capture module to be in working condition with time division. The second optimizer is electrically connected between the first node and the second node, the second image capture module is electrically connected to the second node by using the third optimizer, and the third image capture module is electrically connected to the second node by using the third optimizer. The second optimization block and the third optimization block are configured to eliminate the callback and noise of the second image signal to ensure smoothness of the second image signal curve. The second optimization block and the third optimization block are configured to eliminate the callback and noise of the third picture signal to ensure smoothness of the third picture signal curve. When the number of image capturing units increases, the numbers of respective nodes and optimization units also increase accordingly, which effectively ensures that images captured by using different image capturing units and the corresponding image signals can share the same signal interface and can accurately and transmitted to the control module with high quality.

In an embodiment of the present application, the third optimization unit comprises a first optimization sub-unit and a second optimization sub-unit, a second image capturing module is electrically connected to the second node by using the first optimization sub-unit, and a third image capturing module is electrically connected to the second node by using the second optimization sub-unit. The second optimization block and the first optimization subblock are configured to eliminate the callback and signal noise about the second image. The second optimization block and the second optimization subblock are configured to eliminate the callback and signal noise about the third image.

For the second image capture module and the third image capture module, respectively, the first optimization sub-unit and the second optimization sub-unit are respectively configured to perform optimization operations such as callback elimination and noise filtering on image signals received by the second image capture module and the third image capture module to further accurately ensure that the image signals supplied to the control module are consistent, accurate, and of relatively good quality.

In an embodiment of the present application, the second resistors contained in the second optimization block are electrically connected between the first node and the second node. The first optimization subunit contains third resistors and second inductors, and the third resistors and second inductors are connected in series between the second node and the second image capture module. The second optimization subunit contains fourth resistors and third inductors, and the fourth resistors and third inductors are connected in series between the second node and the third image capture module. The resistor and inductor parameters in the first optimization subblock and the second optimization subblock, respectively, are used to perform callback elimination and noise filtering and coordination to ensure that the image signals are consistent and accurate.

In an embodiment of the present application, the clock signal interface is further configured to receive a clock control signal in the third picture signal, and the data signal interface is further configured to receive image data in the third picture signal. The second optimization block comprises four second resistors, and four second resistors are connected in series and electrically between the first node and the second node, corresponding to a clock differential pair interface pair and a data differential pair interface pair. The first optimization subunit comprises four third resistors and four second inductors, and four third resistors and four second inductors are connected in series and electrically, respectively, between the second node and the second image capture module, corresponding in exact correspondence to a clock differential pair interface pair and a data differential pair interface pair. . The second optimization subunit comprises four fourth resistors and four third inductors, and four fourth resistors and four third inductors are connected in series and electrically, respectively, between the second node and the third image capture module, corresponding in exact correspondence to a clock differential pair interface pair and a data differential pair interface pair. .

For the second image capturing unit and the third image capturing unit, each interface in the shared differential pair in the first signal interface is provided with a resistor and an inductor to optimize the image signal, thereby ensuring that image signals transmitted and received by each interface are as large as possible interference is eliminated and integrity, accuracy and relatively good quality are maintained.

In an embodiment of the present application, the first node is separated from the first image capture module by a first distance, the second node is separated from the second image capture module by a second distance, and the second node is separated from the third image capture module by a third distance. The first distance is different from the second distance and the third distance. The resistance values of the first resistors and the second resistors are the same, and the resistance values of the second resistors and the third resistors are different. The resistance values of the third resistors and the fourth resistors are the same, and the inductance values of the first inductors are different from the inductance values of the second inductors and the third inductors. The second distance and the third distance are the same, and the inductance values of the second inductors and the third inductors are the same.

The distance from the second node to the second image capture module and the distance from the second node to the third image capture module are the same, and the second image capture module and the third image capture module have the same size and component parameter, so that the effects of the wire stubs between the second node and the module the second image capture module and between the second node and the third image capture module are the same to further ensure that the image signals transmitted from the first node and the second node to the control module have relatively good agreement under the condition of relatively low interference.

In particular, the first distance is 10 mm, and the sum of the second distance and the third distance is 35 mm. The resistance values of the first resistors and the second resistors are the same and are 22 Ω, the resistance values of the third resistors and the fourth resistors are 10 Ω, the inductance value of the first inductor is 18 nH, and the inductance value of the second inductor is 9 nH.

In an embodiment of the present application, the image capturing display terminal further comprises a display module, and wherein the control module further comprises a second signal interface, a second control bus, and a third node. The third node is electrically connected to the second signal interface. The third node is electrically connected to the second signal interface. The display module includes a first display unit and a second display unit, wherein the first display unit and the second display unit are configured to display an image, and the first display unit and the second display unit are electrically connected to the second signal interface by using the second node. The control module is electrically connected to the first display unit and the second display unit using a second control bus, and the control module transmits an image signal to the first display unit and the second display unit using a second time division signal interface.

Therefore, when displaying an image, the control unit in the image capturing display terminal can share the signal interface used for outputting the image signal, which effectively improves the utilization rate of the signal interface on the control unit.

In an embodiment of the present application, the control module is a system-on-a-chip, wherein the first signal interface is a camera serial interface in a mobile communication processor interface, and the second signal interface is a display serial interface in a mobile communication processor interface.

In an embodiment of the present application, the image capturing display terminal further comprises a fourth optimization unit and a fifth optimization unit. The fourth optimization unit is electrically connected to the second signal interface and the first display unit by using a third node. The fifth optimization unit is electrically connected to the second signal interface and the second display unit by using a third node. The fourth optimization unit is electrically connected between the third node and the first display unit and is configured to eliminate the callback and noise of the received image signal. The fifth optimization unit is electrically connected between the third node and the second display unit and is configured to eliminate the callback and noise of the received image signal.

In an embodiment of the present application, the image capturing display terminal further comprises a touch module, and wherein the touch module is electrically connected to the control module and configured to receive a touch operation and recognize position information related to the touch operation. The position information represents an image capture module or a display unit that must be operational. The control unit outputs, according to the position information, a control signal to the first image capturing unit and the second image capturing unit, or a control signal to the first display unit and the second display unit, to control the operating states of the first image capturing unit and the second image capturing units or the operating states of the first display unit and a second display unit.

In an embodiment of the present application, the image capturing display terminal further comprises an audio signal receiving module, and wherein the audio signal receiving module is electrically connected to the control module and configured to receive an audio signal touch and recognize operation. The audio information represents an image capture module or display unit that must be operational. The control unit outputs, according to the audio information, a control signal to the first image capturing unit and the second image capturing unit or a control signal to the first display unit and the second display unit to control the operating states of the first image capturing unit and the second image capturing units or the operating states of the first display unit and the second display block.

The user can select the image pickup module and the display unit according to the user's actual requirements by using the touch module or the audio receiving unit, which effectively improves the user's flexibility in managing multiple image capture modules and multiple display units.

In an embodiment of the present application, an image capturing display terminal is provided, comprising a control module, a first optimizer, a second optimizer, a first image capture module, a second image capture module, and a first node. The control module comprises a first control bus and a first signal interface, wherein the control module is electrically connected to the first image capture module and the second image capture module by using the first control bus, and the control module outputs a control signal to control the first image capture module and the second image capture module so that they are in working order with time separation.

The first signal interface comprises a clock signal interface and a data signal interface, wherein the clock signal interface is configured to receive a clock control signal in the first image signal or the second image signal, and the data signal interface is configured to receive image data in the first image signal or signal about the second image. The clock signal interface comprises a differential clock pair interface pair, and the differential clock pair interface pair is electrically connected to the first node. The data signal interface comprises a pair of differential data pair interfaces, and the pair of differential data pair interfaces is electrically connected to the first node.

A pair of differential clock pair interfaces and data signal interfaces in the first signal interface are respectively electrically connected to four child nodes in the first node.

The first optimization unit is electrically connected to the first node and the first image capturing module, and the first optimization unit contains four first resistors and four first inductors. The second optimization unit is electrically connected to the first node and the second image capture module, and the second optimization unit includes four second resistors and four second inductors. The first four resistors are respectively electrically connected between the four child nodes and the first image capture module corresponding to the differential clock pair interfaces and the differential data pair interfaces. The four second resistors are respectively electrically connected between the four child nodes and the first image capture module corresponding to the differential clock pair interfaces and the differential data pair interfaces.

The first image capture module is configured to capture the first image signal, and the second image capture module is configured to capture the second image signal. The captured first image signal is transmitted to the first signal interface by using the first optimizer, when the first image capturing module is in operation, the first resistor is configured to eliminate the first image signal callback to ensure the smoothing of the first image signal curve, and the first inductor configured to filter the signal noise about the first image. The captured second image signal is transmitted to the first signal interface by using the second optimizer, when the second image capturing module is in operation, the second resistor is configured to eliminate the second image signal callback to ensure the smoothing of the first image signal curve, and the second inductor configured to filter the signal noise about the second image.

The control unit can directly control the operating state of the first image capturing unit or the second image capturing unit by using a control bus. In addition, a signal interface capable of transmitting image signals provided by different image capturing modules is effectively saved by sharing the first node and the first signal interface, and it is completely unnecessary to set the analog transmission switch separately for the working state of the first capture module. image or second image capture module, which effectively reduces the number of components and wires on the circuit board, simplifies the structure of the circuit board, and provides more layout space for installing other functional components.

BRIEF DESCRIPTION OF GRAPHICS

In FIG. 1a and fig. 1b are schematic diagrams of planar structures of two opposite sides of an image capturing display terminal according to an embodiment of the present application;

in fig. 2 is a schematic representation of an operating state control image of several image capturing display terminals shown in FIG. 1a and fig. 1b;

in fig. 3 is a schematic view of functional modules for an image capture switching control unit according to the first embodiment of the present application;

in fig. 4 is a schematic diagram of a specific circuit structure of the image capture switching control unit shown in FIG. 3;

in fig. 5 is a schematic representation of the connection structure in the first optimization block and the second optimization block shown in FIG. four;

in fig. 6 is a schematic representation of the planar arrangement structure of the first optimization unit and the second optimization unit shown in FIG. four;

in fig. 7 is a schematic representation of the planar arrangement structure of the first optimization unit and the second optimization unit shown in FIG. 4 according to the second embodiment of the present application;

in fig. 8 is a schematic view of functional modules for an image capture switching control unit according to the third embodiment of the present application;

in fig. 9 is a schematic representation of the planar arrangement structure of the first optimization unit and the second optimization unit shown in FIG. eight;

in fig. 10 is a schematic view of functional modules for an image capture switching control unit according to a fourth embodiment of the present application;

in fig. 11 is a schematic representation of the planar arrangement structure of the first optimization unit and the second optimization unit shown in FIG. ten;

in fig. 12 is a schematic diagram of a specific circuit structure of the image capture switching control unit shown in FIG. 3 according to the fifth embodiment of the present application;

in fig. 13 is a schematic diagram of a functional structure of an image capturing display terminal according to a sixth embodiment of the present application; and

in fig. 14a and FIG. 14b are schematic diagrams of planar structures of two opposite sides of the image capturing display terminal shown in FIG. 13.

DESCRIPTION OF EMBODIMENTS

Specific embodiments are used to describe the present application below.

In FIG. 1a and fig. 1b shows schematic diagrams of planar structures of two opposite sides of an image pickup display terminal 1 according to an embodiment of the present application. As shown in FIG. 1a and fig. 1b, the image capturing display terminal 1 is configured to perform image capturing and image display. The image capturing display terminal 1 includes a touch display screen TP and a first image capturing unit 13 on one side, and a body CA, a second image capturing unit 14 and a third image capturing unit 15 on the opposite side.

In this embodiment, when the user uses the image capturing display terminal 1, one side provided with the touch display TP and the first image capturing unit 13 faces the user and may be referred to as the front side of the image capturing display terminal 1. One side provided with the body CA, the second image capturing unit 14 and the third image capturing unit 15 faces the back of the user, and may be referred to as the rear side of the image pickup display terminal 1. In addition, on the side provided with the touch display screen TP, the image capturing display terminal 1 further includes an audio signal receiving unit VP and other functional units (not shown), and the other functional units may include an infrared sensor, an audio player, and the like.

The touch display screen 1a is configured to perform touch detection and image display. The touch display screen 1a comprises a display module (not indicated) and a touch module (not indicated). The display module is configured to perform image display, and the touch module is configured to receive a touch operation and recognize the position of the touch operation. In this embodiment, the display module may be a liquid crystal display (LCD) module or an organic light emitting diode (OLED) display module, and the touch module may be a capacitive touch module, an optical touch module, or the like.

The first image capturing unit 13, the second image capturing unit 14, and the third image capturing unit 15 are configured to perform image capturing, store the captured image data, and output the image data as an image signal. The first image capturing unit 13, the second image capturing unit 14, and the third image capturing unit 15 separately capture images of the image capturing display terminal 1 in different directions. Meanwhile, the second image capturing unit 14 and the third image capturing unit 15 located on the same side of the image capturing display terminal 1 may further have different image capturing functions, for example, the second image capturing unit 14 is capable of capturing color images, and the third image capturing unit 15 is configured to capture single color images.

In this embodiment, all of the first image capturing unit 13, the second image capturing unit 14, and the third image capturing unit 15 are electrically connected to the signal interface of the control unit 10 by using the first node N1, that is, the first image capturing unit 13, the second image capturing unit 14 and the third image capturing unit 15 share a signal interface corresponding to the first node N1. The control unit 10 outputs a control signal to the first image capturing unit 13, the second image capturing unit 14, and the third image capturing unit 15 to control the first image capturing unit 13, the second image capturing unit 14, and the third image capturing unit 15 to be in operation. time division, that is, only one of the three modules transmits image data to the control module 10 by using the first node N1 at one time.

Alternatively, in other embodiments (not shown) of the present application, the first image capture module 13 and the second image capture module 14 are electrically connected to the same signal interface of the control module 10 by using the first node N1, but the third image capture module 15 is directly electrically connected to another signal interface of the control unit 10, and it does not need to share the same signal interface with the first image capturing unit 13 and the second image capturing unit 14 by using the first node N1.

Specifically, the first image capturing unit 13 and the second image capturing unit 14 share one signal interface corresponding to the first node N1. The control unit 10 outputs a control signal to the first image capturing unit 13 and the second image capturing unit 14 to control the first image capturing unit 13 and the second image capturing unit 14 to be in a time division operating state, that is, only one of the two units transmits image data to the control unit 10 by using the first node N1 at one time.

The third image capturing unit 15 is directly electrically connected to another signal interface of the control unit 10 independently from the first node N1. In view of this, the third image capturing unit 15 is not required to share the same signal interface with the first image capturing unit 13 and the second image capturing unit 14 to transmit an image signal to the control unit 10 . In this case, the operation state of the third image capturing unit 15 under the control of the control signal output from the control unit 10 is not limited to the number of signal interfaces. The third image capture module may be in operation with one of the first image capture module 13 and the second image capture module 14 under the control of the control module 10 at the same time, or may be in operation without the first image capture module 13, and without the second image capturing unit 14 under the control of the control unit 10 at the same time.

The control signal outputted by the control module 10 is a digital logic signal output from the signal output interface of the control module 10 . Alternatively, the control signal may be an analog voltage signal output by the control module 10 using a signal interface.

In FIG. 2 is a schematic representation of an operating state control image of several image capturing display terminals shown in FIG. 1a and fig. 1b. As shown in FIG. 2, the manner of managing the operating states of the first image capturing unit 13, the second image capturing unit 14, and the third image capturing unit 15 is mainly executed by the user according to the image capturing mode selected by the user according to the requirements accepted by the image capturing display terminal 1.

Specifically, the information request window is displayed on the touch display screen 1a, and the information request window contains options for several image capturing modes for selection by the user by using the touch operation: auto shooting mode, normal shooting mode, single color shooting mode, and panoramic shooting mode. For example, the user can select one shooting mode in the above four modes according to the actual image shooting requirements.

When the user selects the auto shooting mode, the control unit 10 outputs a control signal according to the mode to control the first image capturing unit 13 to be in the operating state, while to control the second image capturing unit 14 and the third image capturing unit 15 to be in non-working condition. During this period, only the first image capturing unit 13 is in operation. When the user selects the normal shooting mode, the control unit 10 outputs a control signal according to the mode to control the second image capturing unit 14 to be in operation, while to control the first image capturing unit 13 to be in operation and the unit 15 capture the third image so that it is in a non-working state. During this period, only the second image capturing unit 14 is in operation. When the user selects the single-color shooting mode, the control unit 10 outputs a control signal according to the mode to control the third image capture unit 15 to be in operation, and to control the first image capture unit 13 and the second image capture unit 14 to be inoperative. condition. During this period, only the third image capturing unit 15 is in operation. When the user selects the panoramic shooting mode, the control unit 10 outputs a control signal according to the mode to control the second image capturing unit 14 and the third image capturing unit 15 to both be in operation, and to control the first image capturing unit 13 to be in idle, to generate a panoramic image by using the images captured by the second image capturing unit 14 and the third image capturing unit 15 at the same time.

It should be noted that regardless of being in the auto shooting mode, normal shooting mode, single color shooting mode or panorama shooting mode, only one image capture module is operational at a time to capture an image only when multiple capture modules share the same signal interface. . When the image capturing unit is independently connected to the signal interface of the control unit 10 and does not share the same signal interface with other image capturing units for transmitting an image signal, the image capturing unit is not required to be limited to being in the time division operation state, and it can be in working condition or inoperative state according to the shooting mode selected by the user. In addition, an example is used for description in which the four modes displayed in the image capturing display terminal 1 are just some of the image capturing modes. The image capturing display terminal 1 may further include, and is not limited to, a night mode, a professional mode, a time-lapse mode, a watermark mode, a close-up mode, and the like.

The control unit 10 further obtains the image unit selected by the user for capturing an image according to the position information of the touch operation received on the touch display screen 1a, and outputs an appropriate control signal to control the image capturing unit selected by the user for capturing an image. The other image capturing modules are idle, and the image capturing module performing the image capturing transmits the acquired image data to the control module 10 by using a shared signal interface. The touch operation position information represents the image capturing unit selected for image capturing, for example, the first image capturing unit 13, the second image capturing unit 14 or the third image capturing unit 15 is selected for image capturing.

Of course, the operating state of multiple image capturing units may alternatively be controlled according to input instructions provided by an external user, by using sound operation or otherwise, or received instructions provided by other functional units within the terminal. The control signal may be a digital signal or an analog signal.

In this embodiment, the control module 10 is a system on a chip (Soc), wherein the signal interface is shared in the control module 10 and is configured to receive image data in a camera serial interface (CSI) in a mobile communications industry processor interface (MIPI).

In this embodiment, the first image capturing unit 13, the second image capturing unit 14, and the third image capturing unit 15 are cameras with the same resolution or different resolutions individually. For example, the first image capturing unit 13 is a 2 megapixel (2M resolution) camera, the second image capturing unit 14 is an 8 megapixel (8M resolution) camera, and the second image capturing unit 15 is an 8 megapixel ( resolution 8M). In other embodiments of the present application, resolutions and other image capture parameters of the first image capture module 13, the second image capture module 14, and the third image capture module 15 may alternatively be set according to actual requirements. For example, the first image capturing unit 13, the second image capturing unit 14, and the third image capturing unit 15 may alternatively select and are not limited to resolutions of 16 megapixels, 40 megapixels, and 32 megapixels. In addition to this, the number of image pickup units contained in the image pickup display terminal 1 can also be adjusted according to actual requirements. For example, only two image capturing units such as the first image capturing unit 13 and the second image capturing unit 14 are located, or other image capturing units with different resolutions, focal lengths, and other image capturing parameters can be added.

In FIG. 3 is a schematic view of the functional modules for the image pickup switching control unit 100 located in the image pickup display terminal 1 shown in FIG. 1a and fig. 1b and configured to perform the image pickup switching according to the first embodiment of the present application. The image pickup switching control unit 100 is disposed inside the image pickup display terminal 1 .

In this embodiment, only the first image capturing unit 13 and the second image capturing unit 14 are electrically connected to the signal interface of the control unit 10 by using the first node N1, that is, the first image capturing unit 13 and the second image capturing unit 14 share one signal interface corresponding to to the first node N1, but the third image capture module 15 is directly electrically connected to the control module 10, and it is not required that it be electrically connected to the control module 10 by using the first node N1 or share the same signal interface with the first image capture module 13 and the module 14 of capturing a second image for signaling the image to the control unit 10 .

As shown in FIG. 3, the image capture switching control unit 100 includes a control unit 10, a first optimization unit 11, a second optimization unit 12, a first image capture unit 13, and a second image capture unit 14. The control unit 10 performs the image pickup switching control for the first image capturing unit 13 and the second image capturing unit 14 . The control unit 10 is electrically connected to the first image capturing unit 13 and the second image capturing unit 14 by using the first control bus CB1 to output a control signal to control the first image capturing unit 13 and the second image capturing unit 14 to be in a separation working state. by time. In addition, the first image capturing unit 13 is further electrically connected to the first signal interface 101 of the control unit 10 by using the first optimization unit 11, and the second image capturing unit 14 is further electrically connected to the first signal interface 101 of the control unit 10 by using the second unit 12 optimization. The first image capturing unit 13 and the second image capturing unit 14 are in time division operation, so that the first signal interface 101 can be shared.

In this embodiment, the first control bus CB1 is a bus electrically connected between the interface of the control module 10 capable of outputting a control signal, and the first image capture module 13 and the second image capture module 14. The first signal interface 101 is a MIPI CSI in the control unit 10 capable of receiving image data.

Specifically, the first image capturing unit 13 is configured to capture the first image and output a first image signal corresponding to the first image, that is, when the first image capturing unit 13 is in operation, the first image is captured and converted into the first image signal. The first picture signal contains picture data corresponding to the first picture and a clock signal, a timing signal and the like to help transmit and display the picture data. The second image capturing unit 14 is configured to capture a second image and output a second image signal corresponding to the second image, that is, when the second image capturing unit 14 is in operation, the second image is captured and converted into a second image signal. The second picture signal contains picture data corresponding to the first picture and a clock signal, a timing signal and the like to help transmit and display the picture data.

In this embodiment, the first image capturing unit 13 and the second image capturing unit 14 are cameras having different resolutions. The first image capturing unit 13 is a 2 megapixel (2M resolution) camera, and the second image capturing unit 14 is an 8 megapixel (8M resolution) camera. In other embodiments of the present application, the first image capture module 13 and the second image capture module 14 may alternatively be cameras having the same resolution.

The control unit 10 is electrically connected to the first image capturing unit 13 and the second image capturing unit 14 by using the first control line CB1 separately, and the control unit 10 controls by using the control signal output from the first control line CB1, the first image capturing unit 13 and the capturing unit 14 second image so that they work with time division.

In this embodiment, the control module 10 further comprises another interface directly electrically connected to the first control bus CB1. The first control bus CB1 is a line configured to transmit an electrical signal. The electrical signal contains a control signal used to control the operating states of the first image capturing unit 13 and the second image capturing unit 14, and other signals. An electrical connection is a connection made by using conductive lines and can carry out the transmission of electrical signals. Conductive lines include PCB wires, flexible flat cables, conductive connectors, or other conductive physical cables.

The operating states of the first image capturing unit 13 and the second image capturing unit 14 can be controlled as follows. The control unit 10 receives input instructions provided by a user outside the image capturing display terminal 1 by performing a touch operation on the touch display screen 1, or receiving an audio operation by using an audio receiving unit VP, or otherwise, or receives instructions provided by another function unit inside terminal and outputs a corresponding control signal to the first image capturing unit 13 and the second image capturing unit 14 by using the first control line CB1. The control signal may control the operating states of the first image capture module 13 and the second image capture module 14 . The control signal may be a digital signal or an analog signal. Other functional modules may be a power supply module, an image processing module, and the like, and, of course, may be other functional modules. They are not limited to this.

The first optimization unit 11 is electrically connected between the first signal interface 101 and the first image capturing unit 13 by using the first node N1. The second optimization unit 12 is electrically connected between the first signal interface 101 and the second image capturing unit 14 by using the first node N1. That is, the first node N1 is used as a bifurcation point, and the first optimization unit 11 and the second optimization unit 12 are connected to the first signal interface 101 of the control unit 10 by using the first node N1.

The first image signal is optimized by the first optimizer 11 and then transmitted to the first signal interface 101 by using the first node N1, and at another time the second image signal is optimized by the second optimizer 12 and then transmitted to the first signal interface 101 by using the first node N1 . The control unit 10 supplies the optimized first image signal or the optimized second image signal to other units separately, for example, to a display unit (not shown) for display.

The optimization of the first optimizer 11 with respect to the first image signal and the optimization of the second optimizer 12 with respect to the second image signal specifically include the following.

When the first image capturing unit 13 is in operation, the first image capturing unit 13 is in the high speed (HS) mode with low resistance, and the first image signal corresponding to the captured first image is transmitted to the first signal interface 101 by using the first block 11 optimization. The first optimization unit 11 is configured to optimize the first image signal to ensure that the first image signal curve is smooth.

In addition, when the first image capturing unit 13 is in the operating state, that is, when the first image capturing unit 13 is in the high speed low resistance mode, the second image capturing unit 14 is in the idle state and is in the low power mode ( LP) with high resistance to stop capturing the second image.

In this embodiment, it should be noted that: when the first image capturing unit 13 and the second image capturing unit 14 are in the low-resistance HS mode, that is, in operation, each functional block within the first image capturing unit 13 and the second image capturing unit 14 is in a low resistance state to capture an image and then convert the image data into an image signal for output. When the first image capturing unit 13 and the second image capturing unit 14 are in the high-resistance LP mode, that is, in the idle state, each functional block within the first image capturing unit 13 and the second image capturing unit 14 is in a high-resistance state to stop image capturing .

In particular, the second image capture module 14 is in a mode other than high resistance LP so that the conductive line and conductive components between the second image capture module 14 and the first node N1 have a certain impedance, which is equivalent to the wire loops for the first image capture module 13 . The existence of wire stubs can easily lead to the generation of callbacks on the rising edge and falling edge of the first picture waveform. As a result, the waveform of the signal about the first picture is not smooth. Since the first image signal having a callback and a non-smooth curve can very easily cause the control unit 10 to misfire and generate a transmission error code, the first image capturing unit 13 is frozen, which further causes the image data corresponding to the first image, have errors and low quality.

Similarly, the first image capture module 13 is in a mode other than high resistance LP so that the conductive line and conductive components between the first image capture module 13 and the first node N1 have a certain impedance, which is equivalent to wire loops for the second image capture module 14 . The existence of wire stubs can easily cause callbacks to be generated on the rising edge and trailing edge of the second picture signal curve, and the callbacks cause the second picture signal curve to be non-smooth. Since the second image signal having a callback and a non-smooth curve can very easily cause the control unit 10 to misfire and generate a transmission error code, the second image capturing unit 14 is frozen, which further causes the image data corresponding to the second image, have errors and poor quality. The generation of callbacks on the rising edge and falling edge in the image signal is as follows: the image signal curve is channel-shaped due to the instantaneous roll-off at the edges, when the curve rises or falls smoothly and continuously during the rising-edge and falling-edge stages. Therefore, the existence of a callback causes the image signal curve to be non-smooth.

In view of this, the first optimization unit 11 is electrically connected between the first node N1 and the first image capturing unit 13, and smoothing the curve of the first image signal is ensured by eliminating the callback at the leading edge or trailing edge in the second image signal, that is, by precisely eliminating the reverse the call caused by the wire loops of the first node N1 and the module 14 capture the second image. For the first optimization block 11, the method of eliminating the callback at the leading edge or trailing edge in the first picture signal may be as follows: pulling the instantaneous decays occurring at the leading edge and trailing edge of the curve of the picture signal into a normal rise or fall position, i.e. filling the leading edge and trailing edge channels of the first picture signal curve to ensure smoothness of the first picture signal curve.

When the second image capturing unit 14 is in operation, that is, when the second image capturing unit 14 is in the low resistance HS mode, a second image signal corresponding to the captured second image is transmitted to the first signal interface 101 by using the second optimization unit 12. The second optimization unit 12 is configured to optimize the second image signal to ensure that the second image signal curve is smooth. For the second optimizer 12, a method to eliminate the callback at the rising edge or falling edge in the second picture signal may be as follows: pulling the instantaneous decays occurring at the rising edge and falling edge of the curve of the picture signal into a normal rise or fall position, i.e. filling the leading edge and trailing edge channels of the second picture signal curve to ensure smoothness of the second picture signal curve. Of course, there may alternatively be other ways to eliminate the image signal callback, and they are not limited to this.

In addition, when the second image capturing unit 14 is in the operating state, that is, when the first image capturing unit 13 is in the high speed low resistance mode, the first image capturing unit 13 is in the idle state and in the high resistance LP mode. to stop capturing the second image.

For the second optimization unit 12, the method for smoothing the curve of the second picture signal specifically includes: eliminating the callback at the rising edge or the falling edge in the second picture signal, that is, accurately eliminating the callback caused by the wire stubs of the first node N1 and module 13 capture the first image, to ensure the smoothness of the waveform of the signal about the second image.

In order to further reduce the impact of wire loops, when the first image pickup unit 13 is in a high-resistance low power mode, that is, when the first image capture unit 13 is in the idle state, the impedance of the first image pickup unit 13 is greater than 100 Ω. Accordingly, when the second image capturing unit 14 is in the high-resistance low power mode, that is, when the second image capturing unit 14 is in the idle state, the impedance of the second image capturing unit 14 is larger than 100 Ω. Therefore, when the first image capturing unit 13 is in the non-working state, the impedance of the first image capturing unit can effectively prevent the transmission of an interference signal to the second image capturing unit 14 in the running state. Similarly, when the second image capturing unit 14 is in the non-working state, the impedance of the second image capturing unit can effectively prevent the interference signal from being transmitted to the first image capturing unit 13 in the running state.

In this embodiment, all connecting lines between the first control bus CB1, the first optimization unit 11, the second optimization unit 12 and the functional blocks are placed on a printed circuit board (PCB).

The control unit 10 can directly control the operating states of the first image capturing unit 13 and the second image capturing unit 14 by using the first control line CB1 shown in FIG. 3. In addition, a signal interface capable of receiving image signals supplied by different image pickup modules is effectively saved by sharing the first signal interface 101, and it is completely unnecessary to set the analog transmission switch circuit separately to control the operating states. the first image capturing unit 13 and the second image capturing unit 14 to effectively reduce the number of components and wires placed on the circuit board, simplify the structure of the circuit board, and further provide more layout space for installing other functional components.

In FIG. 4 is a schematic diagram of a specific circuit structure of the image capture switching control unit shown in FIG. 3. As shown in FIG. 4, the first signal interface 101 in the control unit 10 includes a clock signal interface CLK and a data signal interface DATA.

The clock signal interface CLK is configured to receive a clock control signal in the first image signal or the second image signal, and the data signal interface DATA is configured to receive image data in the first image signal or the second image signal. The control unit 10 performs data processing according to the coordination between the clock control signal and the image data. Data processing refers to operations such as shift detection, compression, and transmission performed by the control unit 10 on image data according to clock signals and other control signals.

In this embodiment, the clock interface CLK includes a differential clock pair interface, and the clock interface CLK specifically includes two additional clock ends such as a first additional clock end CLK-DP and a second additional clock end CKL-DN.

The data signal DATA interface includes at least a pair of differential data pair interfaces, and the data signal DATA interface specifically includes two additional data ends such as a first additional data end DA0-DP and a second additional data end DA0-DN.

The number of differential data pair interfaces in the DATA data signal interface corresponds to the resolutions of the image capture modules. Specifically, for example, when the first image capturing unit 13 is a 2-megapixel camera, the number of differential data pair interfaces in the data signal DATA interface is one, that is, the additional data first end DA0-DP and the additional data second end DA0-DN are required. for data transfer. When the second image capturing unit 14 is an 8-megapixel camera, the number of differential data pair interfaces in the data signal DATA interface is four, that is, the additional data first end DA0-DP and the additional data second end DA0-DN, the third end DA1-DP additional data and the fourth additional data end DA1-DN, the fifth additional data end DA2-DP and the sixth additional data end DA2-DN, and the seventh additional data end DA3-DP and the eighth additional data end DA3-DN are required for transmitting image data.

In this embodiment, the first image capturing unit 13 and the second image capturing unit 14 are in time division operation and share the first signal interface 101, that is, the first image capturing unit 13 and the second image capturing unit 14 share one pair of differential signal interfaces. clock signal pairs in the clock signal interface CLK and one differential data pair interface pair in the data signal interface DATA by using the first node N1. In particular, the following is provided.

The first node N1 contains four child nodes N1-1-N1-4, which are independent and isolated from each other. The four child nodes N1-1-N1-4 are respectively electrically connected to the first additional clock end CLK-DP, the second additional clock end CKL-DN, the first additional data end DA0-DP, and the second additional data end DA0-DN, respectively.

The first optimization block 11 contains four first resistors R1 and four first inductors L1. One of the first resistors R1 and one of the first inductors L1 are connected in series with four child nodes N1-1-N1-4 in exact correspondence. The second optimization unit 12 comprises four second resistors R2 and four second inductors L3. One of the second resistors R2 and one of the second inductors L2 are connected in series with four child nodes N1-1-N1-4 in exact correspondence.

Therefore, according to the differential clock pair interface CLK and the differential data pair interface DATA, the first four resistors R1 and the first four inductors L1 are respectively electrically connected between the four child nodes N1-1 to N1-4 in the first node N1 and the first image capturing unit 13 in exact match, and four second resistors R2 and four second inductors L2, respectively, are electrically connected between four child nodes N1-1-N1-4 in the first node N1 and the second image capturing unit 14 in exact match.

The first resistors R1 and the second resistors R2, respectively, are configured to eliminate the callbacks of the first picture signal and the second picture signal at the rising edge or trailing edge to ensure smoothing of the first picture signal and the second picture signal curves. The first inductor L1 and the second inductor L2 are configured to further perform noise filtering on the first picture signal and the second picture signal. Therefore, by coordinating between the first resistor R1 and the first inductor L1 and coordinating between the second resistor R2 and the second inductor L2, the quality of the first image signal and the second image signal can be effectively improved to allow the first image capturing unit 13 to supply an image signal and perform high-speed , accurate and complete transmission when working.

In this embodiment, the distance from the first node N1 to the control module 10 is greater than the distance from the first node N1 to the first image capture module 13, or the distance from the first node N1 to the control module 10 is greater than the distance from the first node N1 to the capture module 14 second image. Of course, the distance from the first node N1 to the control module 10 may alternatively be greater than the distance from the first node N1 to the image capture modules 13 and 14. The distances from the first node N1 to the control unit 10, the first image capturing unit 13, and the second image capturing unit 14 are the lengths of the conductive lines for signal transmission.

Therefore, compared with the control unit 10, the first node N1 is located closer to the first image capturing unit 13 and the second image capturing unit 14. That is, the first node N1 is located at a position on the PCB as close as possible to the first image pickup unit 13 and the second image pickup unit 14 in order to reduce the wiring distance between the first node N1 and the image pickup unit to further reduce noise interference as much as possible. The first inductor L1 is located at a position close to the board-to-board (BTB) connection end of the first image capture module 13, and the second inductor L2 is located at a position close to the BTB connection end of the second image capture module 14. In this embodiment, the first four resistors R1 have the same resistance value, the four second resistors R2 have the same resistance value, and the first four resistors R1 and the four second resistors R2 have the same set size. When placed on the PCB, four first resistors R1 and four second resistors R2 are located close to each other and close to the first node N1, four first inductors L1 are located near the first image capture module 13, and four second inductors L2 are located near the second image capture module 14 Images.

In other embodiments of the present application, the distance from the first node N1 to the control module may alternatively be less than the distance from the first node N1 to the first image capture module 13 and the second image capture module 14. Accordingly, signal interference caused by a relatively long wiring distance can be reduced by adjusting the resistance values of the first resistors R1 and the second resistors R2.

In particular, in FIG. 5 is a schematic representation of the connection structure in the first optimization block 11 and the second optimization block 12 shown in FIG. four.

As shown in FIG. 5, any of the first resistors R1 has a first connection end R1-a and a second connection end R1-b. Of course, respectively, any of the second resistors R2 contains a first connection end (not indicated) and a second connection end (not indicated).

In a specific connection process of the first optimization unit 11 and the second optimization unit 12, the second connection end R1-b of the first resistor R1 is connected to the first node N1, and the second connection end of the second resistor R2 is also connected to the first node N1. The first connecting end R1-a of the first resistor R1 is electrically connected to one end of the first inductor L1, and the other end of the first inductor L1 is electrically connected to the first image capturing unit 13. The second connecting end of the second resistor R2 is electrically connected to one end of the second inductor L2, and the other end of the second inductor L2 is electrically connected to the second image capture unit 14.

In this embodiment, when placed on the PCB, the first resistors R1, the second resistors R2, the first inductors L1 and the second inductors L2 are disposed on the surface of the PCB by using surface mount technology (SMT) or other packaging techniques.

In this embodiment, all of the first four resistors R1 and four second resistors R2 are located in the vicinity of the first image capturing unit 13 and the second image capturing unit 14, and the first image capturing unit 13 and the second image capturing unit 14 are arranged in a row in a straight line parallel to the first straight line Line1. In addition, the four child nodes N1-1-N1-4 in the first node N1 are also located on a straight line parallel to the first straight line Line1. The first straight line Line1 is parallel to the control module 10 . Of course, in other alternative embodiments, the four child nodes N1-1-N1-4 in the first node N1 may be located at any position between the first straight line Line1 and the first image capture module 13.

In FIG. 6 is a schematic representation of the planar arrangement structure of the first optimization unit 11 and the second optimization unit 12 shown in FIG. 4. As shown in FIG. 6, with regard to the first optimization unit 11, the first node N1 is separated from the first image capturing unit 13 by the first distance S1, and since the first four resistors R1 are located in the vicinity of the first node N1 and the four first inductors L1 are located in the vicinity of the first image capturing unit 13, accordingly, the first four resistors R1 are approximately separated from the first image capturing unit 13 by the first distance S1.

As for the second optimization unit 12, the first node N1 is separated from the second image capturing unit 14 by a second distance S2, and since four second resistors R2 are located in the vicinity of the first node N1 and four second inductors L2 are located in the vicinity of the second image capturing unit 14, respectively, the four second resistors R2 are approximately separated from the second image capturing unit 14 by a second distance S2.

In this embodiment, the first distance S1 is the same as the second distance S2, the first resistors R1 and the second resistors R2 have the same resistance value, and accordingly the first inductors L1 and the second inductors L2 have the same inductance value.

When the first distance S1 and the second distance S2 are the same and both are 10 mm, the resistance values of the first resistors R1 and the second resistors R2 are the same and are all 10 Ω, and the inductance values of the first inductors L1 and the second inductors L2 are 27 nH. In this embodiment, all of the resistance values of the first resistors R1 and the second resistors R2 and the inductance values of the first inductors L1 and the second inductors L2 can be corrected according to actual requirements, and, for example, can be corrected according to factors such as the first distance S1, the second distance S2 and the parameters of the first image capture module 13 and the second image capture module 14 . They are not limited to this.

In FIG. 7 is a schematic representation of the planar arrangement structure of the first optimization unit 11 and the second optimization unit 12 shown in FIG. 4 according to the second embodiment of the present application. As shown in FIG. 7, with respect to the first optimization unit 11, the first node N1 is separated from the first image capturing unit 13 by a first distance S1.

As for the second optimization unit 12, the first node N1 is separated from the second image capturing unit 14 by a second distance S2.

In this embodiment, the first distance S1 is different from the second distance S2, the first resistors R1 and the second resistors R2 have the same resistance value, but the first inductors L1 and the second inductors L2 have different inductance values.

When the first distance S1 is 10 mm and the second distance S2 is 35 mm, the resistance values of the first resistors R1 and the second resistors R2 are the same and are 22 Ω, the first inductors L1 is 27 nH, and the inductance values of the second inductors L2 are 15 nH. In this embodiment, all of the resistance values of the first resistors R1 and the second resistors R2 and the inductance values of the first inductors L1 and the second inductors L2 can be corrected according to actual requirements, and, for example, can be corrected according to factors such as the first distance S1, the second distance S2 and the parameters of the first image capture module 13 and the second image capture module 14 . They are not limited to this.

Additionally, in FIG. 8 is a schematic view of functional modules for an image capture switching control unit according to the third embodiment of the present application. As shown in FIG. 8, the image pickup switching control unit 100 includes a first image capturing unit 13, a second image capturing unit 14, and a third image capturing unit 15, and is configured to execute switching control on the first image capturing unit 13, the second image capturing unit 14, and the capturing unit 15 third image. In addition, the image capture switching control unit 100 further comprises a first node N1, a second node N2, a first optimization unit 11, a second optimization unit 12, and a third optimization unit 16. In this embodiment, the first image capturing unit 13 and the second image capturing unit 14 operate according to the same operating principle, operation method, and functions as fixed in the first embodiment and the second embodiment. The third image capturing unit 15 is configured to capture a third image and output a second image signal corresponding to the third image. When the third image capturing unit 15 is in an operating state, that is, in a high speed low resistance mode, the third image capturing unit 15 is configured to capture a third image and output a corresponding third image signal. When the third image capturing unit 15 is in the idle state, that is, in the low power high resistance mode, the third image capturing unit stops capturing the third image and has an impedance of more than 100 Ω.

The resolution of the third image capture module 15 is the same as that of the second image capture module 14 . Note that the first image capturing unit 13, the second image capturing unit 14, and the third image capturing unit 15 share the first signal interface 101. Therefore, no matter which image capturing mode the image capturing display terminal 1 is in, at the same time, only one of the first image capturing unit 13, the second image capturing unit 14, and the third image capturing unit 15 is in operation.

The third image capturing unit 15 is electrically connected to the control unit 10 by using the first control bus CB1, and the control unit 10 controls the first image capturing unit 13, the second image capturing unit 14, and the third image capturing unit 15 so that they are in an operating state separated by time. That is, when the first image capturing unit 13 is in the working state, the second image capturing unit 14 and the third image capturing unit 15 are in the non-working state. When the second image capturing unit 14 is in the working state, the first image capturing unit 13 and the third image capturing unit 15 are in the non-working state. When the third image capturing unit 15 is in the working state, the first image capturing unit 13 and the second image capturing unit 14 are in the non-working state.

The first optimization unit 11 is electrically connected between the first node N1 and the first image capturing unit 13, and the second optimization unit 12 is electrically connected between the first node N1 and the second node N2.

The second image module 14 is electrically connected to the second node N2 by using the third optimizer 16, and the third image capturing module 15 is electrically connected to the second node N2 by using the third optimizer 16.

When the second image capturing unit 14 or the third image capturing unit 15 is in operation, the second optimizer 12 and the third optimizer 16 are operated simultaneously to coordinate with each other to eliminate the second image signal and third image signal callbacks on the front edges and trailing edges to ensure smooth curved image signals.

In particular, with reference to FIG. 8 and FIG. 9 together, in FIG. 9 is a schematic representation of the planar arrangement structure of the first optimization unit 11, the second optimization unit 12, and the third optimization unit 16 shown in FIG. 8. As shown in FIG. 9, the third optimization unit 16 comprises a first optimization sub-unit 161 and a second optimization sub-unit 162, the second image capturing unit 14 is electrically connected to the second node N2 by using the first optimization sub-unit 161, and the third image capturing unit 15 is electrically connected to the second node N2 by using the second subblock 162 optimization.

The second optimizer 12 and the first optimization sub-unit 161 are operated simultaneously to coordinate with each other to eliminate the second picture signal callback at the leading edge or trailing edge to smooth the second picture signal curve. The second optimizer 12 and the second sub-optimizer 162 are operated simultaneously to coordinate with each other to eliminate the third picture signal callback on the leading edge or trailing edge to smooth the third picture signal curve.

In this embodiment, the first optimization block 11 contains four first resistors R1 and four first inductors L1, the second optimization block 12 contains four second resistors R2, the first optimization sub-block 161 contains four third resistors R3 and the second inductors L2, and the second optimization sub-block 162 contains fourth resistors R4 and third inductors L3. The first node N1 is separated from the first image capture module 13 by a first distance S1, the second node N2 is separated from the second image capture module 14 by a second distance S2, and the second node N2 is separated from the third image capture module 15 by a third distance S3. In this embodiment, the second node N2 also contains four child nodes (not labeled) which are independent of each other and isolated from each other, and the four child nodes in the second node N2 are respectively in exact correspondence with the four child nodes N1-1-N1 -4 at the first node N1.

Since the four second resistors R2 and four third resistors R3 are located in the vicinity of the second node N2, the four second inductors L2 are located in the vicinity of the second image capturing unit 14, and the four third inductors L3 are located in the vicinity of the third image capturing unit 15, respectively, the four second resistors R2 and four third resistors R3 are separated from the second image capturing unit 14 by a second distance S2, and four second resistors R2 and four fourth resistors R4 are separated from the third image capturing unit 15 by a third distance S3.

In this embodiment, the first distance S1 is different from the second distance S2, and the second distance S2 is the same as the third distance S3.

The resistance values of the first resistors R1 and the second resistors R2 are the same, the resistance values of the second resistors R2 and the third resistors R3 are different, and the resistance values of the third resistors R3 and the fourth resistors R4 are the same. The inductance values of the first inductors L1 and the second inductors L2 are different, and the inductance values of the second inductors L2 and the third inductors L3 are the same.

When the first distance S1 is 10mm and the second distance S2 is 35mm, the resistance values of the first resistors R1 and the second resistors R2 are the same and are all 22 Ω, the resistance values of the third resistors R3 and the fourth resistors R4 are all 10 Ω, the inductance values of the first the inductors L1 are 18 nH, and the inductance values of the second inductors L2 and the third inductors L3 are 9 nH.

The resistance values of the third resistors R3 and the fourth resistors R4 can be adjusted according to actual situations. For example, the resistance values of the third resistors R3 and the fourth resistors R4 can be corrected according to factors such as the first distance S1 and the second distance S2, and the correction range of the resistance values of the third resistors R3 and the fourth resistors R4 is from 0 Ω to x Ω, where x represents is a numeric value greater than 0.

Additionally, in FIG. 10 is a schematic view of functional modules for an image capture switching control unit according to the fourth embodiment of the present application. As shown in FIG. 10, the circuit structures of the image capture switching control unit 100 and the image capture switching control unit 100 in the third embodiment are basically the same, and differ only in that the image capture switching control unit 100 further comprises a third image capture unit 15 and a third optimization unit 16.

Specifically, the image pickup switching control unit 100 includes a first image capturing unit 13, a second image capturing unit 14, and a third image capturing unit 15, and is configured to perform switching control on the first image capturing unit 13, the second image capturing unit 14, and the unit 15 capturing a third image and further comprises a first node N1, a first optimization unit 11, a second optimization unit 12, and a third optimization unit 16.

In this embodiment, the first image capturing unit 13 and the second image capturing unit 14 have the same functions as fixed in the first embodiment and the second embodiment. When the third image capturing unit 15 is in an operating state, that is, in a high speed low resistance mode, the third image capturing unit 15 is configured to capture a third image and output a corresponding third image signal. When the third image capturing unit 15 is in the idle state, that is, in the low power high resistance mode, the third image capturing unit stops capturing the third image and has an impedance of more than 100 Ω. The resolution of the third image capture module 15 is the same as that of the second image capture module 14 .

Note that the first image capturing unit 13, the second image capturing unit 14, and the third image capturing unit 15 share the first signal interface 101. Therefore, no matter which image capturing mode the image capturing display terminal 1 is in, at the same time, only one of the first image capturing unit 13, the second image capturing unit 14, and the third image capturing unit 15 is in operation.

The third image capturing unit 15 is electrically connected to the control unit 10 by using the first control bus CB1, and the control unit 10 controls the first image capturing unit 13, the second image capturing unit 14, and the third image capturing unit 15 so that they are in an operating state separated by time. That is, when the first image capturing unit 13 is in the working state, the second image capturing unit 14 and the third image capturing unit 15 are in the non-working state. When the second image capturing unit 14 is in the working state, the first image capturing unit 13 and the third image capturing unit 15 are in the non-working state. When the third image capturing unit 15 is in the working state, the first image capturing unit 13 and the second image capturing unit 14 are in the non-working state.

The first optimization unit 11 is electrically connected between the first node N1 and the first image capture module 13, the second optimization unit 12 is electrically connected between the first node N1 and the second image capture module 14, and the third optimization unit 16 is electrically connected between the first node N1 and the third image capture module 15 Images. In this embodiment, the circuit structures, connection methods and operating time sequences of the first optimization unit 11 and the second optimization unit 12 are exactly the same as the circuit structures, connection methods and operating time sequences of the first optimization unit 11 and the second optimization unit 12 in the first embodiment. Additionally, circuit structures and operating principles of the third optimization unit 16, the first optimization unit 11, and the second optimization unit 12 are the same.

When the third image capturing unit 15 is in operation, the third optimizer 16 eliminates the third image signal callbacks on the leading edge and trailing edge to ensure that the image signal curve is smoothed.

In particular, with reference to FIG. 10 and FIG. 11 together, in Fig. 11 is a schematic representation of the planar arrangement structure of the first optimization unit 11, the second optimization unit 12, and the third optimization unit 16 shown in FIG. 10. As shown in FIG. 11, the first optimization unit 11 comprises four first resistors R1 and four first inductors L1, the second optimization unit 12 comprises four second resistors R2 and four second inductors L2, and the third optimization unit 16 comprises four third resistors R3 and four third inductors L3. One of the third resistors R3 and one of the third inductors L3 are connected in series between the four child nodes N1-1-N1-4 and the third image capturing unit 15 in exact correspondence.

In FIG. 12 is a schematic diagram of a specific circuit structure of the image capture switching control unit shown in FIG. 3 according to the fifth embodiment of the present application. In this embodiment, as shown in FIG. 12, the image pickup switching control unit 100 and the image pickup switching control unit 100 shown in FIG. 4 are generally the same, and differ in that the first four inductors L1 in the first optimization unit 11 are replaced by two common-mode inductors CL1, and the four second inductors L2 are replaced by two common-mode inductors CL2. In addition, while having the same effect of denoising image signals as the first inductors L1 and the second inductors L2, the first common-mode inductors CL1 and the second common-mode inductors CL2 have higher levels of integration than the dispersed and independent first inductors L1 and second inductors L2. Therefore, the assembly is easier and more convenient, and the safety performance is better.

As shown in FIG. 12, the first optimization block 11 comprises four first resistors R1 and two first common-mode inductors CL1. Each first common-mode inductor contains the first two small inductors CLm. One of the first resistors R1 is connected in series with one of the first small inductors CLm. Therefore, one of the first common-mode inductors CL1 is connected in series with two of the first resistors R1. Accordingly, the second optimization unit 12 comprises four second resistors R2 and two second common mode inductors CL2, and each second common mode inductor comprises two second small inductors CLn. One of the first resistors R1 is connected in series with one of the second small inductors CLn. Therefore, one of the first common-mode inductors CL1 is connected in series with two of the first resistors R1.

That is, two adjacent first inductors L1 corresponding to one interface of the differential pair in the first embodiment and the second embodiment are replaced by one first common mode inductor CL1 in this embodiment, and two adjacent second inductors L2 corresponding to one interface of the differential pair in the first embodiment, and the second embodiment, are replaced by one second common-mode inductor CL2 in this embodiment.

In addition, according to the differential clock pair interface, two of the first resistors R1 and one first common mode inductor CL1 are connected in series and electrically between the first node N1 and the first image capture unit 13, and two of the second resistors R2 and one second common mode inductor CL2 are connected in series and electrically between the first node N1 and the second image capture module 14.

According to the differential data pair interface, two other first resistors R1 and another first common-mode inductor CL1 are connected in series and electrically between the first node N1 and the first image capturing unit 13, and two other second resistors R2 and another second common-mode inductor CL2 are connected in series and electrically between the first node N1 and the module 14 capture the second image.

The first common-mode inductor CL1 is configured to further perform noise filtering on the first picture signal. Therefore, by coordinating between the first resistors R1 and the first common-mode inductor CL1, the quality of the first image signal can be effectively improved to allow the first image capturing unit 13 to supply an image signal and perform high-speed, accurate and complete transmission in operation.

Accordingly, the second common-mode inductor CL2 is configured to further perform noise filtering on the second picture signal. Therefore, by coordinating between the second resistors R2 and the second common-mode inductor CL2, the quality of the second image signal can be effectively improved to allow the second image capturing unit 14 to supply an image signal and perform high-speed, accurate, and complete transmission in operation.

Referring to FIG. 13, fig. 14a and FIG. 14b together, in FIG. 13 is a schematic representation of a functional structure of an image pickup display terminal 1 according to the sixth embodiment of the present application. In FIG. 14a and FIG. 14b are schematic diagrams of planar structures of two opposite sides of the image pickup display terminal 1 shown in FIG. 13.

As shown in FIG. 13, fig. 14a and FIG. 14b, the image pickup display terminal 1 includes a display unit 200 and an image pickup switching control unit 100. The image pickup switching control unit 100 described in this embodiment has the same structure and function as the image pickup switching control unit 100 shown in FIG. 3. As shown in FIG. 13, the image capture switching control unit 100 includes a control unit 10, a first optimization unit 11, a second optimization unit 12, a first image capture unit 13, and a second image capture unit 14. The differences are that the image capturing display terminal 1 further comprises a display module 200, as well as a fourth optimization unit 204 and a fifth optimization unit 205, configured to optimize image data received by the display unit 200 for display.

Specifically, the display unit 200 is configured to receive an image signal and display the image signal. As shown in FIG. 14a and FIG. 14b, the display unit 200 includes a first display unit 201 and a second display unit 202 disposed on the touch display screen 1a. Both the first display unit 201 and the second display unit 202 are configured to perform image display according to the image signal. The resolutions for displaying an image of the first display unit 201 and the second display unit 202 may be the same or different.

In this embodiment, the number of display units included in the display unit 200 may alternatively be set as needed, for example, the display unit may include three or more display units, and the number is not limited to this. The image signal may be from a first image signal, a second image signal, and a third image signal provided by the first image capturing module 13, the second image capturing module 14, and the third image capturing module 15, or may be from an image generated inside the display terminal , or an image signal received by another terminal.

Specifically, the control module 10 further comprises a second signal interface 102, a second control bus CB2, and a third node N3. The second signal interface is a Display Serial Interface (DSI) in the MIPI interface of the processor of the mobile communications industry.

The control unit 10 is electrically connected to the first display unit 201 and the second display unit 202 by using the second control line CB2, and outputs a control signal to the first display unit 201 and the second display unit 202 by using the second control line CB2 to control the reception of the first display unit 201 and the second image signal display unit 202 and performing image display. In addition, the first display unit 201 and the second display unit 202 are further electrically connected to the second signal interface 102 of the control unit 10 by using the third node N3, and the control unit 10 supplies an image signal to the first display unit 201 and the second display unit 202 by using the second time division signal interface 102.

The control unit 10 outputs an image signal to the first display unit 201 and the second display unit 202 in a time division manner, which includes the following.

When the first display unit 201 receives an image signal by using the second signal interface 102, the second display unit 202 does not receive an image signal. Otherwise, when the first display unit 201 does not receive the image signal, the second display unit 202 receives the image signal by using the second signal interface 102. The first display unit 201 and the second display unit 202 receive a time division image signal so that the first display unit and the second display unit can share the second signal interface 102 to receive the image signal.

The control unit 10 can control both the first display unit 201 and the second display unit 202 to be in a standby state for receiving an image signal at the same time by using a control signal.

In addition, in order to control the time for the first display unit 201 and the second display unit 202 to perform image display and correctly receive the image signal properly after receiving the image signal, the control unit 10 further outputs an appropriate control signal to the first display unit 201, and the second display unit 202 to control the first display unit 201 to be in a standby state to receive an image signal, or to control the second display unit 202 to be in a standby state to receive an image signal. When the first display unit 201 is in the standby state for receiving the image signal, the first display unit 201 receives the image signal from the second signal interface 102, and when the second display unit 202 is in the standby state for receiving the image signal, the second display unit 202 receives an image signal from the second signal interface 102 .

The scenario in which the first display unit 201 and the second display unit 202 need to be in the standby state for receiving the time division image signal is as follows: when the user needs to display an image in the split screen mode because the display unit 200 is to display images captured at different positions or captured by different image pickup modules on different display units, the user can operate the control unit 10 to control the first display unit 201 and the second display unit 202 so that they are in a standby state to receive a signal about time division image by folding or unfolding the TP touch display screen or using the touch operation.

Specifically, the user, by using a touch operation, allows the control unit 10 to receive instructions input by a user outside the image capturing display terminal 1, namely, input instructions provided by performing a touch operation on the information request window displayed on the touch display screen 1a shown in FIG. . 2, or receiving an audio signal in sound by using the audio signal receiving module VP, or otherwise, or receiving instructions provided by other functional modules within the terminal. The position information corresponding to the touch operation is used to represent the display unit selected for performing image display. For example, when the user uses the display position option on the top screen in the touch display screen TP, it means that the first display unit 201 is selected to receive the image signal; and when the user uses the lower screen display position option in the touch display screen TP, it means that the second display unit 202 is selected to receive the image signal.

The audio signal may also be used to represent the display unit selected to receive the image signal. For example, if the content contained in the voice information in the audio signal is recognized as "top screen display", this means that the first display unit 201 is selected to receive the image signal; and, if the content contained in the voice information in the audio signal is recognized as "lower screen display", it means that the second display unit 202 is selected to receive the image signal.

It should be noted that although the first display unit 201 and the second display unit 202 receive a time division image signal, the first display unit 201 and the second display unit 202 may perform image display at the same time, or only one of the two display units receiving the image signal performs image display. They are not limited to this. For example, the first display unit 201 and the second display unit 202 may display an image signal at the same time by temporarily storing the received image signal, or only one of the first display unit 201 and the second display unit 202 may display the received image signal.

As shown in FIG. 13, the fourth optimization unit 204 is electrically connected to the second signal interface 102 by using the third node N3, and the fourth optimization unit 204 is further electrically connected to the first display unit 201. The fifth optimization unit 205 is electrically connected to the second signal interface 102 by using the third node N3, and the fifth optimization unit 205 is further electrically connected to the second display unit 202. The fourth optimization unit 204 and the fifth optimization unit 205 are connected to the second signal interface 102 of the control unit 10 by using the third node N3 as a bifurcation point.

In this embodiment, the circuit structures and connection methods of the fourth optimizer 204 and the fifth optimizer 205 are the same as the circuit structures and the connection methods of the first optimizer 11 and the second optimizer 12, which is not described again in this embodiment. Accordingly, the principle and process of optimizing the fourth optimization unit 204 with respect to the first image signal and the optimization of the fifth optimization unit 205 with respect to the second image signal are the same as the principle and process of optimizing the first optimization unit 11 with respect to the first image signal and optimizing the second block 12 optimizations for the signal about the second image.

When the first display unit 201 receives an image signal by using the second signal interface 102 and the third node N3, the fourth optimization unit 204 can accurately eliminate callbacks and image signal noise generated at the rising edge or falling edge caused by the wire loops of the third node N3 and the second display unit 202 to ensure that the image signal curve is flattened. When the second display unit 202 receives an image signal by using the second signal interface 102 and the third node N3, the fifth optimization unit 205 can accurately eliminate callbacks and image signal noise generated at the leading edge or trailing edge caused by the wire loops of the third node N3 and the first image display unit 201 to ensure that the image signal curve is smoothed. Therefore, the fourth optimizer 204 and the fifth optimizer 205 can smooth out curves of the received image signals. For example, when the first display unit 201 and the second display unit 202 receive the first picture signal and the second picture signal, the curve of the received first picture signal or the second picture signal is smoothed.

The above descriptions are illustrative embodiments of the present invention. It should be noted that a person skilled in the art can make certain improvements and improvements without departing from the principle of the present invention, and improvements and improvements are within the scope of the present invention.

Claims (79)

1. An image capture display terminal, comprising: a control module, a first optimization unit, a second optimization unit, a first image capture module, a second image capture module, and a first node, wherein the control module includes a first control bus and a first signal interface, the control module is electrically connected to the first image capture module and the second image capture module by using the first control bus, and the control module outputs a control signal to control the first image capture module and the second image capture module so that they are in working order with time separation; the first signal interface is electrically connected to the first node; the first optimization unit is electrically connected between the first node and the first image capture module; the second optimization unit is electrically connected between the first node and the second image capture module; the first image capturing module is configured to capture the first image and signal the first image; the second image capturing module is configured to capture the second image and signal the second image; the captured first image signal is transmitted to the first signal interface by using the first optimizer when the first image capturing module is in operation, and the first optimizer is configured to smooth the first image signal curve; and the captured second image signal is transmitted to the first signal interface by using the second optimizer when the second image capturing module is in operation, and the second optimizer is configured to smooth the second image signal curve. 2. The display terminal for capturing an image according to claim 1, characterized in that the first optimization unit is specifically configured to eliminate, when the first image capturing module is in a working state and the second image capturing module is in a non-working state, of the first image signal callback to smooth the first image signal curve; and wherein the second optimization unit is specifically configured to eliminate, when the second image capture module is in the working state and the first image capture module is in the idle state, the second image signal callback to ensure the smoothness of the second image signal curve. 3. Display terminal image capture according to any one of paragraphs. 1 and 2, characterized in that the first optimization block contains the first resistors, and the second optimization block contains the second resistors. 4. Display terminal image capture according to any one of paragraphs. 1-3, which is different in that the distance from the first node to the control module is greater than the distance from the first node to the first image capture module; or the distance from the first node to the control module is greater than the distance from the first node to the second image capture module. 5. An image capturing display terminal according to claim 4, characterized in that the first optimization unit further comprises first inductors, wherein the first inductors are connected in series between the first resistors and the first image capture module; wherein the second optimization unit further comprises second inductors, and wherein the second inductors are connected in series between the second resistors and the second image capture module; wherein the first inductors are configured to filter the signal noise about the first image; and the second inductors are configured to filter the signal noise about the second image. 6. The display terminal for capturing an image according to claim 5, characterized in that the first signal interface comprises a clock signal interface and a data signal interface, wherein the clock signal interface is configured to receive a clock control signal in the first image signal or the second image signal, and the data signal interface is configured to receive image data in the first image signal or signal about the second image; wherein the clock signal interface comprises a differential clock pair interface pair, and the differential clock pair interface pair is electrically connected to the first node; the data signal interface includes a pair of differential data pair interfaces, and the pair of differential data pair interfaces is electrically connected to the first node; the first optimization unit includes four first resistors, and the first four resistors are respectively electrically connected between the first node and the first image capture module corresponding to the differential clock pair interfaces and the differential data pair interfaces; and the second optimization unit comprises four second resistors, and the four second resistors are respectively electrically connected between the first node and the second image capture module corresponding to the clock differential pair interfaces and the data differential pair interfaces. 7. The display terminal for capturing an image according to claim 6, characterized in that the first optimization unit specifically further comprises four first inductors, wherein the four first inductors are respectively electrically connected between the four first resistors and the first image capture module; and wherein the second optimization unit specifically further comprises four second inductors, wherein the four second inductors are respectively electrically connected between the four second resistors and the second image capture module. 8. The display terminal for capturing an image according to claim 6, characterized in that the first optimization block further comprises two first common-mode inductors, wherein each of the first common-mode inductors comprises two first small inductors, and one of the first resistors is connected in series with one of the first small inductors; wherein the second optimization unit further comprises two second common-mode inductors, each of the second common-mode inductors comprising two second small inductors, and one of the first resistors is connected in series with one of the second small inductors; two of the first resistors and one of the first common mode inductors are connected in series and electrically connected between the first node and the first image capture module corresponding to the differential clock pair interfaces, and two of the second resistors and one of the second common mode inductors are connected in series and electrically connected between the first node and a second image capture module corresponding to differential clock pair interfaces; and the other two first resistors and the other of the first common mode inductors are connected in series and electrically connected between the first node and the first image capturing module corresponding to the differential data pair interfaces, and the other two second resistors and the other of the second common mode inductors are connected in series and electrically connected between the first node and a second image capture module corresponding to the interfaces of the differential data pair. 9. Display terminal image capture according to any one of paragraphs. 1-4, which is different in that the image capture switching control module further comprises a third image capture module, a second node and a third optimization unit, wherein the third image capture module is electrically connected to the control module by using the first control bus and is configured to capture the third image to obtain a signal about the third image, and the control module is further configured to control the first image capture module, the second image capture module, and the capture module the third image, so that they are in working order with time separation; the second optimization unit is electrically connected between the first node and the second node; the second image capturing module is electrically connected to the second node by using the third optimization unit; the third image capturing module is electrically connected to the second node by using the third optimization unit; the second optimizer and the third optimizer are configured to eliminate the callback and noise of the second picture signal to smooth the second picture signal curve; and the second optimizer and the third optimizer are configured to eliminate the callback and noise of the third picture signal to ensure smoothness of the third picture signal curve. 10. The display terminal for capturing an image according to claim 9, characterized in that the third optimization unit comprises a first optimization sub-unit and a second optimization sub-unit, wherein the second image capturing module is electrically connected to the second node by using the first optimization sub-unit, and the third image capturing module is electrically connected to the second node by using the second optimization sub-unit; wherein the second optimization block and the first optimization subblock are configured to eliminate the callback and signal noise about the second image; and the second optimization block and the second optimization subblock are configured to eliminate the callback and signal noise about the third image. 11. The display terminal for capturing an image according to claim 10, characterized in that the second resistors are electrically connected between the first node and the second node; wherein the first optimization subunit comprises third resistors and second inductors, and the third resistors and second inductors are connected in series between the second node and the second image capture module; and the second optimization subunit contains fourth resistors and third inductors, and the fourth resistors and third inductors are connected in series between the second node and the third image capture module. 12. The display terminal for capturing an image according to claim 11, characterized in that the clock signal interface is further configured to receive a clock control signal in the third picture signal, and the data signal interface is further configured to receive image data in the third picture signal; wherein the clock signal interface comprises a differential clock pair interface pair, and the differential clock pair interface pair is electrically connected to the first node; the data signal interface includes a pair of differential data pair interfaces, and the pair of differential data pair interfaces is electrically connected to the first node; the first optimization block comprises four first resistors and four first inductors, and four first resistors and four first inductors are connected in series and electrically, respectively, between the first node and the first image capture module, corresponding in exact correspondence to a clock differential pair interface pair and a data differential pair interface pair ; the second optimization block comprises four second resistors, and four second resistors are connected in series and electrically between the first node and the second node, corresponding to a clock differential pair interface pair and a data differential pair interface pair; the first optimization sub-unit comprises four third resistors and four second inductors, and four third resistors and four second inductors are connected in series and electrically, respectively, between the second node and the second image capture module, corresponding in exact correspondence to a clock differential pair interface pair and a data differential pair interface pair ; and the second optimization subunit comprises four fourth resistors and four third inductors, and four fourth resistors and four third inductors are connected in series and electrically, respectively, between the second node and the third image capture module, corresponding in exact correspondence to a clock differential pair interface pair and a data differential pair interface pair . 13. Display terminal image capture according to any one of paragraphs. 1-12, characterized in that the image capture display terminal further comprises a display module, and the control module further comprises a second signal interface, a second control bus, and a third node; wherein the third node is electrically connected to the second signal interface; the display module includes a first display unit and a second display unit, the first display unit and the second display unit are configured to display an image, and the first display unit and the second display unit are electrically connected to the second signal interface by using the second node; and the control module is electrically connected to the first display unit and the second display unit using a second control bus, and the control module transmits an image signal to the first display unit and the second display unit using a second time division signal interface. 14. The image capture display terminal according to claim 13, characterized in that it further comprises a fourth optimization unit and a fifth optimization unit, wherein the fourth optimization unit is electrically connected between the third node and the first display unit, and is configured to eliminate the callback and noise of the received image signal; and the fifth optimization unit is electrically connected between the third node and the second display unit and is configured to eliminate the callback and noise of the received image signal. 15. An image capturing display terminal according to claim 14, wherein the control module is a system-on-a-chip, wherein the first signal interface is a camera serial interface in the processor interface of the mobile communication industry, and the second signal interface is a display serial interface in processor interface of the mobile communications industry. 16. An image capture display terminal, comprising: a control module, a first optimization unit, a second optimization unit, a first image capture module, a second image capture module, and a first node, wherein the control module includes a first control bus and a first signal interface, the control module is electrically connected to the first image capture module and the second image capture module by using the first control bus, and the control module outputs a control signal to control the first image capture module and the second image capture module so that they are in working order with time separation; the first signal interface comprises a clock signal interface and a data signal interface, wherein the clock signal interface is configured to receive a clock control signal in the first image signal or the second image signal, and the data signal interface is configured to receive image data in the first image signal or a second image signal, wherein the clock signal interface comprises a differential clock pair interface pair and the data signal interface comprises a differential data pair interface pair; a pair of differential clock pair interfaces and a pair of data signal interfaces in the first signal interface, respectively, are electrically connected to four child nodes in the first node; the first optimization unit is electrically connected between the first node and the first image capturing unit, and the first optimization unit includes four first resistors and four first inductors; the second optimization unit is electrically connected between the first node and the second image capture module, and the second optimization unit includes four second resistors and four second inductors; the first four resistors are respectively electrically connected between the four child nodes and the first image capturing module corresponding to the differential clock pair interfaces and the differential data pair interfaces; four second resistors are respectively electrically connected between the four child nodes and the second image capturing module corresponding to the differential clock pair interfaces and the differential data pair interfaces; the first image capturing module is configured to capture the first image and signal the first image; the second image capturing module is configured to capture the second image and signal the first image; the first image signal is transmitted to the first signal interface by using the first optimizer when the first image capture module is in operation, the first resistor is configured to eliminate the first image signal callback, and the first inductor is configured to filter the noise of the signal about first image; and the second image signal is transmitted to the first signal interface by using the second optimizer when the second image capture module is in operation, the second resistor is configured to eliminate the second image signal callback, and the second inductor is configured to filter the noise of the signal about second image.

Images