RU2743574C1 - Forward converter with synchronous rectification and active overvoltage limitation - Google Patents

Abstract

FIELD: physics.

SUBSTANCE: invention relates to converting equipment, in particular to converters with low input voltage, and can be used in power supply systems of devices in radio engineering, computer science and automation. Damping circuit formed by the first limiting resistor and the first limiting capacitor connected in series, and an active excess-voltage suppressor consisting of a limiting capacitor, a diode, an additional MIS transistor and a limiting resistor are introduced into the control circuit and the power circuit of the converter.

EFFECT: improved weight and size indicators of the converter, increased efficiency and reduced radio interference.

1 cl, 1 dwg

Description

The technical field to which the invention relates

The invention relates to converting equipment, in particular to converters with low input voltage, converting direct voltage to direct voltage, and can be used in power supply systems for devices in radio engineering, automation and computer technology.

Technical level

At present, the development of electrical energy converters - the main units of secondary power supplies - is moving towards miniaturization, increasing efficiency and reducing radio interference.

There are many well-known circuit solutions for secondary power supplies based on a single-ended forward voltage converter, for example, a single-ended converter with a direct connection of a diode and an active surge suppressor (P.Urinov, Voltage limiting on a key transistor in single-ended converters, “Power Electronics” magazine, No. 1, 2004, pp. 62-65, fig. 5).

The disadvantage of this converter circuit is the large power loss in the rectifier diodes, which requires the use of radiators, this increases the weight and dimensions. In addition, power losses in the rectifier diodes lead to a decrease in efficiency.

Also known is a converter with a synchronous rectifier controlled from the winding of a power transformer (Mironov AA, Tverdov IV, Kravchenko MN, LLC "AEIEP" Synchronous rectification in power modules. [Electronic resource]. - URL: [ http://tkd.com.ua/articles/tkd0108.html] (date of treatment 05/08/2020), Fig. 2a), consisting of a control circuit and a power circuit, including a pulse transformer with two windings (primary and secondary) , a power switch (MOS transistor), a limiting RCD circuit (a diode connected in series with a parallel connected capacitor and a resistor), a synchronous rectifier (two MOS transistors), a diode, two protective RC circuits (a resistor and a capacitor connected in series) of a choke and a filter capacitor ...

The disadvantages of the circuit of this converter are overvoltages on MIS transistors, a high level of radio interference, low efficiency with a sufficiently large mass and dimensions.

At high frequencies (more than 100 kHz) it is very difficult to ensure a good magnetic coupling between the primary and secondary windings of the transformer, this leads to an increase in the leakage inductance, both in the primary and in the secondary winding of the transformer, and the energy stored in it is the cause of overvoltage on the drain MIS transistors when they are turned off. This fact increases the risk of failure of the MIS transistor, which makes it necessary either to use devices with unique properties in speed, overload capacity, resistance to secondary breakdown in this circuit, or to introduce protective circuits: the first RCD circuit shunts the primary winding of the transformer, the second RC-circuit - bypasses the MOS-transistor in the primary circuit, the third and RC-circuit - bypasses the MOS-transistor in the secondary circuit. The noted features limit the scope of this converter circuit.

In addition, significant power will be dissipated on the resistors of the protective circuits, i.e. The efficiency of the converter decreases.

The closest analogue of the claimed invention is a converter with resonant switching (I. Tverdov, M. Kravchenko, Power modules with high efficiency and a wide range of input voltages, the journal "Electronic Components" No. 8, 2012, pp. 53-55), consisting of a circuit control and power circuit, which includes a pulse transformer with two windings (primary and secondary), a power switch (MOS transistor), an active limiter circuit (a series-connected MOS transistor and a capacitor), a synchronous rectifier (two MOS transistors), a choke and a filter capacitor. In this case, the beginning of the primary winding of the pulse transformer is connected to the first input terminal, and the end of the primary winding is connected to the drain of the MOS transistor, the source of which is connected to the second input terminal, and the gate is connected to the output of the control circuit. The second terminal of the control circuit is connected to the gate of the second MOS transistor, the source of which is also connected to the second input terminal, and the drain is connected to the first terminal of the capacitor, which is connected by the second terminal to the end of the primary winding.

The drain of the third MOS transistor is connected to the end of the secondary winding of the pulse transformer, its gate is connected to the first terminal of the control circuit, and the source is connected to the negative plate of the output capacitor and the source of the fourth MOS transistor, the gate of which is connected to the second terminal of the control circuit, and the drain is connected to the beginning of the secondary winding and the first output of the choke of the input filter, the second output of the choke is connected to the positive plate of the output capacitor connected to the load.

The disadvantages of this converter are overvoltages on the fourth MOS transistor, leading to an increase in radio interference and a decrease in efficiency, with a sufficiently large mass and dimensions.

This is due to the fact that the transformer windings have leakage inductance, in which energy is stored during the flow of current, which is the cause of overvoltages on the drain of MIS transistors when they are turned off. In this circuit, the fourth MOS transistor is most susceptible to overloads, since it turns off with overvoltage at high current. This fact increases the risk of failure of the MOS transistor, which makes it necessary either to use devices with unique properties in this circuit in terms of speed, overload capacity, resistance to secondary breakdown, or to introduce protective circuits, for example, RC circuits, between the drain and the source of the third and the fourth MOS transistor, but considerable power will be dissipated on the resistors of the protective circuits, i.e. The efficiency of the converter decreases. The noted features reduce the efficiency of the converter and lead to an increase in weight and dimensions.

In addition, the leakage inductance of the secondary winding, when the MOS transistor is turned off, forms an oscillating circuit with a high natural frequency, this is the reason for an increase in radio interference, and their reduction requires the use of protective RC circuits and shielding, which in turn will lead to a decrease in efficiency and increase in weight and dimensions. The noted features increase the level of radio interference of the converter and increase the weight and dimensions.

The essence of the invention

The technical result of the invention is to improve the weight and size of the converter, increase its efficiency and reduce radio interference.

The technical result is achieved by the fact that a converter with resonant switching, consisting of a control circuit and a power circuit, which includes a pulse transformer with two windings (primary and secondary), a power switch (MOS transistor), an active limiter circuit (series-connected MIS- transistor and capacitor), a synchronous rectifier (two MOS transistors), a choke and a filter capacitor, a damping circuit formed by the first limiting resistor and the first limiting capacitor connected in series, and an active surge suppressor, consisting of a second limiting capacitor, a diode, an additional MIS- transistor and the second limiting resistor, while the drain - the source of the first MIS transistor of the synchronous rectifier is shunted by the damping circuit, and the source of the second MIS transistor of the synchronous rectifier is connected through the second limiting resistor to the source of the additional MIS transistor of the synchronous rectifier and to to the diode, the anode of which is connected to the drain of the additional MIS transistor, and the second limiting capacitor is connected between the drains of the second MIS transistor of the synchronous rectifier and the additional MIS transistor, the gate of the additional MIS transistor is connected to the end of the third winding of the pulse transformer, and the beginning of the third winding of the transformer is connected to the output capacitor of the filter.

Blueprints

FIG. 1 shows a block diagram of the proposed forward converter with synchronous rectification and active limitation, where the following designations are adopted:

1 - input capacitor;

2 - PWM control unit;

3 - the first MOS transistor;

4 - second MOS transistor;

5 - capacitor;

6 - pulse transformer;

7 - synchronous rectifier control unit;

8 and 9 - MOS transistor, forming a synchronous rectifier;

10 - the first limiting resistor;

11 - the first limiting capacitor;

12 - the second limiting capacitor;

13 - diode;

14 - additional transistor;

15 - the second limiting resistor;

16 - filter choke;

17 - filter capacitor.

Implementation of the invention

The forward converter with synchronous rectification and active surge suppression consists of a control circuit that includes a PWM control unit 2 and a synchronous rectifier control unit 7, as well as a power circuit that includes an input capacitor 1, an MOS transistor 3, an active surge suppressor, consisting of a second MOS transistor 4 and a capacitor 5, a pulse transformer 6, a synchronous rectifier formed by MIS transistors 8 and 9, a damping circuit formed by a first limiting resistor 10 and a first limiting capacitor 11, a filter choke 16 and a filter capacitor 17, an active limiter overvoltage, consisting of a second limiting capacitor 12, a diode 13, an additional transistor 14 and a second limiting resistor 15.

In this case, the input capacitor 1 is connected between the input terminals, the beginning of the primary winding of the pulse transformer 6 is connected to the positive plate of the input capacitor, and its end, through the drain-source transition of the first MOS transistor 5, is connected to the negative plate of the input capacitor, while the gate of the first MIS is the transistor is connected to the first terminal of the PWM control unit 2. The second terminal of the PWM control unit is connected to the gate of the second MIS transistor 4, the source of which is connected to the source of the first MIS transistor, and the drain is connected through a capacitor 5 to the end of the primary winding of the pulse transformer. To the end of the secondary winding of the pulse transformer 6, the first output of the synchronous rectifier control unit 7 and the drain of the MIS transistor 8 are connected, its gate is connected to the second output of the synchronous rectifier control unit, and the source is connected to the negative plate of the filter capacitor 17, which is connected between the output terminals. The drain-source of the MIS transistor 8 is shunted by a damping circuit formed by the series connection of the first limiting resistor 10 and the first limiting capacitor 11. The third terminal of the synchronous rectifier control unit is connected to the gate of the MIS transistor 9, its source is connected to the source of the MIS transistor 8 and the beginning of the third pulse transformer winding 6, and the drain is connected to the beginning of the secondary winding of the pulse transformer, the fourth terminal of the synchronous rectifier control unit and the first terminal of the filter choke 16, the second terminal of which is connected to the positive plate of the filter capacitor 17. The end of the third winding of the pulse transformer is connected to the gate of the additional MIS -transistor 14, the source of which is connected through the second limiting resistor 15 to the source of the MIS transistor 9 and the cathode of the diode 13, the anode of which is connected to the drain of the additional MIS transistor, while, between the drains of the MIS transistor 9 and the additional MIS transistor on The second limiting capacitor 12 has been tested.

In addition, the forward converter circuit with synchronous rectification and active limitation is covered by voltage feedback, has protection for current and undervoltage (not shown in the figure).

A forward converter with synchronous rectification and active limiting works as follows.

If there is an input voltage UВХ at the input terminals and the PWM control unit supplies a positive pulse to the gate of the first MOS transistor 3, it opens, while the second MOS transistor 4 is locked. A current begins to flow through the circuit: positive input terminal, primary winding of pulse transformer 6, drain-source of the first MIS transistor 3, negative input terminal.

A voltage is applied to the primary winding of the pulse transformer 6, which is transformed into its secondary winding. The synchronous rectifier control unit sends a positive impulse to the gate of the MOS transistor 8, it opens. A current begins to flow through the circuit: the beginning of the secondary winding of the pulse transformer, the filter choke, the load (not shown in the figure), the source-drain of the MOS transistor 8, the end of the secondary winding of the pulse transformer. At the same time, current flows through the circuit: the beginning of the secondary winding of the pulse transformer, the second limiting capacitor 12, the diode 13, the end of the secondary winding of the pulse transformer. In addition, current also flows through the circuit: the beginning of the secondary winding of the pulse transformer, the second limiting capacitor 12, the drain-source of the additional MOS transistor, the second limiting resistor 15, the end of the secondary winding of the pulse transformer. Due to the flow of current through the second limiting capacitor 12 and diode 13, the rate of voltage rise on the secondary winding of the pulse transformer 6 and the drain-source of the fourth MOS transistor decreases, which in turn leads to a decrease in radio interference. At the end of the charging period of the second limiting capacitor 12, the transfer of the stored energy to the load (not shown in the figure) begins, the current flows through the circuit: the first plate of the second limiting capacitor 12, the filter choke 16, the load (not shown in the figure), the second limiting resistor 15, the source-drain of the additional MOS transistor, the second terminal of the second limiting capacitor 12. This makes it possible to reduce the amplitude of overvoltages at the drain of the MIS transistor 9, while reducing power losses, respectively, increasing the efficiency, and reducing the weight and dimensions.

When the PWM control unit sends a negative pulse to the gate of the first MIS transistor, it turns off, the synchronous rectifier control unit sends a negative pulse to the MIS transistor 8 gate, it turns off, then the synchronous rectifier control unit gives a positive pulse to the MIS transistor 9 gate and it turns on. At the end of the third winding of the pulse transformer, a pulse is formed that closes the additional MOS transistor 14, in addition, during the transient process, the current flowing through the second limiting resistor 15 contributes to the acceleration of its closing. When the first MOS transistor is turned off, the current through the load does not stop, it is maintained by the energy stored in the filter choke, and flows through the circuit: filter choke, load (not shown in the figure), source-drain of the MOS transistor 9. In this case , MOS transistor 8 is closed and a voltage is applied to it, the rise of which is limited by the damping circuit, charging the first limiting capacitor 11 with the current resistance of the first limiting resistor 10. The filter capacitor 17 provides the required voltage ripple across the load.

After turning off the first MOS transistor, with a fixed delay, the PWM control unit sends a signal to turn on the second MOS transistor. The sum of the leakage inductance current and the magnetizing inductance of the pulse transformer flows through the circuit: the beginning of the primary winding of the pulse transformer, capacitor 5, the drain-source of the second MOS transistor, the input capacitor, the beginning of the primary winding, charging the capacitor 5. Upon completion of the charging of the capacitor 5, the stored energy is recovered into the input capacitor, along the path of current flow: the first output of the capacitor 5, the primary winding of the pulse transformer, the input capacitor 1, the source-drain of the second MOS transistor, the second capacitor plate 5.

When the PWM control unit sends a signal that turns off the second MOS transistor 4, the currents of the magnetizing and leakage inductance are absent or very small, the voltage across the MOS transistor decreases. With a fixed delay, the PWM control unit sends a positive pulse to the gate of the first MOS transistor, it turns on, the synchronous rectifier control unit sends a negative pulse to the gate of the MOS transistor 8, it turns off.

The voltage feedback circuit ensures the stability of the output voltage (UOUT) within the specified limits when the input voltage (UBX) and load current change due to pulse-width modulation of the voltage of the primary winding of the transformer 6 (voltage feedback is provided by the fact that the PWM control unit is supplied voltage from output terminals).

The voltage protection circuit disables the pulse generation when the input voltage goes beyond the specified range (voltage protection is provided by the PWM control unit in conjunction with a resistive voltage divider connected in parallel with the input capacitor).

The current protection circuit limits the drain-source current of the first MOS transistor during start-up and short circuit (current protection is provided by the PWM control unit together with a shunt resistor connected between the source of the first MOS transistor and the input capacitor).

The introduction of a damping circuit consisting of the first limiting resistor 10 and the first limiting capacitor 11 into the converter circuit with resonant switching made it possible to level the error in the capacitive characteristics of the drain-source MOS transistor 8 and to get rid of oscillatory processes, as a result to reduce the level of radio interference. And the introduction of an overvoltage limiting circuit, consisting of a second limiting capacitor 12, a diode 13, a second limiting resistor 15, an additional MIS transistor 14, and a third winding of a pulse transformer 6, led to a decrease in the maximum drain-source voltage of the MIS transistor 9 with a simultaneous decrease in overload by power and voltage. This made it possible to use an MOS transistor with a lower maximum drain-source voltage, which has less parasitic characteristics, which led to an increase in efficiency by 1.5 to 2.4%, as well as a decrease in weight and dimensions. In addition, the level of radio interference has been reduced by more than 3dB.

Claims (1)

Forward-forward converter with synchronous rectification and active overvoltage limitation, including a pulse transformer, a PWM control unit, a synchronous rectifier control unit, including two MOS transistors, an input capacitor and a filter capacitor connected respectively between the input and output terminals, the positive plate of the input capacitor is connected to the beginning the primary winding of the pulse transformer, and its end through the drain-source junction of the first MIS transistor is connected to the negative plate of the input capacitor, the terminals of the PWM control unit are connected to the gates of the first and second MIS transistors, the sources of which are connected, the drain of the first MIS transistor is connected through a capacitor to the end of the primary winding of the pulse transformer, a choke is connected to the beginning of the secondary winding of the transformer, the drain of the second MOS transistor of the synchronous rectifier and the output of the control unit of the synchronous rectifier, to the end of the secondary winding of the pulse transformer connected to the second output of the synchronous rectifier control unit and the drain of the first MOS transistor of the synchronous rectifier, characterized in that a damping circuit formed by the first limiting resistor and the first limiting capacitor connected in series, and an active surge suppressor consisting of a second limiting capacitor, a diode, an additional MIS are introduced -transistor and the second limiting resistor, while the drain-source of the first MIS transistor of the synchronous rectifier is shunted by the damping circuit, and the source of the second MIS transistor of the synchronous rectifier is connected through the second limiting resistor to the source of the additional MIS transistor of the synchronous rectifier and the cathode of the diode, the anode of which is with the drain of the additional MOS transistor, and between the drains of the second MOS transistor of the synchronous rectifier and the additional MOS transistor, a second limiting capacitor is connected, the gate of the additional MIS transistor is connected to the end of the third winding of the pulse transformer, and the beginning of the third winding of the transformer is connected to the output capacitor of the filter.

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