RU2575481C1 - Digital evaluation and correlation compensation detector - Google Patents

Abstract

FIELD: radio engineering, communication.

SUBSTANCE: digital evaluation and correlation compensation detector implements the digital method of measurement of average noise dispersion in the signal detection channel and its compensation by algorithmic subtraction at the input of the threshold unit. The compensation detector contains FFT processor (1); cosine transform circuit (2); sine transform circuit (3); the digital delay line (4); the first multiplier (5); the first squarer (6); the second squarer (7); the storage (8); the adder (9); the second multiplier (10); 1/H averaging coefficient storage register (11); the first subtraction circuit (12); the second subtraction circuit (13); the maximum finding circuit (14); the storage with M inputs (15); the electronic key (16); the comparison circuit (17); the third subtraction circuit (18); the third multiplier (19); the fourth multiplier (20); 1/M averaging coefficient storage register (21); the register of storage of value of the function defining the detection threshold level (22).

EFFECT: increase of sensitivity of the digital detector of the panoramic receiver of signals with random amplitude and initial phase in conditions of noise with unknown intensity with the constant level of false alarms on the basis of decrease of the threshold ratio signal - noise at the input defining its sensitivity at the preset values of probability of detection and false alarm, increase of range of detection of radio emission sources in presence of signal of radio emission sources and reduction of time of analysis of radio-electronic situation in the preset analyzed band of frequencies for a priori unknown load of the band of frequencies of radio emission sources, providing constant level of false alarms according to the preset probabilities of detection and false alarm in case of absence of the signal of radio emission sources.

1 dwg

Description

The invention relates to the field of radio engineering and can be used in panoramic radio receivers of radio monitoring systems, radio interference stations, radar systems, direction finders, radio and radio relay communication devices, as well as other devices in which the detection of signals from radio sources received against a background of noise with unknown intensity .

Known optimal detector containing a series-connected receiving antenna, a linear path of the receiver, a matched filter, a threshold device, [see Martynov V.A., Selikhov Yu.I. Panoramic receivers and spectrum analyzers / Ed. G.D. Zavarina. - 2nd ed., Revised. and add. - M .: Soviet Radio, 1980. - 352 s, ill., Fig. 2.6., P. 46].

The disadvantage of the detector is a high probability of false alarm in the absence of a useful signal and a low probability of detection in the presence of a signal due to the low signal to noise ratio due to the lack of a procedure for compensating the noise component at the input of a threshold device.

Known radio receiver with interference compensation (patent RU 2363014, G01S 7/36, 04/15/08), which compensates for mutually correlated interference based on the use of differences in the values of the cross-correlation functions of the internal noise of the receiver and intentional interference in the primary and secondary compensation channels reception.

The disadvantage of the radio receiver is the low probability of signal detection due to the low signal to noise ratio, and in the absence of a signal, a high level of false alarms due to the fact that interference cancellation is carried out only if there is mutually correlated interference in the receive channel and the compensation voltage is proportional to the interference level in additional receive channel, and not mainly.

Known radio receiver with adaptive interference compensation (Radio receivers: Textbook for universities / NN Fomin, NN Bug, OV Golovin and others; edited by NN Fomin. - 3rd edition, stereotype . - M .: Hot line - Telecom, 2007. S. 410-411), in which the interference signal is compensated based on the use of an additional receive channel shifted in frequency relative to the main channel and including a tunable filter and a subtracting device connected in series.

The disadvantage of this radio is that the noise level (interference) in the main reception channel is not taken into account, and this, in turn, leads to a mismatch between the level of the compensation voltage and the true value of the noise level (interference) in the main reception channel, which reduces the probability of detection signal due to the low signal to noise ratio, and in the absence of a signal to increase the likelihood of a false alarm.

Known detector [Borisov V.I. et al. Spatial and probabilistic-temporal characteristics of the effectiveness of response interference stations when suppressing radio communication systems. / Ed. IN AND. Borisov. - M .: RadioSoft, 2008 .-- pic. 2.9.3, p. 131.] signals with a random amplitude and initial phase in noise of unknown intensity, maintaining a constant level of false alarms (PULT) and making decisions according to the Neumann-Pearson criterion.

A disadvantage of a detector of signals with a random amplitude and initial phase in noise of unknown intensity is that the detection threshold level does not correspond to a real jamming-signal situation, and, therefore, the required values of detection probabilities and false alarms are not provided. This is due to the fact that the measurement of noise dispersion in the detector is carried out under the condition that there is no signal in the detection channel and if the noise intensity (interference) at the input of the receiver changes, the measurement result will be incorrect.

The closest in technical essence to the claimed solution is the detector [Borisov V.I. et al. Spatial and probabilistic-temporal characteristics of the effectiveness of response interference stations when suppressing radio communication systems. / Ed. V.I. Borisov. - M .: RadioSoft, 2008 .-- pic. 2.6.1, p. 87] signals in noise of unknown intensity, maintaining a constant level of false alarms (PULT) and deciding on the Neumann-Pearson criterion, containing a fast Fourier transform processor (FFT), M parallel channels of incoherent processing, each of which includes parallel-connected cosine and sine circuits transformations (quadrature signal transformations), the first and second quadrator and adder, while the inputs of the cosine and sine transform circuits are combined and are the channel input incoherently processing, while the output of the cosine transform circuit is connected to the input of the first quadrator, and the output of the sine transform circuit is connected to the input of the second quadrator, while the outputs of the first and second quadrator are connected to the first and second inputs of the adder, respectively, the output of which is the output of the processing channel, while the output of each of the M channels is the corresponding input of the M-channel maximum selection circuit (CBM) and M-channel drive, the output of which is connected to the first input of the second multiplier, the second input which is connected to the output of the register of storage of the averaging coefficient 1 / M, and the output of the second multiplier is connected to the first input of the first multiplier, the second input of which is connected to the output of the storage register of the value of the function that determines the level of the detection threshold in accordance with the required value of the probability of false alarm and the measured value average dispersion of noise, while the output of the first multiplier is connected to the second input of the comparison circuit, the first input of which is connected to the second output of the CBM, the first output of which is Inonii the first input of the electronic key, the second input of which is connected to the first output of the comparison circuit, which is the output of the detector.

The disadvantage of such a detector is that the remote control is provided only by measuring the variance of the internal noise of the receiver and detector. This means that, in the event of a change in the intensity of noise (interference) at the input of the receiver, the specified level of the detection threshold will not correspond to the actual jamming and signaling situation and will not provide the required values of the detection probabilities and false alarm.

The technical result of the invention is to increase the sensitivity of a digital detector of a panoramic signal receiver with a random amplitude and initial phase in noise conditions of unknown intensity with a remote control based on a decrease in the threshold signal-to-noise ratio at the input, which determines its sensitivity for given values of detection probability and false alarm, due to the implementation of the digital method for measuring the average noise variance in the signal detection channel and its compensation by algorithmic subtraction on input threshold block. This corresponds to an increase in the detection range of a radio emission source (IRI) in the presence of an IRI signal, and provides a reduction in the time of analysis of the electronic situation in a given analyzed frequency band for an a priori unknown load of the IRI frequency band, as well as providing a REMP in accordance with the given probabilities of detection and false alarm in the case of lack of an IRI signal.

, соединены соответственно с соответствующими выходами процессора БПФ и входами СВМ, последовательно соединенные регистр хранения коэффициента усреднения 1/М, четвертый перемножитель, третий перемножитель, схема сравнения и электронный ключ, а также накопитель, имеющий М входов, выход которого соединен с вторым входом четвертого перемножителя, регистр хранения значения функции, определяющей уровень порога обнаружения, выход которого соединен с вторым входом третьего перемножителя, вторые входы электронного ключа и схемы сравнения соединены соответственно с первым и вторым выходом СВМ, а выходы электронного ключа и схемы сравнения являются выходами устройства, дополнительно введены М каналов когерентной обработки сигнала, каждый из которых содержит последовательно соединенные цифровую линию задержки (ЦЛЗ), первый перемножитель, накопитель, второй перемножитель, первую и вторую схемы вычитания, а также регистр хранения коэффициента усреднения 1/Н, выход которого соединен с вторым входом второго перемножителя, объединенные вторые входы первой и второй схем вычитания m-го канала когерентной обработки соединены с выходом сумматора соответствующего канала квадратурной обработки, при этом выход первой схемы вычитания соединен - с соответствующим входом накопителя, имеющего М входов, а выход второй схемы вычитания - с соответствующим входом СВМ, при этом вход ЦЛЗ m-го канала когерентной обработки объединен со вторым входом первого перемножителя и соединен с выходом схемы косинусного преобразования соответствующего канала квадратурной обработки, третья схема вычитания первый вход которой соединен с выходом третьего перемножителя, второй вход с выходом четвертого перемножителя, а выход с первым входом схемы сравнения.The technical result is achieved by the fact that in the known digital evaluation and correlation compensation detector containing an FFT processor having M outputs, M quadrature processing channels, each of which consists of cosine and sine transform circuits, the first and second quadrator, adder, while the inputs cosine and sine transform circuits are combined and connected to the corresponding outputs of the FFT processor, a maximum selection circuit (CBM) having M inputs, while the input and output of the m-th quadrature processing channel and where $$m=\overline{\mathrm{one}...M}$$

are connected respectively to the corresponding outputs of the FFT processor and the inputs of the CBM, serially connected averaging coefficient storage register 1 / M, a fourth multiplier, a third multiplier, a comparison circuit and an electronic key, as well as a drive having M inputs, the output of which is connected to the second input of the fourth multiplier , a register for storing the value of a function that determines the level of the detection threshold, the output of which is connected to the second input of the third multiplier, the second inputs of the electronic key and soy comparison circuit respectively, with the first and second outputs of the CBM, and the outputs of the electronic key and the comparison circuit are the outputs of the device, M channels of coherent signal processing are additionally introduced, each of which contains a digital delay line (DLC) connected in series, the first multiplier, the drive, the second multiplier, the first and a second subtraction circuit, as well as an averaging coefficient storage register 1 / N, the output of which is connected to the second input of the second multiplier, the combined second inputs of the first and second subtraction circuits of the mth channel of coherent processing are connected to the output of the adder of the corresponding channel of quadrature processing, while the output of the first subtraction circuit is connected to the corresponding input of the drive having M inputs, and the output of the second subtraction circuit is connected to the corresponding input of the CBM, while the input of the CLM of the mth the coherent processing channel is combined with the second input of the first multiplier and connected to the output of the cosine transform circuit of the corresponding quadrature processing channel, the third subtraction circuit of which the first input is connected to the output House third multiplier, a second input from the output of the fourth multiplier and the output of the first input of the comparator circuit.

The essence of the invention lies in the fact that the coherent signal processing channel and the third subtraction circuit, additionally introduced into each frequency channel of the detector, allow simultaneous separate measurement of the average dispersion of the total noise in the detection channel, regardless of the presence of the signal, and the average signal power. This allows: firstly, algorithmically by subtraction, to compensate for the measured value of the average dispersion of the total noise and, thus, in the absence of a signal, reduce the level of false alarms, and if it is present, reduce the threshold signal-to-noise ratio at the input of a digital detector of a panoramic receiver that determines it sensitivity at given values of the probability of detection and false alarm; secondly, to adaptively change the level of the detection threshold, in accordance with the actual jamming and signaling conditions and the false alarm and detection probabilities specified by the Neumann-Pearson criterion, and thereby ensure a constant level of false alarms at the detector output, taking into account compensation for the noise level .

In FIG. 1 is a functional diagram of a digital estimation-correlation compensation detector, where the following notation is introduced:

1 - FFT processor;

2 is a diagram of a cosine transform;

3 is a sine conversion circuit;

4 - CLP;

5 - the first multiplier;

6 - the first quadrator;

7 - the second quadrator;

8 - drive;

9 - adder;

10 - second multiplier;

11 - register storage averaging coefficient 1 / N;

12 is a first subtraction scheme;

13 is a second subtraction scheme;

14-CBM;

15 - drive having M inputs;

16 - electronic key;

17 is a comparison diagram;

18 is a third subtraction scheme;

19 - the third multiplier;

20 - the fourth multiplier;

21 - register storage averaging coefficient 1 / M;

22 is a register storing the value of a function that determines the level of the detection threshold.

, соединены соответственно с соответствующими выходами процессора БПФ 1 и входами СВМ 14, последовательно соединенные регистр хранения коэффициента усреднения 1/М 21, четвертый перемножитель 20, третий перемножитель 19, схема сравнения 17 и электронный ключ 16, а также накопитель 15, имеющий М входов, выход которого соединен со вторым входом четвертого перемножителя 20, регистр хранения значения функции, определяющей уровень порога обнаружения 22, выход которого соединен со вторым входом третьего перемножителя 19, вторые входы электронного ключа 16 и схемы сравнения 17 соединены соответственно с первым и вторым выходом СВМ 14, а выходы электронного ключа 16 и схемы сравнения 17 являются выходами устройства, М каналов когерентной обработки сигнала, каждый из которых содержит последовательно соединенные ЦЛЗ 4, первый перемножитель 5, накопитель 8, накапливающий Н отсчетов за время накопления T_нак=H·Δt_дискр., где Δt_дискр. - интервал дискретизации, второй перемножитель 10, первую 12 и вторую 13 схемы вычитания, а также регистр хранения коэффициента усреднения 1/Н 11, выход которого соединен с вторым входом второго перемножителя 10, объединенные вторые входы схем вычитания 12, 13 m-го канала когерентной обработки соединены с выходом сумматора 9 соответствующего канала квадратурной обработки, при этом выход первой схемы вычитания 12 соединен - с соответствующим входом накопителя 15, имеющего М входов, а выход второй схемы вычитания 13 - с соответствующим входом СВМ 14, при этом вход ЦЛЗ 4 m-го канала когерентной обработки объединен со вторым входом первого перемножителя 5 и соединен с выходом схемы косинусного преобразования 2 соответствующего канала квадратурной обработки, третья схема вычитания 18 первый вход которой соединен с выходом третьего перемножителя 19, второй вход с выходом четвертого перемножителя 20, а выход с первым входом схемы сравнения 17.The inventive device comprises an FFT processor 1 having M outputs, M quadrature processing channels, each of which consists of cosine 2 and sine 3 conversion circuits, the first 6 and second 7 quadrator, adder 9, while the inputs of the cosine 2 and sine 3 conversion circuits combined and connected to the corresponding outputs of the processor FFT 1, CBM 14 having M inputs, the input and output of the m-th channel of quadrature processing, where $$m=\overline{\mathrm{one}...M}$$

are connected respectively to the corresponding outputs of the FFT processor 1 and the inputs of the CBM 14, sequentially connected to the averaging coefficient storage register 1 / M 21, the fourth multiplier 20, the third multiplier 19, the comparison circuit 17 and the electronic key 16, as well as the drive 15 having M inputs, the output of which is connected to the second input of the fourth multiplier 20, a register for storing the value of the function that determines the level of the detection threshold 22, the output of which is connected to the second input of the third multiplier 19, the second inputs of the electronic key 16 and comparison circuits 17 are connected respectively to the first and second outputs of CBM 14, and the outputs of the electronic key 16 and comparison circuits 17 are outputs of the device, M channels of coherent signal processing, each of which contains series-connected DLC 4, the first multiplier 5, storage 8, accumulating H counts the accumulation time T for _nak = H · Δt _Tr. where Δt _disc. - the sampling interval, the second multiplier 10, the first 12 and second 13 of the subtraction circuit, as well as the register of storage of the averaging coefficient 1 / H 11, the output of which is connected to the second input of the second multiplier 10, the combined second inputs of the subtraction circuits 12, 13 of the mth coherent channel processing are connected to the output of the adder 9 of the corresponding quadrature processing channel, while the output of the first subtraction circuit 12 is connected to the corresponding input of the drive 15 having M inputs, and the output of the second subtraction circuit 13 is connected to the corresponding input of the CBM 14, when the input of the DLC 4 of the mth coherent processing channel is combined with the second input of the first multiplier 5 and connected to the output of the cosine transform circuit 2 of the corresponding quadrature processing channel, the third subtraction circuit 18, the first input of which is connected to the output of the third multiplier 19, the second input with the output of the fourth multiplier 20, and the output with the first input of the comparison circuit 17.

DLC 4 is designed for a time delay in each of the M channels of the real part X ₁ (k) = ReX (k), where k is the FFT argument in the spectral region, the set of samples of the additive mixture of signal s (t) and noise (noise) n (t ) from the output of the cosine transform scheme 2 for a duration longer than the correlation time of the noise component.

The first multiplier 5 is designed to multiply the real part X ₁ (k) _r = ReX (k) _{r of the} set of spectral samples taken at the rth moment of time, with its copy X ₁ (k) _{r + i} = ReX (k) _{r + i} shifted in time, where r is the FFT argument in the time domain, i is the time shift of the samples, respectively.

The drive 8 is designed to accumulate the values of the product X ₃ (k) = X ₁ (k) _r X ₁ (k) _{r + I.}

.The second multiplier 10 is designed to multiply the sum of the products X ₃ (k) = X ₁ (k) _r X ₁ (k) _{r + i} with the averaging coefficient accumulated in drive 8 $$K=\frac{\mathrm{one}}{H}$$

.

.Storage register 11 is designed to store the averaging coefficient $$K=\frac{\mathrm{one}}{H}$$

.

аддитивной смеси сигнала s(t) и шума (помех) n(t) оценки автокорреляционной функции $$P_{k_{с}}\stackrel{*}{\left({\omega }_k\right)}$$

одной сигнальной составляющей s(t) на частоте ω_k и подачи результата вычитания в виде значения оценки мощности $$P_{k_{ш}}\left({\omega }_k\right)$$

шума (помех) n(t) на вход накопителя 15, имеющего М входов и вход второй схемы вычитания 13.The first subtraction scheme 12 is designed to subtract from the power estimate $$P_{k_{\mathrm{from}+w}}\left({\omega }_k\right)$$

additive mixture of signal s (t) and noise (interference) n (t) estimates of the autocorrelation function $$P_{k_{\mathrm{from}}}\stackrel{*}{\left({\omega }_k\right)}$$

one signal component s (t) at a frequency ω _k and supplying the subtraction result in the form of a power estimation value $$P_{k_w}\left({\omega }_k\right)$$

noise (interference) n (t) to the input of the drive 15 having M inputs and the input of the second subtraction circuit 13.

аддитивной смеси сигнала s(t) и шума (помех) n(t) оценки мощности $$P_{k_{ш}}\left({\omega }_k\right)$$

одной шумовой (помеховой) n(t) составляющей, полученной на выходе первой схемы вычитания и подачи результата вычитания в виде значения оценки мощности $$P_{k_{с}}\left({\omega }_k\right)$$

сигнала s(t) на частоте ω_k на вход СВМ 14.The second subtraction scheme 13 is designed to subtract from the power estimate $$P_{k_{\mathrm{from}+w}}\left({\omega }_k\right)$$

additive mixture of signal s (t) and noise (interference) n (t) power estimates $$P_{k_w}\left({\omega }_k\right)$$

one noise (interference) n (t) component obtained at the output of the first subtraction and supply of the subtraction result in the form of a power estimation value $$P_{k_{\mathrm{from}}}\left({\omega }_k\right)$$

signal s (t) at a frequency ω _k to the input of CBM 14.

одной шумовой (помеховой) n(t) составляющей.The third subtraction circuit 18 is designed to subtract from the calculated value of the detection threshold level at the output of the third multiplier 19 power estimates $$P_{k_w}\left({\omega }_k\right)$$

one noise (interference) n (t) component.

The inventive device operates as follows.

, где аргументы в спектральной 2πkΔƒ и временной rΔt областях обозначаются через k и r. После этого с каждого из М выходов процессора БПФ 1 совокупность отсчетов $$X\left(k\right)={{\displaystyle \sum _{m=0}^{L-1}x\left(r\right)e}}^{-\frac{j2\pi kr}{L}}$$

поступает на входы М параллельных каналов некогерентной обработки, где осуществляется их косинусное $$X_1\left(k\right)=\mathrm{Re}X\left(k\right)={\displaystyle \sum _{n=0}^{N-1}x\left(n\right)\cos n{\omega }_k}$$

и синусное $$X_2\left(k\right)=\mathrm{Im}X\left(k\right)={\displaystyle \sum _{n=0}^{N-1}x\left(n\right)\sin n{\omega }_k}$$

преобразование в соответствующих схемах 2 и 3. Результаты косинусного и синусного преобразования, представляющие собой действительную X₁(k)=ReX(k) и мнимую Х₂(k)=ImХ(k) части совокупности отсчетов аддитивной смеси сигнала s(t) и шума (помех) n(t), с выходов соответствующих схем косинусного 2 и синусного 3 преобразования поступают на первый 6 и второй 7 квадраторы. С выходов первого 6 и второго 7 квадраторов квадраты действительной $$X_1^2\left(k\right)={\left(\mathrm{Re}X\left(k\right)\right)}^2$$

и мнимой части $$X_2^2\left(k\right)={\left(\mathrm{Im}X\left(k\right)\right)}^2$$

совокупности отсчетов аддитивной смеси сигнала s(t) и шума (помех) n(t) поступают на сумматор 9, на выходе которого формируется отсчет $$Y_{k_{с+ш}}=X_1^2\left(k\right)+X_2^2\left(k\right)$$

с уровнем равным оценке мощности $$P_{k_{с+ш}}\left({\omega }_k\right)$$

аддитивной смеси сигнала s(t) и шума (помех) n(t) на частоте ω_k.The input of the FFT processor 1 receives a combination of L time samples X _i (t) of the additive mixture of the signal s (t) and noise (interference) n (t). In the FFT processor 1, the set L of time samples X _i (t) of the additive mixture of the signal and noise is converted using the FFT algorithm. Thus, at the output of each of the M frequency channels of the FFT processor 1, a set of samples is formed $$X\left(k\right)={{\displaystyle \sum _{m=0}^{L-\mathrm{one}}x\left(r\right)e}}^{-\frac{j2\pi kr}{L}}$$

, where the arguments in the spectral 2πkΔƒ and temporal rΔt regions are denoted by k and r. After that, from each of the M outputs of the FFT processor 1, a set of samples $$X\left(k\right)={{\displaystyle \sum _{m=0}^{L-\mathrm{one}}x\left(r\right)e}}^{-\frac{j2\pi kr}{L}}$$

arrives at the inputs of M parallel channels of incoherent processing, where their cosine $$X_{\mathrm{one}}\left(k\right)=\mathrm{Re}X\left(k\right)={\displaystyle \sum _{n=0}^{N-\mathrm{one}}x\left(n\right)\cos n{\omega }_k}$$

and sinus $$X_2\left(k\right)=\mathrm{Im}X\left(k\right)={\displaystyle \sum _{n=0}^{N-\mathrm{one}}x\left(n\right)\sin n{\omega }_k}$$

transformation in the corresponding schemes 2 and 3. The results of the cosine and sine transforms, which are the real X ₁ (k) = ReX (k) and the imaginary X ₂ (k) = ImX (k) parts of the set of samples of the additive signal mixture s (t) and noise (interference) n (t), from the outputs of the corresponding cosine 2 and sine 3 conversion circuits, they go to the first 6 and second 7 quadrators. From the outputs of the first 6 and second 7 quadrators, the squares of the real $$X_{\mathrm{one}}^2\left(k\right)={\left(\mathrm{Re}X\left(k\right)\right)}^2$$

and imaginary part $$X_2^2\left(k\right)={\left(\mathrm{Im}X\left(k\right)\right)}^2$$

the set of samples of the additive mixture of the signal s (t) and noise (interference) n (t) are fed to the adder 9, at the output of which a sample is formed $$Y_{k_{\mathrm{from}+w}}=X_{\mathrm{one}}^2\left(k\right)+X_2^2\left(k\right)$$

with a level equal to the power rating $$P_{k_{\mathrm{from}+w}}\left({\omega }_k\right)$$

additive mixture of signal s (t) and noise (interference) n (t) at a frequency ω _k .

From the output of the cosine transform scheme 2 in each of the M channels of incoherent processing, the real part X ₁ (k) = ReX (k) of the set of samples of the additive mixture of signal s (t) and noise (interference) n (t) is input to each of M additional coherent processing channels to the first and second inputs of the first multiplier 5, and to its second input through the CLL 4 with a delay time greater than the correlation time of the noise component, determined by the following formula:

where ƒ _discre = 2Δƒ _s is the sampling frequency of the input signal, determined in accordance with the Kotelnikov theorem, the width of the signal spectrum is 2Δƒ _s .

значений произведения Х₃(k)=Х₁(k)_rХ₁(k)_r+1 в течение времени накопления Т_нак. С выхода накопителя 8 значение суммы $${\displaystyle \sum _{j=1}^H{X}_3}\left(k\right)$$

поступает на вход перемножителя 10, где осуществляется ее перемножение с коэффициентом усреднения $$K=\frac{1}{H}$$

, поступающего с выхода регистра хранения коэффициента усреднения 1/Н 11.Thus, in the first multiplier 5, the real part X ₁ (k) _r = ReX (k) _{r of the} set of spectral samples taken at the rth moment of time is multiplied with its copy X ₁ (k) _{r + i} = ReX (k ) _{r + i} time-shifted X ₃ (k) = X ₁ (k) _r X ₁ (k) _{r + i} . From the output of the multiplier 5, the product X ₃ (k) = X ₁ (k) _r X ₁ (k) _{r + i} goes to the input of the drive 8, where the accumulation $${\displaystyle \sum _{j=\mathrm{one}}^H{X}_3}\left(k\right)$$

values of the product X ₃ (k) = X ₁ (k) _r X ₁ (k) _{r + 1} during the accumulation time T _nak . From the output of the drive 8 value of the sum $${\displaystyle \sum _{j=\mathrm{one}}^H{X}_3}\left(k\right)$$

enters the input of the multiplier 10, where it is multiplied with an averaging coefficient $$K=\frac{\mathrm{one}}{H}$$

coming from the output of the register of storage of the averaging coefficient 1 / H 11.

сигнальной составляющей, пропорциональной мощности сигнальной составляющей аддитивной смеси сигнала s(t) и шума (помех) n(t) на частоте ω_k:Thus, at the output of each additional coherent processing channel (output of multiplier 10), an estimate of the autocorrelation function is formed $$P_{k_{\mathrm{from}}}\stackrel{*}{\left({\omega }_k\right)}$$

the signal component proportional to the power of the signal component of the additive mixture of the signal s (t) and noise (interference) n (t) at a frequency ω _k :

аддитивной смеси сигнала s(t) и шума (помех) n(t) и автокорреляционной функции $$K_{k_c}=P_{k_{с}}\stackrel{*}{\left({\omega }_k\right)}$$

одной сигнальной составляющей аддитивной смеси сигнала s(t) и шума (помех) n(t) на частоте ω_k поступаю на первый и второй входы первой схемы вычитания 12, где осуществляете оценка средней мощности $$P_{k_{ш}}\left({\omega }_k\right)$$

шумовой (помеховой) n(t) составляющее аддитивной смеси сигнала s(t) и шума (помех) n(t) независимо от наличие сигнала на данной частоте:From the output of each of the M channels of incoherent (output of adder 9) and coherent processing (output of multiplier 10) values of power estimates $$P_{k_{\mathrm{from}+w}}\left({\omega }_k\right)$$

additive mixture of signal s (t) and noise (interference) n (t) and autocorrelation function $$K_{k_c}=P_{k_{\mathrm{from}}}\stackrel{*}{\left({\omega }_k\right)}$$

one signal component of the additive mixture of the signal s (t) and noise (interference) n (t) at a frequency ω _{k I} arrive at the first and second inputs of the first subtraction circuit 12, where you evaluate the average power $$P_{k_w}\left({\omega }_k\right)$$

noise (interference) n (t) component of the additive mixture of signal s (t) and noise (interference) n (t) regardless of the presence of a signal at a given frequency:

аддитивной смеси сигнала s(t) и шума (помех) n(t) на частоте ω_k и мощности $$P_{k_{ш}}\left({\omega }_k\right)$$

шумовой (помеховой) n(t) составляющей поступают на входы второй схемы вычитания 13, где осуществляется оценка средней мощности $$P_{k_{с}}\left({\omega }_k\right)$$

полезного сигнала s(t) на данной частоте:From the output of each of the M channels of incoherent signal processing (the output of the adder 9) and the output of the first subtraction circuit 12, the values of the power estimates $$P_{k_{\mathrm{from}+w}}\left({\omega }_k\right)$$

additive mixture of signal s (t) and noise (interference) n (t) at frequency ω _k and power $$P_{k_w}\left({\omega }_k\right)$$

the noise (interference) n (t) component is fed to the inputs of the second subtraction circuit 13, where the average power is estimated $$P_{k_{\mathrm{from}}}\left({\omega }_k\right)$$

useful signal s (t) at a given frequency:

полезного сигнала s(t) поступает на соответствующий вход СВМ 14, где осуществляется выбор максимального значения средней мощности $$P_{k_{с}}\left({\omega }_k\right)$$

полезного сигнала s(t) и номера соответствующего канала обработки, определяющего частоту сигнала. С выхода каждой из М схем вычитания 12 значения оценок средней мощности шумовой (помеховой) составляющей $$Y_{k_{ш}}=P_{k_{ш}}\left({\omega }_k\right)$$

поступают на соответствующие входы накопителя 15, имеющего М входов, где осуществляется их суммирование по всем анализируемым частотным каналам $${\displaystyle \sum _{i=1}^M{Y}_{k_{ш}}\left({\omega }_k\right)}$$

. С выхода М-канального накопителя 15 значение суммы $${\displaystyle \sum _{i=1}^M{Y}_{k_{ш}}\left({\omega }_k\right)}$$

поступает на вход четвертого перемножителя 20, где осуществляется перемножение с коэффициентом усреднения $$K=\frac{1}{M}$$

, поступающего с выхода регистра хранения коэффициента усреднения 1/М 21:From the output of each of the M second subtraction schemes 13 in each processing channel, the value of the average power estimate $$P_{k_{\mathrm{from}}}\left({\omega }_k\right)$$

the useful signal s (t) is supplied to the corresponding input of the CBM 14, where the maximum value of the average power is selected $$P_{k_{\mathrm{from}}}\left({\omega }_k\right)$$

useful signal s (t) and the number of the corresponding processing channel that determines the frequency of the signal. From the output of each of the M subtraction schemes, 12 values of estimates of the average power of the noise (interference) component $$Y_{k_w}=P_{k_w}\left({\omega }_k\right)$$

arrive at the corresponding inputs of the drive 15, having M inputs, where they are summed over all the analyzed frequency channels $${\displaystyle \sum _{i=\mathrm{one}}^M{Y}_{k_w}\left({\omega }_k\right)}$$

. From the output of the M-channel drive 15 value of the sum $${\displaystyle \sum _{i=\mathrm{one}}^M{Y}_{k_w}\left({\omega }_k\right)}$$

arrives at the input of the fourth multiplier 20, where the multiplication is carried out with an averaging coefficient $$K=\frac{\mathrm{one}}{M}$$

coming from the output of the register of storage of the averaging coefficient 1 / M 21:

. $$<P_{k_w}>=\frac{\mathrm{one}}{M}{\displaystyle \sum _{i=\mathrm{one}}^M{Y}_{k_w}}\left({\omega }_k\right)$$

.

поступает на вход третьего перемножителя 19, где осуществляется ее перемножение со значением функции, определяющей уровень порога обнаружения в соответствии с заданной по критерию Неймана-Пирсона вероятностью ложной тревоги Р_ЛТ с выхода регистра хранения 22 и на второй вход третьей схемы вычитания 18.From the output of the fourth multiplier 20, the average value of the power of the noise (interference) component over the analyzed frequency band $$<P_{k_w}>=\frac{\mathrm{one}}{M}{\displaystyle \sum _{i=\mathrm{one}}^M{Y}_{k_w}}\left({\omega }_k\right)$$

is input to the third multiplier 19 where it is carried out the multiplication with the value function, which determines the detection threshold level according to the predetermined false alarm on the Neyman-Pearson criterion probability P _LT output from storage register 22 and to a second input of the third subtractor circuit 18.

поступает на первый вход третьей схемы вычитания 18, где осуществляется адаптивное изменение уровня порога обнаружения в соответствии с реальной помехово-сигнальной обстановкой и уровнем компенсации средней мощности шума $$<P_{k_{ш}}>=\frac{1}{M}{\displaystyle \sum _{i=1}^M{Y}_{k_{ш}}}\left({\omega }_k\right)$$

на входе СВМ 14, а с ее выхода значение уровня порога поступает на второй вход схемы сравнения 17 в качестве порогового напряжения. При этом в схеме сравнения 17 осуществляется сравнение максимального значения мощности сигнала $$P_{k_{с}}\left({\omega }_k\right)$$

, поступающего со второго выхода СВМ 14 на первый вход схемы сравнения 17 с пороговым напряжением на ее втором входе. При превышении порогового напряжения в схеме сравнения 17 значением мощности сигнала $$P_{k_{с}}\left({\omega }_k\right)$$

принимается решение о наличии сигнала, а в противном случае о его отсутствии. При этом на выходе схемы сравнения 17 формируется сигнальный отсчет единичного или нулевого уровня соответственно, а сам сигнальный отсчет поступает в качестве управляющего сигнала на электронный ключ 16 для считывания номера соответствующего канала обработки, где установлен факт наличия сигнала. При этом выход схемы сравнения 17 и электронного ключа 16 являются первым и вторым выходами заявляемого устройства.Thus, the output of the third multiplier 19, the value of the detection threshold level determined by a predetermined Neyman-Pearson criterion probability of false alarm P _LT and the measured power value average for the frequency band of the analyzed noise (interference) component $$<P_{k_w}>=\frac{\mathrm{one}}{M}{\displaystyle \sum _{i=\mathrm{one}}^M{Y}_{k_w}}\left({\omega }_k\right)$$

arrives at the first input of the third subtraction circuit 18, where the adaptive change in the level of the detection threshold is carried out in accordance with the actual noise-signal situation and the level of compensation of the average noise power $$<P_{k_w}>=\frac{\mathrm{one}}{M}{\displaystyle \sum _{i=\mathrm{one}}^M{Y}_{k_w}}\left({\omega }_k\right)$$

at the input of the CBM 14, and from its output, the threshold level value is supplied to the second input of the comparison circuit 17 as a threshold voltage. Moreover, in the comparison circuit 17, the maximum value of the signal power is compared $$P_{k_{\mathrm{from}}}\left({\omega }_k\right)$$

coming from the second output of the CBM 14 to the first input of the comparison circuit 17 with a threshold voltage at its second input. If the threshold voltage is exceeded in the comparison circuit 17, the signal power value $$P_{k_{\mathrm{from}}}\left({\omega }_k\right)$$

a decision is made on the presence of a signal, and otherwise on its absence. At the same time, at the output of the comparison circuit 17, a signal sample of a single or zero level is formed, respectively, and the signal sample is supplied as a control signal to an electronic key 16 for reading the number of the corresponding processing channel, where the fact of the signal is established. The output of the comparison circuit 17 and the electronic key 16 are the first and second outputs of the inventive device.

Register 11 storage averaging coefficient 1 / N, register 19 storing averaging coefficient 1 / M, register 20 storing the value of the function that determines the level of the detection threshold, can be implemented on the basis of a microcontroller type ATMEGA 8515 company ATMEL.

The electronic key 15 can be made on the basis of well-known practical electronic key circuits (given, for example, in the book. The use of precision analog microcircuits / A.G. Alekseenko, E.A. Colombet, G.I. Starodub. - Second ed., Revised And add. - M.: Radio and communications, 1985, p. 205-208).

The inventive device allows you to:

firstly, to ensure due to the implementation in each channel of the processing, in the process of detecting the signal by the detector, measuring the average power of the total interference (noise) with its subsequent compensation at the input of the comparison circuit, which reduces the likelihood of a false alarm at its output and, as a result , to reduce the time of analysis of the electronic environment;

secondly, given the same requirements for the values of the probability of false alarm and signal detection, unlike the prototype, it allows, by compensating for the measured value of the average power of the total noise (noise) at the input of the comparison circuit, to lower the level of the detection threshold (threshold voltage), and, therefore, it allows to reduce the threshold signal-to-noise ratio, which determines the sensitivity of the receiver to detection, and, as a consequence, to increase the detection range of signals of electronic devices;

thirdly, to ensure the constancy of the set value of the false alarm probability Р _ЛТ regardless of changes in the spectral density of noise at the detector input by introducing an additional coherent processing channel in each channel, which makes it possible to measure the average power of the noise component in each channel regardless of the presence of a signal in it.

Thus, the totality of the introduced blocks and the relationships between them allows for an increase in the detection range of signals based on a decrease in the threshold signal-to-noise ratio, which determines the sensitivity of the receiver; reduce the assay time electronic situation by reducing the probability of false alarm when the compensation of the measured values of the average power aggregate interference (noise) at the input of the comparison circuit and to ensure constancy of the set values of the false alarm probability P _LT and the probability of signal detection scout radio source, due to the adaptive change level detection threshold based on the measurement and compensation of the average noise power and / or interference in each frequency processing channel, which was absent in rototype.

Claims (1)

A digital correlation compensation detector containing an FFT processor having M outputs, M quadrature channels, each of which consists of cosine and sine transform circuits, a first and second quadrator, an adder, while the inputs of the cosine and sine transform circuits are combined and connected to the corresponding outputs of the FFT processor, a maximum selection circuit (CBM) having M inputs, the input and output of the m-th quadrature processing channel, where

are connected respectively to the corresponding outputs of the FFT processor and the inputs of the CBM, serially connected averaging coefficient storage register 1 / M, a fourth multiplier, a third multiplier, a comparison circuit and an electronic key, as well as a drive having M inputs, the output of which is connected to the second input of the fourth multiplier , a register for storing the value of a function that determines the level of the detection threshold, the output of which is connected to the second input of the third multiplier, the second inputs of the electronic key and soy comparison circuit respectively, with the first and second outputs of the CBM, and the outputs of the electronic key and the comparison circuit are the outputs of the device, characterized in that M channels of coherent signal processing are additionally introduced, each of which contains a digital delay line (DLC) connected in series, a first multiplier, a drive, the second multiplier, the first and second subtraction schemes, as well as the storage register of the averaging coefficient 1 / N, the output of which is connected to the second input of the second multiplier, the combined second inputs of the first and two subtraction schemes of the mth coherent processing channel are connected to the output of the adder of the corresponding quadrature processing channel, while the output of the first subtraction circuit is connected to the corresponding input of the drive having M inputs, and the output of the second subtraction circuit is connected to the corresponding input of the CBM, while the input of the m-th coherent processing channel is combined with the second input of the first multiplier and connected to the output of the cosine transform circuit of the corresponding quadrature processing channel, the third subtraction circuit, the first input otorrhea connected to the output of the third multiplier, the second input - to the output of the fourth multiplier, and an output - to the first input of the comparison circuit.