RU2535198C1 - Method and device for reference signal generation by computers in systems of frequency and phase synchronisation of broadband communication systems - Google Patents

Abstract

FIELD: radio engineering, communication.

SUBSTANCE: device contains control module, to which the low-pass filter's output of time-base ring is connected. Corresponding outputs of the filter are connected to control inputs of computer, correlator and time-base error ring low-pass filter. Phase and frequency error detectors are controllable. Their control inputs are connected to corresponding outputs of the control device. The phase error detector outputs are connected to summation unit inputs, and the output of time-base error ring low-pass filter is connected to the frequency error detector input. Quadrature outputs of noise-like signal track receiver are connected to the corresponding inputs of complex multiplier. Output of the latter is connected to correlator input via bus. The correlator output is connected to signal parameter error detector input.

EFFECT: generation and correction of reference signal for wide range of desynchronisation and signal/noise ratio values.

4 cl, 4 dwg

Description

The present invention relates to the field of broadband radio communication systems (SHSS) and can be used, in particular, in mobile and stationary stations of communication systems with noise-like signals (SHPS) to form a reference signal and adjust its parameters (frequency and phase) in a frequency-locked loop ( AFC) and in a phase locked loop (PLL) computing (software) means.

An important issue in the process of performing search and synchronization procedures in broadband communication systems is the choice of a compromise method for the implementation (execution) of reference signal sources based on hardware or software. Currently, the priority is the creation and expansion of the list of universal processing tools based on the software principles of smart radio, while reducing the share of highly specialized hardware. This approach allows us to obtain universal platforms that organize signal processing in accordance with the required algorithms to a greater extent based on reprogramming and provide a reduction in the dimensions of the equipment used and the means for its development and production.

The following basic methods for generating reference signals in automatic control systems are known.

The traditional (classical) method of forming the reference signal in automatic control systems consists in the direct use of hardware, such as controlled clock generators, voltage controlled harmonic generators (VCO), etc. [Shakhgildyan V.V., Lyakhovkin A.A. . Phase locked loop systems / V.V. Shahgildyan, A.A. Lyakhovkin. - M.: “Communication”, 1972. - 447 p., Pervachev S.V. Radio Automation / S.V. Pervachev. - M.: - “Radio and Communications”, 1982. - 296 p., Zhuravlev V.I. Search and synchronization in broadband systems / V.I. Zhuravlev. - M .: - “Radio and communications”, 1986. - 240 p., Zhodzishsky M.I. Digital phase synchronization systems / M.I. Zhodzishsky, Strength-Novitsky S.Yu., Prasolov V.A. et al., ed. M.I. Zhodzishsky. - M .: "Sov.Radio", 1980. - 208 p. and etc.].

The main disadvantages of this approach are a rather limited area of control of the parameters and shape of the generated signal, low tuning speed, temporary and frequency instability of parameters, and a set of specific application features.

In different areas of electronics and digital signal processing, a different approach to generating reference signals by the direct digital synthesis method (Direct Digital Synthesizer - DDS) is widely used [Chipovod's blog www.chipovod.ru ,, Ridiko Leonid Ivanovich wubblick@yahoo.com et al.].

DDS generators allow you to form:

- signals with a large frequency tuning range (from zero to hundreds of MHz) and a small tuning step (hundredths of a hertz);

- quadrature signals and signals with an arbitrary phase shift;

- tuning the frequency of the output signals with a high transient rate;

- periodic signals of arbitrary shape.

Such great opportunities have made digital DDS signal synthesizers attractive for use in a wide variety of applications, including automatic control systems. To implement the DDS generator, you can use programmable logic (FPGAs, Field Programmable Gate Array (FPGA), for example, such as Virtex-7) or microprocessors (for example, 1892 VM3T (Multicore), 1892 VM10Ya (NVcom) and their promising versions).

Using the example of digital reception of a harmonic sinusoidal signal with specified parameters, the basic principle of the DDS signal synthesizer is as follows. Preliminarily, discrete values are formed for N points of the sine wave with a uniform time step equal to the sampling period Δ = 1 / f _T0 , where f _T0 is the reference system clock frequency. Next, the generated discrete values of the sine wave are placed at the addresses in the memory cells of the table. To generate an output signal from the memory cells of the table, the discrete values of a sinusoid are read in the desired sequence using an address counter with a given reference clock frequency.

This method works qualitatively if the required frequency of the output signal is N times less than the reference clock frequency. To generate another output frequency, you must either change the step of enumerating the addresses of the table memory cells, or rebuild the reference clock frequency and dimension of the table, which is technically quite problematic.

A modification of the signal generation procedure, which is useful for simplifying the implementation, is known, which involves the following operations. The recording of discrete values of the sinusoid in the memory cells of the table and their reading are performed not at the same time intervals equal to the sampling period Δ = 1 / f _T0 , but at intervals corresponding to the specified value of the phase change of the output signal. This allows due to the phase linearity and periodicity of the output signal to rationally implement this formation procedure. In this case, the output signal can be restored by taking samples from the table of values at intervals proportional to the output frequency.

Таким образом, существует связь между выходной частотой f и фазой сигнала Δφ.The analytical representation of the output sinusoidal signal has the form x (t) = Asin (ωt + φ ₀ ), where ω is the cyclic frequency, φ ₀ is the initial phase, and A is the amplitude. Then the magnitude of the cyclic frequency sets the rate of change of the total phase φ = φt + φ ₀ , and the following relationships hold:

Thus, there is a relationship between the output frequency f and the phase of the signal Δφ.

The main disadvantages of this method are as follows.

The impossibility of independent and high-quality adjustment of the current frequency and phase of the generated reference signal, since the minimum frequency tuning step directly depends on the ratio of the output and reference clock frequencies. When the frequency of the output signal approaches the reference clock frequency, the step of tuning the frequency and the initial phase becomes unacceptably coarse. Obtaining a smaller step of tuning the frequency and phase by changing the reference clock frequency is a difficult task.

The closest in technical essence to the proposed method for generating (generating) and adjusting the parameters of the reference signal in the automatic frequency control (AFC) system and phase locked loop (PLL) and the device that implements it are the method and device described in [Mohamed K. Nesami, Ph.D., K14CUA. RF Architektures and Digital Signal Processing Aspects of Digital Wireless Transceivers. © 2003. - 511 p., Mohamed_nezami@msn.com], which are taken as a prototype of the method and device of the proposed technical solution.

A method of generating a reference signal and adjusting (tuning) its parameters, proposed in the prototype, is that:

- A continuous input broadband signal at a radio frequency is preliminarily converted into a quadrature complex discrete wideband signal at an intermediate frequency, a time synchronization procedure is performed, and a discrete harmonic complex signal at an intermediate frequency is extracted as a result of phase-shift modulation of the BWS.

- By comparing the parameters of the complex discrete harmonic signal at an intermediate frequency with the parameters of the generated reference discrete signal, an estimate of the relative detuning (error) of the phase and frequency of the reference signal is generated.

- Correct the corresponding parameters of the reference signal by the value of the obtained detuning (error) phase and frequency estimates.

- Next, at each subsequent step of the analysis, the procedure of comparing the parameters of the current input complex discrete harmonic signal at an intermediate frequency and the current discrete reference signal is performed, an estimate of the relative detuning (error) of the phase and frequency is generated, and the current values of the corresponding parameters of the current reference signal are adjusted.

Thus, an iterative procedure for generating a reference signal and adjusting (adjusting) its current parameters is implemented.

The description of the prototype method for generating the reference signal and adjusting (tuning) its parameters fully corresponds to the formal mathematical model given, for example, on pages 94-98 in [Mohamed K. Nesami, Ph.D., K14CUA. RF Architektures and Digital Signal Processing Aspects of Digital Wireless Transceivers. © 2003.-511 pp., Mohamed_nezami@msn.com].

To implement the prototype method, a prototype device can be used, the general structural diagram of which in terms of the AFC (automatic frequency control) and phase lock loop (PLL) is shown in figure 1, where it is indicated:

1 - standard block servo receiver ShPS;

2 - interpolator (correlator);

3 - complex multiplier;

4 - error detector of signal parameters;

4.1 - controlled phase error detector;

4.2 - controlled frequency error detector;

4.3 - temporary error detector;

5 - numerically controlled oscillator (calculator);

6 - adder phase and frequency errors;

7 - low-pass filter (low-pass filter) of the phase error ring;

8 - low-pass filter ring frequency error;

9 - low-pass filter rings time delay errors.

Причем детектор ошибок параметров сигнала 4 состоит из детекторов фазовой 4.1, частотной 4.2 и временной 4.3 ошибки.For clarity, the structural diagram of Fig. 1 is conventionally divided into two generalized functional parts: the standard block of the servo receiver of ШПС 1 and the scheme of procedures for temporary, frequency and phase synchronization of ШПС. The standard block of the ShPS 1 tracking receiver includes a circuit for converting the carrier radio frequency of the input broadband signal to an intermediate frequency (RF / IF) and a circuit for converting the signal from analog to quadrature discrete representation (A / D, quad). The diagram of the time, frequency, and phase synchronization procedures for a NPS consists of an interpolator (correlator) 2, a complex multiplier 3, an error detector for signal parameters 4, a low-pass filter (low-pass filter), a phase error ring 7, an low-pass filter, a frequency error ring 8, an low-pass filter, a time delay error ring 9 , adder of phase and frequency errors 6 and a numerically controlled oscillator (transmitter-generator) 5. As a numerically controlled harmonic signal generator (numerically controlled oscillator - NCO), which forms a reference signal in the prototype, use multiplexer

Moreover, the error detector of signal parameters 4 consists of phase 4.1, frequency 4.2, and temporal 4.3 error detectors.

- оценка текущей фазовой ошибки (расстройки),

- оценка текущей частотной ошибки (расстройки),

- оценка ошибки временной задержки, k - номер шага дискретизации, T_s - временной интервал дискретизации.The following notation is used in the structural diagram of FIG. 1: S _in (t) is the input radio frequency analog ShPS, Re (S _in (kT _s )) and Im (S _in (kT _s )) are the in-phase and quadrature components of the discrete ShSS at the intermediate frequency

- assessment of the current phase error (detuning),

- assessment of the current frequency error (detuning),

is the estimate of the time delay error, k is the sampling step number, T _s is the sampling time interval.

. Выход интерполятора 2 комплексного гармонического сигнала на промежуточной частоте соединен с первым квадратурным входом комплексного перемножителя 3, второй квадратурный вход которого соединен с квадратурным выходом численно управляемого осциллятора (вычислителя) (NCO) 5, вход которого через сумматор 6 фазовой и частотной ошибок и через ФНЧ кольца фазовой ошибки 7 и ФНЧ кольца частотной ошибки 8 соединен с первым и вторым выходами сигналов фазовой и частотной ошибок детектора ошибок параметров сигнала 4. Выход комплексного перемножителя 3 соединен с квадратурным входом детектора ошибок параметров сигнала 4.The input of the standard block of the tracking receiver ШПС 1 is the first input of the device prototype of the input analog broadband radio signal. The first and second quadrature outputs of block 1 are connected to the corresponding first and second quadrature inputs of a broadband discrete signal at an intermediate frequency of an interpolator (correlator) 2, the third input of which through the low-pass filter of the time delay error 9 from the third output of the error parameter detector of signal 4 receives a broadband copy signal at intermediate frequency with estimated time delay

. The output of the complex harmonic signal interpolator 2 at an intermediate frequency is connected to the first quadrature input of the complex multiplier 3, the second quadrature input of which is connected to the quadrature output of a numerically controlled oscillator (computer) (NCO) 5, whose input is through the phase and frequency error adder 6 and through the low-pass filter phase error 7 and the low-pass filter of the frequency error ring 8 is connected to the first and second outputs of the phase and frequency error signals of the error detector of signal parameters 4. Output of the complex multiplier 3 connected to the quadrature input of the signal parameter error detector 4.

The prototype device works as follows.

с третьего выхода детектора ошибок параметров сигнала 4 в интерполяторе (корреляторе) 2 реализуют процедуру временной синхронизации и снятие широкополосной модуляции (как правило, фазовой манипуляции). В результате формируют комплексный дискретный гармонический сигнал на промежуточной частоте. По результатам сравнения параметров комплексного дискретного гармонического сигнала на промежуточной частоте с параметрами сформированного опорного сигнала в цепях:At the first input of the standard block of the tracking receiver ShPS 1 receives an analog broadband signal S _I (t). In this block, the carrier frequency of the input broadband radio signal is transferred to the intermediate frequency, the signal is sampled, and the quadrature components of the discrete input broadband signal are formed. Further, taking into account the estimates of the generated time delay error

from the third output of the error detector of signal parameters 4 in the interpolator (correlator) 2, the procedure of time synchronization and the removal of broadband modulation (usually phase shift keying) are implemented. As a result, a complex discrete harmonic signal is generated at an intermediate frequency. By comparing the parameters of the complex discrete harmonic signal at an intermediate frequency with the parameters of the generated reference signal in the circuits:

1. complex multiplier 3, error detector parameters 4, low-pass filter phase error rings 7,

2. complex multiplier 3, error detector parameters 4, low-pass filter ring frequency error 8,

и сигналу оценки ошибки частоты

вырабатывают суммарную оценку текущей относительной расстройки (ошибки) фазы и частоты опорного сигнала. Далее в соответствие с сигналом оценки суммарной текущей относительной расстройки на выходе численно управляемого осциллятора (вычислителя) (NCO) 5 формируют квадратурный опорный сигнал и осуществляют в нем адаптивное изменение текущих параметров.in the adder phase and frequency errors 6 on the signal evaluation phase error

and a frequency error estimation signal

generate a total estimate of the current relative detuning (error) of the phase and frequency of the reference signal. Then, in accordance with the evaluation signal of the total current relative detuning, a quadrature reference signal is generated at the output of the numerically controlled oscillator (computer) (NCO) 5 and an adaptive change of current parameters is carried out in it.

This procedure for adjusting (adjusting) the parameters of the reference signal in the prototype device is performed periodically with a temporary discrete step T _α .

The task that the proposed technical solution solves is the formation of a reference signal and the adjustment of its parameters (frequency and phase) by computational (software) means, including with a significant detuning of the frequency and uncertainty of the initial phase.

The problem is solved on the basis of a universal method of generating a reference signal by computational means and the original control procedure in the process of generating a reference signal and adjusting its parameters, which are made in a single inventive concept and allow the implementation to obtain an equivalent technical effect.

According to the proposed technical solution, a method for generating a reference signal and adjusting its parameters (frequency and phase) by computing means in a frequency and phase automatic adjustment system consists in the following:

- A continuous input broadband signal at a radio frequency is preliminarily converted into a quadrature complex discrete wideband signal at an intermediate frequency, a time synchronization procedure is performed, and a discrete harmonic complex signal at an intermediate frequency is extracted as a result of phase-shift modulation of the BWS.

- In accordance with the control signals, a step-by-step computational procedure is performed for generating a reference signal and adjusting (tuning) its frequency and phase for this:

- Previously, using the computational procedure, form the initial discrete reference quadrature (complex) harmonic signal with zero frequency and zero initial phase.

- During the first step of the reference signal generation procedure, the parameters of the input complex discrete harmonic signal at an intermediate frequency are compared with the parameters of the generated reference quadrature (complex) harmonic discrete signal with zero frequency and zero initial phase.

- At the end of the first step of the reference signal generation procedure, the total phase incursion and the average frequency of the input discrete harmonic complex signal at the intermediate frequency are evaluated.

- Using as an initial phase an estimate of the total phase incursion and as a frequency an estimate of the average frequency of the input discrete harmonic complex signal at an intermediate frequency, a reference signal with these parameters is generated by computational means. As a result of this, at the beginning of the second step of the computational procedure for generating the reference signal, a quasi-synchronous mode is created between the input and reference signal.

- At the second step of the computational procedure, the relative phase mismatch and the error in estimating the frequency of the input discrete harmonic complex signal at the intermediate frequency and the reference signal are evaluated.

- Estimates of the relative phase detuning and frequency estimation errors obtained in the second step are used respectively as the initial phase and corrections to the frequency estimation of the first step in calculating the reference signal for the third step.

- Then, at the third and at each subsequent step of the computational procedure, when forming the reference signal, the procedure for adjusting its parameters for the initial phase and current frequency is identical and includes the following operations:

- During the time of the current step of the computational procedure, an estimation of the phase incursion is performed, which is used as the initial phase of the reference signal in the next step.

- Using the estimate of the phase shift in the current step and the estimate of the phase shift in the previous step, calculate the error estimate of the frequency detuning in the current step.

- The obtained estimate of the frequency detuning error at the current step is used to adjust the current frequency when calculating the reference signal.

- An estimate of the current phase shift and a calculated estimate of the current frequency are used as parameters for calculating the current reference signal in the next step.

Thus, in a sequential step-by-step execution of the procedure for generating and adjusting the current frequency and the initial phase, a reference signal, synchronous to the input signal, is formed as a result.

The method of generating a reference signal and adjusting its parameters of the proposed technical solution corresponds to the following formal mathematical model.

Let the broadband radio signal S _in (t) with an unstable carrier frequency and a random initial phase, including, as a rule, the orthogonal information and pilot components, be fed to the input of the frequency-phase synchronization system of the ШПС receiver:

- аддитивный белый гауссовский шум.Here А _П (t), А _И (t) is the amplitude of the pilot and the information component, d _П (t), d _И (t) are the code pilots and information sequences, τ ₀ is the true temporary position of the input BSS, ω ₀ is circular carrier frequency, Δω - instability of the carrier frequency, φ ₀ - random initial phase, distributed most often according to a uniform law,

- additive white Gaussian noise.

то есть

где τ_u - длительность элементарного символа (чипа) псевдослучайной последовательности (ПСП),

- оценка временного положения ШПС.It should be noted that, in order to perform the frequency-phase synchronization procedure in the HSS, due to time synchronization, orthogonality and weak correlation of the pilot and the information signal, it is sufficient to automatically adjust the frequency and phase only by the known pilot signal. Due to the randomness of the initial phase of the input SHPS at the initial stage in automatic control (synchronization) systems, it is necessary to ensure an incoherent mode that is invariant to the phase value and to implement quadrature signal processing. It is assumed that the preliminary search procedure for the input broadband pilot signal by time is preliminarily implemented. Most often, the search procedure provides an estimate of the true temporal position of the SHPS τ ₀ with accuracy

i.e

where τ _u - the duration of the elementary symbol (chip) of the pseudo-random sequence (PSP),

- assessment of the temporary situation of the ShPS.

It is known that the synchronization procedure is better implemented for signals discretized in time. Therefore, after performing the discretization, quadrature formation and transferring them to the intermediate frequency, the complex representation of the pilot component of the input broadband signal at the intermediate frequency has the form:

and the output calculated reference complex discrete signal can be represented as:

и

- оценки текущей частоты и начальной фазы входного широкополосного сигнала на промежуточной частоте, A_OC(iΔt) - амплитуда опорного сигнала, А_Г(iΔt) - амплитуда гетеродина, φ_Г - фаза гетеродина, i - номер текущей временной позиции, Δt - шаг временного дискрета.Where

and

- estimates of the current frequency and the initial phase of the input broadband signal at an intermediate frequency, A _OC (iΔt) is the amplitude of the reference signal, A _G (iΔt) is the amplitude of the local oscillator, φ _G is the phase of the local oscillator, i is the number of the current time position, Δt is the time step discrete.

In this case, it is assumed that the transfer to the intermediate frequency is performed using a local oscillator. Further, as a result of phase demodulation, the pilot component of the input broadband signal forms a complex representation of the input discrete harmonic signal of the frequency-phase synchronization system at an intermediate frequency:

- сигнал генератора ПСП пилот составляющей на временной позиции

полученной в результате предварительно реализованной процедуры поиска и синхронизации входного широкополосного пилот сигнала по времени. Данный входной дискретный комплексный гармонический сигнал используют для реализации процедуры формирования опорного сигнала.where A ₂ (iΔt) = A _P (iΔt) A _G (iΔt) d _P (iΔt-τ ₀ ),

- signal generator PSP pilot component at a temporary position

obtained as a result of a preliminary implemented procedure for searching and synchronizing the input broadband pilot signal in time. This input discrete complex harmonic signal is used to implement the procedure for generating a reference signal.

The proposed method for generating a reference signal and adjusting its parameters consists in performing the following multi-step computational procedure, which at each step generates an estimate of the relative phase and frequency detuning of the input and reference signals and implements the corresponding adjustment of the parameters of the reference signal.

и среднюю частоту нестабильности входного ШПС

где T_α - время анализа, которое согласно теоретическим и экспериментальным оценкам должно быть T_α≤Т/2. Здесь Т - период сигнала с частотой биений Δf=Δω/2π, равной частоте нестабильности Δω, то есть Т=1/Δf.At the first step of the reference signal generation procedure, the total relative phase detuning of the input harmonic signal at the intermediate frequency (4) and the reference signal is estimated taking into account the frequency instability Δω and the randomness of the initial phase φ ₀ . In this case, a quadrature (complex) signal (3) with zero frequency and zero initial phase is used as a reference signal. Such an approach (taking into account such initial conditions) allows us to estimate the total phase incursion at the end of the first step

and the average frequency of instability of the input SHPS

where T _α is the analysis time, which according to theoretical and experimental estimates should be T _α ≤Т / 2. Here T is the signal period with the beat frequency Δf = Δω / 2π equal to the instability frequency Δω, i.e., T = 1 / Δf.

полученную на первом шаге, и в качестве текущей частоты оценку средней частоты нестабильности входного сигнала

в начале второго шага подстройки создают квазисинхронный режим. Узкополосный входной сигнал и опорный сигнал в этой точке синхронны по фазе. При этом текущая частота опорного сигнала на втором шаге подстройки равна оценке средней частоты нестабильности входного узкополосного гармонического сигнала.Using for the formation (calculation) of the reference signal (3) as an initial phase, the estimate of the total phase incursion

obtained at the first step, and as the current frequency, an estimate of the average frequency of instability of the input signal

at the beginning of the second tuning step, a quasi-synchronous mode is created. The narrowband input signal and the reference signal at this point are synchronous in phase. In this case, the current frequency of the reference signal at the second tuning step is equal to the estimate of the average frequency of instability of the input narrow-band harmonic signal.

возникает в случае использования в системе в качестве фильтра сумматора.The need to take into account the correction of the initial phase

occurs when used in the system as an adder filter.

Further, during the second step of the reference signal generation procedure, the relative phase mismatch of the narrow-band harmonic input signal and the reference signal is proportional to the error in estimating the intermediate frequency

которую применяют в качестве начальной фазы опорного сигнала на следующем (i+1)-м шаге. Используя оценку фазы i-го шага

и оценку фазы на предыдущем (i-1)-м шаге

вычисляют оценку ошибки расстройки частоты входного сигнала и опорного сигнала i-го текущего шага

Полученную оценку используют для вычисления текущей частоты опорного сигнала на следующем (i+1)-м шаге

The third and subsequent steps of generating and adjusting the parameters of the reference signal in frequency and phase are identical and include the following operations. At the end of, for example, the ith step, the current phase incursion is estimated

which is used as the initial phase of the reference signal in the next (i + 1) -th step. Using the estimate of the phase of the i-th step

and phase estimation at the previous (i-1) th step

calculate the error estimate of the detuning frequency of the input signal and the reference signal of the i-th current step

The resulting estimate is used to calculate the current frequency of the reference signal in the next (i + 1) -th step

Thus, in a sequential step-by-step procedure for adjusting the current frequency and the initial phase, a reference signal is formed as a result, synchronous to the input signal.

It should be noted that in the proposed method, an adder is most often used as a filter in assessing the relative phase detuning of discrete signals. In this case, for example, sequential summation of the samples of the regular harmonic signal on the analysis interval T _{α is} performed. This approach makes it possible to present an average estimate of the phase incursion of a discrete complex harmonic signal in an analytical form.

For a regular argument, the quadrature components of the harmonic signal at the output of the adder [Dvayt GB Tables of integrals and other mathematical formulas / G.B. Dwight. - M .: Nauka, 1978.- 228 p., P. 82., Prudnikov A.P., Brychkov Yu.A., Marichev O.I. Integrals and series. In 3 vols. T.1 Elementary functions / A.P. Prudnikov, Yu.A. Brychkov, O.I. Marichev. - M .: FIZMATLIT, 2002. - 632 p., S.515]] have the form:

в течение интервала анализа T_α=(N-1)Δt с использованием функционального преобразователя

имеет видHere α = φ ₀ is the initial phase, x = ε · Δt = Δφ is the phase incursion during the time interval Δt, and ε is the current frequency detuning. Then the estimate of the phase incursion

during the analysis interval T _α = (N-1) Δt using a functional converter

has the form

and the estimate of the relative error of the frequency of the input signal and the reference signal

It follows from expression (7) that with this algorithm, the estimate of the frequency error of the input signal with a random initial phase is half that of the true value. As a result of this, in order to create the correct quasicoherent initial processing conditions at the second step of the frequency-phase synchronization procedure, it is important to introduce the necessary estimation correction when assigning the initial phase of the reference signal. As a correction of the initial phase, the raid is used at the second tuning step

и вычисляют по главному значению аргумента с учетом периодичности функции arctg(x)=arctg(x±kπ), k=0, 1, 2 …The phase incursion using quadrature processing is most often evaluated using a functional converter

and calculated by the principal value of the argument, taking into account the periodicity of the function arctg (x) = arctg (x ± kπ), k = 0, 1, 2 ...

There are many ways to generate a reference harmonic signal (3). The main requirements for these methods are, firstly, sufficient accuracy of the presentation and, secondly, the minimum hardware and software (computing) costs.

In the formation of the reference signal by computational means, there are a large number of diverse methods for obtaining elementary functions [Baykov VD, Smolov VB Hardware implementation of elementary functions in a digital computer / V.D. Baykov V.B. Smolov. - L .: Publishing house Leningrad. University, 1975 .-- 96 p., Tesler G.S. Generalized adaptive approximations of functions / G.S. Tesler // Mathematical Machines and Systems. - 1998. - No. 2], including the harmonic signal. Of these, in digital technology, they have found application: series expansion methods for orthogonal polynomials, approximation methods using the best approximation, fractional representation methods, rational approximation methods, iteration methods, tabular methods, specialized CORDIC methods [Jack E. Voider. The CORDIC Trigonometric Computing Technique / Reprinted, with permission, from IRE Trans. Electron Comput. EC-W. 8, 1959, p. 330-334] and others.

Most often [Baykov VD, Smolov VB Hardware implementation of elementary functions in a digital computer / V.D. Baykov V.B. Smolov. - L .: Publishing house Leningrad. Univ., 1975. - 96 p.] use the representation of a harmonic signal in the form of a Taylor power series [Dvayt GB Tables of integrals and other mathematical formulas / G.B. Dwight. - M .: Nauka, 1978. - 228 p., P.79]:

As a rule, to simplify the implementation, a number is limited to a finite number of terms (signal samples) providing the required accuracy of representation. For the same presentation accuracy, the amount of computational cost (degree of polynomial) depends to a large extent on the properties of the function used and the presentation interval.

In accordance with the performed comparative assessment, for the same (satisfactory) accuracy of the representation of the functions sin (x) and cos (x) in the period interval, it is more convenient to use their Taylor series expansion in the interval x1∈ [-π, π]. In this case, on the interval x1∈ [-π, π] it suffices to take into account a polynomial of the 9th degree. At the same time, a polynomial of degree 17 is required to represent these functions on the interval x∈ [0,2π]. This is due to the central symmetry of the function sin (x) and the mirror symmetry of the function cos (x) with respect to the origin on the interval x1∈ [-π, π]. On the other hand, the choice of the interval of variation of the argument x1∈ [-π, π], taking into account the periodicity of the functions sin (x) and cos (x), can significantly reduce computational costs and increase processor capabilities.

The relationship of the variables x and x1 from the presentation intervals x1∈ [-π, π] and x∈ [0.2π] of the functions sin (x) and cos (x), taking into account the periodicity, has the form: x1 = x if 0≤x≤π , and x1 = (x-2π) if π <x≤2π.

To implement the proposed method in a device for generating a reference signal by computational means in frequency and phase synchronization systems of broadband communication systems, comprising a standard unit for a tracking receiver of a broadband signal (WPS), including a circuit for converting the carrier frequency of the input broadband signal to an intermediate frequency; a circuit for converting a signal from an analog form to a quadrature discrete representation, as well as a time, frequency, and phase synchronization system of an ACL including a correlator, a complex multiplier, a signal parameter error detector, consisting of phase, frequency, and time error detectors, and the output of the phase error detector is connected to the input of the low-pass filter (LPF) of the phase error ring, and the output of the time error detector is connected to the input of the LPF of the time delay error ring, in addition, it is connected in series a phase and frequency error combiner and a numerically controlled computer, the output of which is connected by a bus to the corresponding input of the complex multiplier, the input of the standard block of the WPS tracking receiver is the device input, according to the invention, a control device is introduced, the corresponding outputs of which are connected to the control inputs of the calculator, correlator, low-pass filter phase error rings, in addition, the output of the low-pass filter of the temporary error ring is connected to the corresponding input of the control device, while phase detectors and the frequency error is made controllable, their control inputs are connected to the corresponding outputs of the control device; the outputs of the controlled frequency error detector are connected to the corresponding inputs of the adder; the LPF output of the phase error ring is connected to the input of a controlled frequency error detector; the quadrature outputs of the standard block of the WPS tracking receiver are connected to the corresponding inputs of the complex multiplier, the output of which is connected by a bus to the input of the correlator, the output of which is connected by a bus to the corresponding input of the signal parameter error detector.

The general structural diagram of the proposed device is presented in figure 2, where it is indicated:

1 - standard block servo receiver ShPS;

2 - correlator (interpolator);

3 - complex multiplier;

4 - error detector of signal parameters;

4.1 - controlled phase error detector;

4.2 - controlled frequency error detector;

4.3 - temporary error detector;

5 - a numerically controlled calculator (oscillator);

6 - adder phase and frequency errors;

7 - controlled low-pass filter (low-pass filter) of the phase error ring;

9 - low-pass filter rings of the delay time delay;

10 - control device.

A device for implementing the technical solution of the proposed method includes: a standard block of a tracking receiver ШПС 1, including a circuit for converting the carrier frequency of the input broadband signal to an intermediate frequency (RF / IF) and a circuit for converting the signal from analog to quadrature discrete representation (A / D, quad) , and a scheme of time, frequency, and phase synchronization of a NPS, consisting of a series-connected complex multiplier 3, a correlator (interpolator) 2, an error detector of the si parameters 4, consisting of phase 4.1 controlled detectors, frequency 4.2 error and 4.3 temporary error detector, the output of which through the low-pass filter ring 9 is connected to the corresponding input of the control device 10, the corresponding outputs of which are connected to the control inputs of the correlator 2, phase 4.1 and frequency 4.2 controlled detectors errors, as well as with the input of the controlled low-pass filter ring 7, the output of which is connected to the corresponding input of the controlled frequency error detector 4.2. The output of the controlled phase error detector 4.1 is connected to another input of the controlled low-pass filter ring 7. The output of the temporal error detector 4.3 is connected to the input of the low-pass filter of the time delay error 9, the output of which is connected to the corresponding input of the control device 10. In addition, the outputs of the controlled frequency error detector 4.2 are connected with the corresponding inputs of the adder phase and frequency errors 6, the output of which is connected to the input of the calculator 5, the controlled input of which is connected to the corresponding output of the control device 10, you the stroke of the calculator 5 is connected by a bus to the corresponding input of the multiplier 3. The quadrature outputs of the standard block of the servo receiver of ШПС 1 are connected to the corresponding inputs of the multiplier 3. The input of the standard block of the servo receiver of ШПС 1 is the input of the device. Moreover, the connection of the multiplier 3 with the correlator 2 and the correlator 2 with the detector of the error parameters of the signal 4 is made by a bus.

As a numerically controlled calculator 5 of the harmonic signal forming the reference signal in the inventive device, a calculator is used, made, for example, on the basis of FPGA or DSP, which implements the procedure for representing the signal in the form of expansion in a Taylor power series.

The proposed device operates as follows.

The description of the operation of the proposed device is quite fully considered earlier when analyzing the general mathematical model of the proposed technical solution in terms of the formation of the reference signal and adjusting its parameters. The sequence of operations of the claimed device is fully consistent with the algorithm of the proposed method. It should be noted that changing the order of sequential linear operations in the proposed device does not lead to a change in the final processing result.

Step-by-step computational procedure, which is implemented in the proposed device, can be used with significant values of the relative frequency and phase detuning. It is effective both at the initial stage (in the frequency capture mode) and in the subsequent tracking mode. Unlike the prototype, the proposed procedure has a higher noise immunity, because additionally use control of the procedure for generating the reference signal and adjusting its parameters.

The presented solution to the problem of frequency auto-tuning combines the ability to fine-tune the frequency with moderate hardware costs for its implementation. An implementation option of the proposed device allows universal computing tools to carry out with a given accuracy the frequency adjustment of the reference signal even with a sufficiently low input signal-to-noise ratio.

As an illustration for the proposed frequency-phase synchronization system, Figures 3 and 4 show time plots (diagrams) of the signals of the computational procedure for generating the reference signal obtained as a result of computer simulation. The reference signal was obtained by the method of expansion in a Taylor power series. Figure 3 presents diagrams in the absence of noise in the input signal and figure 4 - for the signal-to-noise ratio at the input, equal to 5 dB. Here, on the first and second graph, on top of each figure, the diagrams of the signals of the sine and cosine components of the input signal at an intermediate frequency are presented, the third and fourth graph show a sequential procedure for generating the corresponding quadrature components of the reference signal of the system. The final graph of FIG. 3 and FIG. 4 shows transients of phase error adjustment of the quadrature components of the output reference signal.

Comparison of the claimed objects with known technical solutions in this technical field did not allow to reveal the totality of the claimed features, and therefore they provide the claimed technical solution with the criteria of “novelty”, “significant differences” and “inventive step”.

Graphic materials used in the description of the invention

Figure 1 is a General structural diagram of a prototype device.

Figure 2 is a General structural diagram of the inventive device.

Figure 3 - plot signals of the computational procedure for the formation of a reference signal in the absence of noise at the input of the frequency-phase adjustment system.

Figure 4 - plot signals of the computational procedure for the formation of the reference signal for the signal-to-noise ratio at the input of the frequency-phase adjustment system, equal to 5 dB.

Claims (4)

1. A method of generating a reference signal by computational means in frequency and phase synchronization systems of broadband communication systems, namely, that a continuous input broadband signal at a radio frequency is preliminarily converted into a quadrature complex discrete wideband signal at an intermediate frequency, a time synchronization procedure is performed, and the result is isolated phase demodulation of the NPS discrete harmonic complex signal at an intermediate frequency, in accordance with the control signals They perform a step-by-step computational procedure for generating a reference signal and adjusting (adjusting) its frequency and phase, for this: first, using a computational procedure, an initial discrete reference quadrature (complex) harmonic signal with zero frequency and zero initial phase is formed during the first step of the procedure generating a reference signal compares the parameters of the input complex discrete harmonic signal at an intermediate frequency with the parameters of the generated reference qua total (complex) harmonic discrete signal with zero frequency and zero initial phase, at the end of the first step of the reference signal generation procedure, the total phase incursion and the average frequency of the input discrete harmonic complex signal at an intermediate frequency are estimated, using the total phase incursion estimate as the initial phase and as a frequency, an estimate of the average frequency of the input discrete harmonic complex signal at an intermediate frequency; a signal with these parameters and, as a result, at the beginning of the second step of the computational procedure for generating the reference signal, a quasi-synchronous mode is created between the input and reference signal; at the second step of the computational procedure, the relative phase mismatch and the error in estimating the frequency of the input discrete harmonic complex signal at the intermediate frequency and the reference signal are evaluated obtained at the second step of the estimation of the relative phase mismatch and errors of the frequency estimate are used respectively phase and corrections to the estimation of the frequency of the first step in calculating the reference signal for the third step, then in the third and at each subsequent step of the computational procedure when generating the reference signal, the procedure for adjusting its parameters for the initial phase and current frequency is identical and includes the following operations: during the time the current step of the computational procedure, carry out an estimation of the phase incursion, which is used as the initial phase of the reference signal in the next step, using the estimation of the phase incursion in the current step e and the phase shift estimate in the previous step, calculate the frequency mismatch error estimate in the current step, the obtained frequency mismatch error estimate in the current step is used to adjust the current frequency when calculating the reference signal, the current phase shift estimate and the calculated current frequency estimate are used as parameters for calculating the current reference signal in the next step. 2. A device for generating a reference signal by computing means in frequency and phase synchronization systems of broadband communication systems, comprising a standard block of a tracking receiver of a broadband signal (WPS), including a circuit for converting the carrier frequency of the input broadband signal to an intermediate frequency; a circuit for converting a signal from an analog form to a quadrature discrete representation, as well as a time, frequency, and phase synchronization system of an ACL, including a correlator, a complex multiplier, a signal parameter error detector, consisting of phase, frequency, and time error detectors, the phase error detector output being connected to the input of the low-pass filter (LPF) of the phase error ring, and the output of the time error detector is connected to the input of the LPF of the time delay error ring, in addition, it is connected in series phase and frequency error combiner and a numerically controlled computer, the output of which is connected by a bus to the corresponding input of the complex multiplier, the input of the standard block of the WPS tracking receiver is the device input, characterized in that a control device is introduced, the corresponding outputs of which are connected to the control inputs of the calculator, correlator, The low-pass filter of the phase error ring, in addition, the output of the low-pass filter of the temporary error ring is connected to the corresponding input of the control device, while the phase detectors frequency error made controllable, its control inputs connected to respective outputs of the control device; the outputs of the controlled frequency error detector are connected to the corresponding inputs of the adder; the LPF output of the phase error ring is connected to the input of the frequency error detector; the quadrature outputs of the standard block of the WPS tracking receiver are connected to the corresponding inputs of the complex multiplier, the output of which is connected by a bus to the input of the correlator, the output of which is connected by a bus to the corresponding input of the signal parameter error detector. 3. The device according to claim 2, characterized in that the numerically controlled computer is made on an FPGA or DSP that implements a procedure that uses Taylor expansion. 4. The device according to claim 2, characterized in that the control device is made on an FPGA or DSP that implements a multi-step computational control procedure when generating a reference signal and adjusting its parameters.

Images