RU2523048C2 - Device for failure detection in step electric drive - Google Patents

Abstract

FIELD: electricity.

SUBSTANCE: invention refers to electric engineering and can be applied in systems with electric step drive based on three-phase, four-phase and six-phase step drives. Effect is extension of functional capabilities due to enabled switching and halt modes for motors with different number of phase windings, step motor operating in alternate cycling mode controlled by switching mode selection buses, and due to automatic failure detection during step motor operation by comparing codes of actual motor power supply, generated by known limit sensors of phase current and voltage with reference codes of backup data channel. In addition, failure detection device for electric step drive features second joint data output of reference switching combinations, digital comparator, new functional links listed in materials of the application.

EFFECT: broader functional capabilities.

2 dwg, 2 tbl

Description

The invention relates to the field of automation and can be used in systems with a stepper electric drive based on three-phase, four-phase and six-phase stepper motors.

A device for detecting failure in the step the drive [1], comprising a step motor, a chain each j phases which are included sequentially threshold sensor current I _j, and in parallel with each winding includes threshold detectors voltage U _j, conjunctions which I _{j ^} U _j connected to the same inputs of the reverse shift register and the first inputs of the comparison element, the second inputs of which are connected to the outputs of the reverse shift register of the same name. In this case, the direct or reverse shift mode is determined by the logical level of the reverse bus, and the shear modulus is determined by the number of pulses on the clock bus. The initial contents of the register corresponding to the initial combination of switching on the phases are loaded into the register by a signal on the initial setup bus. In the operating mode, for each clock pulse, the initial contents of the register are cyclically shifted and compared with the switching combination of switching on the phases, and in case of their mismatch, a “failure” signal is generated.

The disadvantages of the device include the fact that a failure will not be detected if all phases are energized or all phases are de-energized. In addition, with proper operation in pair switching mode, the device generates a false signal “failure”.

Closest to the claimed device is a device for controlling a stepper motor [2], comprising a first to third bus for selecting a switching mode, a control bus, a clock bus, a reverse bus, a reverse counter, the first, second and third inputs of which are connected to the control buses, a clock, reverse, respectively, read-only memory, read permission bus, while the first and fourth outputs of the reversible counter are connected to the inputs of the same-name read-only memory, and the fifth to eighth cat inputs They are connected to the third, second, first, and seventh buses for switching the switching mode and reading permission, respectively, and the first to sixth outputs are the outputs of the stepper motor control device of the same name. The device provides well-known switching and parking modes for motors with a different number of phase windings in a variable cycle mode controlled by buses for selecting a switching mode.

The disadvantages of the device include the lack of automatic failure diagnosis mode.

The invention is aimed at expanding the functionality of the device.

This is achieved by the fact that the seventh and twelfth outputs of the read-only memory are additionally introduced into the device, forming its second group output, a digital comparator, the output of which is the "inequality of operands" which is the information output of the fault detection device, the second group input of the comparator is connected to the group output of the same name devices, the first group output of which is through power amplifiers, threshold sensors for phase currents, voltages, logic elements, and connections a first group of n input of a comparator.

Figure 1 shows the block diagram of the device, figure 2 is a diagram of the connection of the phase windings of a three-phase motor, as well as cycles of three-stroke and six-stroke reverse switching and the corresponding diagrams of the stator field.

The device contains buses for selecting the switching mode 1-3, control bus 4, clock bus 5, reverse bus 6, read enable bus 7, reversible 2/12 counter 8, read-only memory 9, power amplifiers with threshold current and voltage sensors 10, logical elements And 13, a digital comparator 11, the bus information output 12.

The selection mode switching buses 3, 2, 1 are connected to the inputs 5, 6, 7 of the read-only memory, respectively, the control bus 4 is connected to the first input of the reverse counter 8, the clock bus 5 and the reverse bus 6 are connected to the second and third inputs of the reverse counter, respectively read permission bus 7 is connected to the eighth input of read-only memory 9, outputs 1, 2, 3, 4 of the reverse counter are connected to the same address inputs of read-only memory 9, the first group output of which cut power amplifiers, threshold current and voltage sensors 10, logical elements And 13 is connected to the first group input of the digital comparator 11, the second group input of which is connected to the second group output of the permanent storage device, the output of the comparator 11 is connected to the output information bus 12.

A device for detecting failures in a stepper drive operates as follows.

During the initial preparation of the device for operation, the phase windings of the motor are connected to the corresponding threshold sensors and power amplifiers, the mode code is set with the upper bits of the address a ₅ , ₆ , and ₇ on the first and third buses for selecting the switching mode. Setting the logical variable V = 1 of the control bus 4 allows the count of pulses arriving on the clock bus 5 to increase or decrease the status code of the reverse counter 8, depending on the level on the reverse bus 6. If there is a read permission signal E = 1, the content code of the read-only memory at the address a ₁ a ₂ a ₃ a ₄ a ₅ a ₆ a ₇ is output to the main b ₇ -b ₆ and duplicate b ₇ -b ₁₂ output bits, providing phase switching voltage of the motor in accordance with tables 1, 2.

обеспечивает реализацию режима стоянки под током.The value E = 0 sets the outputs of the permanent storage device b ₁ -b ₆ and b ₇ -b _{2 to} zero values of the variables, ensuring the implementation of the de-energized parking mode, the value $${\overline{V}}_{^}E=\mathrm{one}$$

provides the implementation of the parking regime under current.

- «отказов нет», иначе $$\overline{А=В}=1$$

- «отказ».When the device is operating properly, the nominal phase currents I _j and voltages U _j form I _{j ^} U _j = 1, corresponding to tables 1, 2, which entails the generation of a signal $$\overline{\mathrm{BUT}=\mathrm{AT}}=0$$

- “no failures”, otherwise $$\overline{\mathrm{BUT}=\mathrm{AT}}=\mathrm{one}$$

- “rejection”.

 Information sources

1. Copyright certificate No. 1415401, class. H02P 7/62, published from 08/07/88. Bull. No. 29.

2. Patent RU 2417512, cl. Н02Р 8/00, Н02Р 8/20, published December 10, 2010. Bull. Number 34.

3. Discrete electric drive with stepper motors. / Edited by MG Chilikin. M .: "Energy", 1971.

table 2
Device for detecting failures in a stepper drive A ₅ a ₆ a ₇ mode = 101.4-cycle alternating Phase A continuously under current A-1 Phase A is permanently de-energized A = 0 The second group ROM output A = B four 3 2 one

$$\overline{\mathrm{BUT}-\mathrm{AT}}$$

four 3 2 one b ₁₀ b ₉ b ₈ b ₇ 0 0 0 0 one one 0 0 0 0 0 0 0 one one 0 0 one one 0 0 0 one 0 0 0 one 0 one 0 one 0 one 0 0 one 0 0 0 one 0 0 one one 0 0 one 0 one 0 0 0 one 0 0 0 All phases are live All phases are de-energized. The second group ROM output $$\overline{\mathrm{BUT}-\mathrm{AT}}$$

four 3 2 one $$\overline{\mathrm{BUT}-\mathrm{AT}}$$

four 3 2 one b ₁₀ b ₉ b ₈ b ₇ one one one one one one 0 0 0 0 0 0 0 one one one one one one one 0 0 0 0 0 0 one 0 one one one one one one 0 0 0 0 0 one 0 0 one one one one one one 0 0 0 0 one 0 0 0

Claims (1)

A device for detecting failures in a stepper drive, comprising a first, second, third bus for selecting a switching mode, a control bus, a clock bus, a reverse bus, a read permission bus, a reversible counter, the first, second, third inputs of which are connected to the control bus, a clock bus, reverse bus, respectively, read-only memory, the first, second, third, fourth address inputs of which are connected to the outputs of the same name of the reverse counter, the fifth, sixth, seventh, eighth inputs of permanent storage its devices are connected to the third, second, first, seventh buses for selecting a switching mode and reading permission, respectively, while the outputs of the first to sixth read-only memory devices are its first group output, characterized in that the seventh to twelfth outputs of read-only memory are additionally introduced into the device constituting its second group output, a digital comparator, the output of "operand inequality" which is the information output of the failure detection device, the second group the first input of the comparator is connected to the group output of the same name with a read-only memory device, the first group output of which is through power amplifiers, threshold sensors for phase currents and voltages, logical elements AND, connected to the first group input of the comparator.