RU2515335C2 - Fabrication of semiconductor structure - Google Patents

Abstract

FIELD: physics.

SUBSTANCE: invention relates to semiconductor technology, particularly, to production of semiconductor structures with lower density of defects. In compliance with this method, ions of boron of 25 keV energy are embedded in pre-amorphised surface of silicon substrate by silicon ions. This allows formation of reproducible fine highly doped p-layers with minor crystalline abnormalities and better electrical parameters. Then two-step annealing is carried out.

EFFECT: decreased density of defects, perfected structure parameters, higher quality and yield.

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Description

The invention relates to the field of production technology of semiconductor devices, in particular to a technology for the manufacture of semiconductor structures with a reduced density of defects.

A known method of manufacturing a semiconductor device [US Pat. 5108944 USA, MKI H01L 21/265] by creating on the surface of a p-type silicon wafer an epitaxial layer of n-type conductivity in which insulating regions are formed by doping, as well as pockets to create transistor structures. The method involves the simultaneous creation of complementary MOSFETs, the channel of which is formed using the diffusion process. The MOS-PT gate electrodes are created using self-alignment technology. MOS-PT polysilicon gates have the same type of conductivity as their drain areas. In such semiconductor structures, due to the low processability, the stability of the electrophysical parameters of the structures decreases.

A known method of manufacturing a semiconductor device [US Pat. 5087576 USA, MKI H01L 21/265] by implantation of impurity ions at an elevated substrate temperature, which reduces the degree of implantation damage. The pre-cleaned substrate is implanted with Al ⁺ , Ga ⁺ and N ₂ ⁺ ions at 623-1023 ° C. The resulting highly doped and damaged near-surface layer is removed by preliminary oxidation at 1000-1500 ° C and subsequent etching. The substrate is subjected to final annealing at 1200 ° C to fully activate the dopant.

The disadvantages of this method are:

- increased density of defects in semiconductor structures;

- low manufacturability;

- the formation of mechanical stresses.

The problem solved by the invention: reducing the density of defects in semiconductor structures, providing improved parameters of the structures, improving quality and increasing the percentage of yield.

The problem is solved by ionic incorporation of boron with an energy of 25 keV into a pre-amorphized surface of a silicon substrate with high-dose silicon ions, which allows reproducibly forming small strongly doped p-layers with less crystalline disturbances and better electrical parameters.

The technology of the method consists in the following: silicon ions with an energy of 100 keV, a dose of 1 · 10 ¹⁵ cm ^-2 , and then silicon ions with an energy of 60 keV, a dose of 6 · 10 ¹⁴ cm ^-2 are implanted in a silicon substrate of t-type conductivity, and after this, ion boron is introduced with an energy of 25 keV, a dose of 2 · 10 ¹⁵ cm ^-2 . Next, the structure is annealed in a stream of A _r -H ₂ , at the beginning for 60 minutes at 600 ° C, and then at 900 ° C for 10 minutes. Double ion implantation of silicon provides the formation of a homogeneous amorphous layer 220 nm thick. In this case, the amorphized surface layer of silicon prevents the channeling of boron ions. Then, active regions of the semiconductor device are formed in a uniform silicon layer by standard technology.

The proposed method of manufacturing a semiconductor structure by ionic incorporation of boron with an energy of 25 keV, a dose of 2 · 10 ¹⁵ cm ^-2 , into a pre-amorphized surface of a silicon substrate with silicon ions, first with an energy of 100 keV, a dose of 1 · 10 ¹⁵ cm ^-2 , then with an energy of 60 keV, dose of 6 · 10 ¹⁴ cm ^-2 followed by annealing in two stages: the first stage - for 60 minutes at 600 ° C, the second stage - for 10 minutes at 900 ° C allows to increase the percentage of output of devices and improve their reliability.

According to the proposed method, semiconductor structures were manufactured and investigated. The processing results are presented in the table.

Parameters of p / p structures made by standard technology Parameters of p / p structures made by the proposed technology defect density, cm ^-2 Leakage current, I _ut · 10 ¹⁰ , A defect density, cm ^-2 Leakage current, I _ut · 10 ¹⁰ , A 8.110 ⁵ 28 4.310 ³ 1.4 9.4 · 10 ⁵ 39 5.210 ³ 1.9 6.510 ⁵ 16 3.8 · 10 ³ 0.8 7.310 ⁵ 21 4.110 ³ 1,2 5.910 ⁵ fourteen 3.4 · 10 ³ 0.7 8.210 ⁵ thirty 4.0 · 10 ³ 1,5 7.6 · 10 ⁵ 23 3.7 · 10 ³ 1,1 8.7 · 10 ⁵ 32 4,510 ³ 1,6 9.2 · 10 ⁵ 34 4.6 · 10 ³ 1.7 6.810 ⁵ eighteen 3.9 · 10 ³ 0.9

Experimental studies have shown that the yield of suitable semiconductor structures on a batch of wafers formed in the optimal mode increased by 21.6%.

The technical result is a decrease in the density of defects, ensuring manufacturability, improving the parameters of structures, improving quality and increasing the percentage of yield.

The stability of the parameters over the entire operating temperature range was normal and consistent with the requirements.

Claims (1)

A method of manufacturing a semiconductor structure, including the implantation of ions into a substrate and annealing, characterized in that the silicon is first pre-amorphized with silicon ions with an energy of 100 keV, a dose of 1 · 10 ¹⁵ cm ^-2 , then an energy of 60 keV, a dose of 6 · 10 ¹⁴ cm ^-2 , boron ions with an energy of 25 keV, a dose of 2 · 10 ¹⁵ cm ^-2 are introduced, and annealing is carried out in two stages: the first stage - for 60 minutes at 600 ° C, the second stage - for 10 minutes at 900 ° C .