RU2500028C1 - Device to model combined power flow controller - Google Patents

Abstract

FIELD: electricity.

SUBSTANCE: device comprises a computing block of capacitor batteries, a block of multi-channel analogue-to-digital conversion, a block of microprocessors, a voltage-current converter, two identical blocks of voltage transformation and conversion, each comprising a computing block of the transformer, three blocks of voltage-current converters, two blocks of digitally controlled transverse switching, two blocks of digitally controlled longitudinal switching, a unit of static voltage converter.

EFFECT: provision of regulator modelling with variable parameters.

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Description

The invention relates to the field of modeling objects of electrical systems and can be used to reproduce in real time a continuous spectrum of normal and abnormal processes in a combined power flow controller in specialized multiprocessor software and hardware systems of a hybrid type, designed for real-time simulation of electrical power systems.

The closest adopted for the prototype is a device for hybrid modeling of the combined power flow controller [KR 100711816 B1, IPC H02J 3/38, publ. 04/19/2007] containing a digital simulator of a power system with two digital-to-analog and two analog-to-digital converters and a physical simulator of a combined power flow regulator, comprising two transformers, two blocks of static voltage converters, a block of line modeling, two voltage amplifiers and two current meters.

The analog outputs of the first and second digital-to-analog converters are the outputs of the digital simulator of the power system and are connected to the inputs of the first and second voltage amplifiers. The primary winding of the transformer, the first end of the primary winding of the second transformer and the first current meter are connected to the output of the first voltage amplifier. A second current meter is connected to the output of the second voltage amplifier and, through the line modeling unit, the second end of the primary winding of the second transformer is connected. The outputs of the first and second current meters are connected to the inputs of the first and second analog-to-digital converter, respectively, which are the inputs of the digital simulator of the power system. Two blocks of static voltage converters connected to each other are connected to the secondary windings of the transformers.

The disadvantages of this device are the impossibility of automated and automatic control of the parameters of the elements of the simulated integrated power flow controller, the complexity of modeling emergency modes of operation.

The objective of the invention is to provide a device for modeling an integrated power flow controller with variable parameters.

The claimed device for modeling a combined power flow controller, as in the prototype, contains two blocks of static voltage converters interconnected.

According to the invention, the device comprises two identical voltage transformation and conversion units, in each of which three three-phase outputs of the transformer computing unit are connected to the inputs of three voltage-current converter units. The first and second three-phase inputs of the computing unit of the transformer are connected to the first and second blocks of voltage-current converters, with the first and second blocks of digitally controlled transverse switching, with the first and second blocks of digitally controlled longitudinal switching. The outputs of the digitally-controlled longitudinal switching units are three-phase device outputs. The third three-phase input of the computing unit of the transformer is connected to the third block of voltage-current converters and to the block of the static voltage converter. The outputs of two blocks of static voltage converters of the first and second transformation and voltage conversion units are interconnected with the outputs of the device, as well as with the inputs of the computing unit of capacitor banks and with the outputs of the voltage-current converter unit. The outputs of the computing unit of capacitor banks are connected to the inputs of the unit of voltage-current converters. The digital inputs of the outputs of the microprocessor unit are connected to the computing units of the transformers, to the digitally-controlled longitudinal switching units, to the digitally-controlled lateral switching units and to the static voltage converting units of the voltage transformation and conversion units, to the capacitor bank computing unit, to the multi-channel analog-to-digital conversion unit and to the personal computer / server. The inputs of the multi-channel analog-to-digital conversion unit are connected to the computing unit of the capacitor banks and the computing units of the transformer of the transformation and voltage conversion units.

The proposed device allows for real-time simulation in real time and on an unlimited interval of processes occurring in the combined power flow controller, autonomous or as part of power system models, including automated and functional automatic control of parameters, with all kinds of normal, emergency and post-emergency operation modes .

Figure 1 presents the structural diagram of a device for modeling a combined power flow controller.

Figure 2 shows the structural diagram of the computing unit of the transformer.

Figure 3 shows the structural diagram of a block of a static voltage Converter.

Figure 4 shows a structural diagram of a computing unit of capacitor banks.

A device for modeling the integrated power flow controller (Fig. 1) contains a microprocessor unit 1 (BM), the digital inputs and outputs of which are connected to a personal computer / server, to the digital inputs of two identical voltage transformation and conversion units 2 (BTN1), 3 (BTN2) ), the computing unit of capacitor banks 4 (VBKB) and to the digital inputs and outputs of the multi-channel analog-to-digital conversion unit 5 (BMACP).

The voltage transformation and conversion unit 2 (BTPN1) contains voltage-current converter blocks 6 (BPNT1), 7 (BPNT2), 8 (BPNT3), as well as a static voltage converter unit 9 (BSPN) connected to its digital inputs, digitally-controlled longitudinal blocks 10 (BTsPrK1), 11 (BTsPrK2) and transverse 12 (BTsPoK1), 13 (BTsPoK2) switching and computing unit of transformer 14 (WBT). Three three-phase outputs of the computing unit of transformer 14 (VBT) are connected to the inputs of the blocks of voltage-current converters 6 (БПНТ1), 7 (БПНТ2), 8 (БПНТ3).

The three-phase output of the block of voltage-current converters 6 (BPNT1), corresponding to the first end of the primary winding of the transformer, is connected to the first three-phase input of the computing unit of transformer 14 (VBT), digitally-controlled longitudinal blocks 10 (BTsPrK1) and transverse 12 (BTsPoK1) switching. The three-phase output of the voltage-current converter unit 7 (BPNT2) corresponding to the second end of the transformer primary winding is connected to the second three-phase input of the transformer computing unit 14 (VBT), digitally-controlled longitudinal 11 (BTsPrK2) and transverse 13 (BTsPoK2) switching units. The third three-phase input of the transformer computing unit 14 (VBT) and the three-phase output of the static voltage converter 9 (BSPN) are connected to the three-phase output of the voltage-current converter unit 8 (BPNT3).

The outputs of the digitally-controlled longitudinal switching units 10 (BTsPrK1) and 11 (BTsPrK2) are the first and second three-phase outputs of the voltage transformation and conversion unit 2 (BTPS1). Three outputs of the unit of the static voltage converter 9 (BSPN) are the DC outputs of the transformation and voltage conversion unit 2 (BTPN1).

The outputs of the computing unit of the transformer 14 (WBT), which are the outputs of the voltage transformation and conversion unit 2 (BTPN1), are connected to the multi-channel analog-to-digital conversion unit 5 (BMACP), which is connected to the outputs of the voltage transformation and conversion unit 3 (BTPN2) and the computing unit 4 capacitor banks (VBKB).

The outputs of the computing unit of capacitor banks 4 (VBKB) are connected to the block of voltage-current converters 15 (BPNT4), the outputs of which are the DC outputs of the device and connected to the inputs of the computing unit of capacitor banks 4 (VBKB), and with the corresponding DC outputs of the transformation units and voltage conversion 2 (BTPN1), 3 (BTPN2). The three-phase outputs of the voltage transformation and conversion blocks 2 (BTPN1), 3 (BTPN2) are the outputs of the device.

The computing unit of the transformer 14 (WBT) (figure 2) contains identical units for the implementation of the equations of phase A 16 (BRUF A), B 17 (BRUF B) and C 18 (BRUF C) and the phase voltage generating unit 19 (BFF), digital inputs which are connected to the digital inputs and outputs of the microprocessor unit 1 (BM).

The block for the implementation of phase A 16 equations (BRUF A) contains blocks for the implementation of equations magnetically coupled to the phase A stream of circuits 20 (BRUMPK1), 21 (BRUMPK2) and a block for the implementation of the equation of balance of magnetomotive forces and the magnetization curve 22 (BRUBMSiKN), the digital inputs of which are connected to digital inputs block implementation of the equations of phase A 16 (BRUF A). The three-phase inputs of the phase voltage generating unit 19 (BFFN) are connected to the three-phase inputs of the computing unit of the transformer 14 (VBT), and the outputs are connected to the inputs of the blocks for the implementation of equations magnetically coupled by the phase A stream of circuits 20 (BRUMPK1), 21 (BRUMPK2), blocks for the implementation of phase B equations 17 (BRUF-B) and C 18 (BRUF-C) and a multi-channel analog-to-digital conversion unit 5 (BMACP). The blocks for the implementation of the equations of the magnetically coupled phase A flow circuits 20 (BRUMPK1), 21 (BRUMPK2) are connected by inputs to the input of the multi-channel analog-to-digital conversion unit 5 (BMACP) and to the first output of the block for the implementation of the equation of balance of magnetomotive forces and the magnetization curve 22 (BRUBMSiKN).

The first output of the implementation block of the equation of magnetically coupled phase A flow of circuits 20 (BRUMPK1) is connected to phase A of the first three-phase output of the computing unit of transformer 14 (VBT), and the second - to phase A of the second three-phase output of the computing unit of transformer 14 (VBT), with a multi-channel analog -digital conversion 5 (BMACP) and with a block implementing the equation of balance of magnetomotive forces and the magnetization curve 22 (BRUBMSiKN).

The output of the implementation block of the equation of the magnetically coupled phase A flow circuits 21 (BRUMPK2) is connected to the inputs of the implementation block of the equation of balance of magnetomotive forces and the magnetization curve 22 (BRUBMSiKN), multi-channel analog-to-digital conversion unit 5 (BMACP) and phase A of the third three-phase output of the transformer computing unit 14 (WBT). The second output of the implementation block of the equation of balance of magnetomotive forces and the magnetization curve 22 (BRUBMSiKN) is connected to the input of the block of multi-channel analog-to-digital conversion 5 (BMACP).

Corresponding to the outputs of the implementation block of the equations of phase A 16 (BRUF A), the outputs of the blocks of implementation of the equations of phase B 17 (BRUF B) and C 18 (BRUF C) are connected to the corresponding phases of the three-phase outputs of the computing unit of the transformer 14 (WBT) and the inputs of the multi-channel analog digital conversion 5 (BMACP).

The block of the static voltage converter 9 (BSPN) (figure 3) contains the phase blocks of the static voltage converter A 23 (BFSPN1), B 24 (BFSPN2), C 25 (BFSPN3), which have the same design. The phase A block of the static voltage converter 23 (BFSPN1) consists of digitally controlled keys 26 (TsK1), 27 (TsK2), 28 (TsK3), 29 (TsK4), 30 (TsK5), 31 (TsK6), the digital inputs of which are connected to digital the inputs and outputs of the microprocessor unit 1 (BM).

The digitally-controlled keys 26 (TsK1), 27 (TsK2) are first connected to phase A of the three-phase output of the unit of the static voltage converter 9 (BSPN). The second side of the digital-controlled key 26 (CC1) is connected to the first sides of the digital-controlled keys 28 (CC3), 29 (CC4). The digitally-controlled key 28 (CC3) is connected by a second side to the first DC output of the voltage transformation and conversion unit 2 (BTPN1). The digitally-controlled key 29 (TsK4) is connected by a second side to the first side of the digitally controlled key 30 (TsK5) and to the second DC output of the voltage transformation and conversion unit 2 (BTPN1). The digital key 27 (CC2) is connected by a second side to the second side of the digital key 30 (CC5) and to the first side of the digital key 31 (CC6), which is connected to the third DC output of the voltage transformation and conversion unit 2 (BTPN1).

The phases of the phases of the static voltage converter B 24 (BFSPN2) and C 25 (BFSPN3) are respectively connected to the phases B and C of the three-phase output of the block of the static voltage converter 9 (BSPN) and with three DC outputs of the voltage transformation and conversion unit 2 (BTPN1). The digital inputs of the phase blocks of the static voltage converter B 24 (BFSPN2), C 25 (BFSPN3) are connected to the digital inputs and outputs of the microprocessor unit 1 (BM).

The computing block of capacitor banks 4 (VBKB) (figure 4) contains blocks for implementing the equations of capacitors 32 (BRUK1), 33 (BRUK2) and a block for generating zero point current 34 (BFTNT), the outputs of which are connected to the inputs of the block of voltage-current converters 15 ( BPNT4). A multi-channel analog-to-digital conversion unit 5 (BMACP) and a zero point current generating unit 34 (BFTNT) are connected to the outputs of the blocks for implementing the equations of capacitors 32 (BRUK1), 33 (BRUK2), and the digital inputs and outputs of the microprocessor unit 1 are connected to the digital inputs ( BM).

The first input of the block for implementing the equations of capacitors 32 (BRUK1) is connected to the first DC output of the transformation and voltage conversion unit 2 (BTPN1). The second input of the block for the implementation of the equations of capacitors 32 (BRUK1) and the first input of the block for the implementation of the equations of capacitors 33 (BRUK2) are connected to the second DC output of the transformation and voltage conversion unit 2 (BTPN1). The second input of the block for implementing the equations of capacitors 33 (BRUK2) is connected to the third DC output of the transformation and voltage conversion unit 2 (BTPN1).

Microprocessor unit 1 (BM) is implemented using STM32F207VGT6 microprocessors. Block of multi-channel analog-to-digital conversion 5 (BMACP) - using analog-to-digital converters MAX1324ESM +. All blocks of voltage-current converters 6 (BPNT1), 7 (BPNT2), 8 (BPNT3), 15 (BPNT4) are implemented by AD534KDZ microelectronic voltage-current converters. Digitally-controlled longitudinal switching units 10 (BTsPrK1) and 11 (BTsPrK2), digitally-controlled transverse 12 (BTsPoK1) and 13 (BTsPoK2) switching units, phase voltage static-phase converter blocks V 24 (BFSPN2) S 25 (BFSPN3), and digitally controlled keys 26 (TsK1) ), 27 (TsK2), 28 (TsK3), 29 (TsK4), 30 (TsK5), 31 (TsK6), are implemented using digitally controlled analog keys MAX4661.

Blocks for the implementation of equations magnetically coupled by a phase A flow to circuits 20 (BRUMPK1), 21 (BRUMPK2), a block for implementing the equation of balance of magnetomotive forces and a magnetization curve 22 (BRUBMSiKN), as well as similar blocks contained in blocks for implementing the equations of phase B 17 (BRUFK B) and C 18 (BRUF C) and phase voltage generating unit 19 (BFFN) have a digital-analog structure that allows for the implicit continuous integration of the differential equations of a three-phase two-winding transformer below. In particular, the mentioned blocks are implemented using the following microelectronic components: AD 5443 digital-to-analog converters, OP 37 operational amplifiers, and digital-controlled analog keys MAX4661. The blocks for implementing the equations of capacitors 32 (BRUK1), 33 (BRUK2), assembled according to the inertial link simulation circuit with a summing amplifier at the input, and zero point current generating unit 34 (BFTNT), assembled according to the summing amplifier circuit, are implemented using microelectronic components: digital-to-analog AD 5443 converters, OP 37 operational amplifiers, digital-controlled analog keys MAX4661.

A device for modeling a combined power flow controller operates as follows.

When the supply voltage is turned on, the microprocessor unit 1 (BM) gives out, generated in this unit or received from a personal computer / server, control actions on the digital inputs of the voltage transformation and conversion unit 3 (BTPN2), the static voltage converter unit 9 (BSPN), and the computing unit 4 capacitor banks (VBKB), digitally-controlled longitudinal units 10 (BTsPrK1), 11 (BTsPrK2) and transverse 12 (BTsPoK1), 13 (BTsPoK2) switching and computing unit of transformer 14 (BTT).

The computing unit of the transformer 14 (VBT) and the computing unit of the capacitor banks 4 (VBKB), by continuous implicit integration, solve differential equations describing the processes in the transformer and capacitor batteries.

The implementation unit of the equation magnetically coupled by the phase A flow of circuits 20 (BRUMPK1) solves the following equation:

$$W_{A\mathrm{one}}\frac{d{F}_A}{dt}\pm L_{A\mathrm{one}}\frac{d{i}_{A\mathrm{one}}}{dt}+R_{A\mathrm{one}}{i}_{A\mathrm{one}}-u_{A\mathrm{one}}=0\left(\mathrm{one}\right)$$

where W _A1 is the number of turns of the primary winding of phase A;

Ф _А - value of the main magnetic flux of phase A;

L _A1 is the dissipation inductance of the primary phase A winding;

i _A1 is the current value in the primary winding of phase A;

R _A1 is the active resistance of the primary winding of phase A;

u _A1 is the voltage value of the primary winding of phase A.

The variables necessary for the solution are received at the input of the implementation block of the equation of the magnetically coupled phase A flow of circuits 20 (BRUMPK1): the magnetic flux from the output of the block for the implementation of the equation of balance of magnetomotive forces and the magnetization curve 22 (BRUBMSiKN) and the voltage of the primary winding of phase A from the output of the phase voltage generating unit 19 (BFFN) taking into account the connection schemes of the transformer windings.

At the first and second outputs of the block for the implementation of equations magnetically coupled by the phase A flow of circuits 20 (BRUMPK1), the primary winding currents with the minus and plus signs, represented by voltage, are generated, respectively. The alternating current of the primary winding with a minus sign is fed to phase A of the first three-phase output of the computing unit of the transformer 14 (WBT). The alternating current of the primary winding with a plus sign is fed to phase A of the second three-phase output of the computing unit of the transformer 14 (WBT) and to the input of the multi-channel analog-to-digital conversion unit 5 (BMACP).

The implementation unit of the magnetically coupled phase A flow of circuits 21 circuits 21 (BRUMPK2) implements a continuous solution to an equation similar to (1). The input of the block for the implementation of the equation of the phase A magnetically coupled by the flow of phase A circuits 21 (BRUMPK2) receives: the magnetic flux from the output of the block for the implementation of the equation of balance of the magnetomotive forces and the magnetization curve 22 (BRUBMSiKN) and the voltage of the secondary winding of phase A from the output of the phase voltage generating unit 19 (BFFN). The implementation unit of the magnetically coupled equation of phase A flow of circuits 21 (BRUMPK2) generates at the output the alternating current of the secondary winding represented by the voltage with a plus sign, which is fed to the third three-phase output of the computing unit of transformer 14 (VBT). The alternating current of the primary winding is fed to phase A of the third three-phase output of the computing unit of the transformer 14 (WBT) and to the input of the multi-channel analog-to-digital conversion unit 5 (BMACP).

The blocks for the implementation of equations magnetically coupled by the phase A flow of circuits 20 (BRUMPK1), 21 (BRUMPK2) contain digital-to-analog converters with which the coefficients of equation (1) are realized. The digital-to-analog converters are controlled by the microprocessor unit 1 (BM).

The implementation unit of the balance equation of magnetomotive forces and the magnetization curve 22 (BRUBMSiKN) solves an equation of the form:

$$F_{\mu A}=W_{A\mathrm{one}}\cdot i_{A\mathrm{one}}-{\mathrm{<figure-callout\; id="2"\; label="W\; A"\; filenames="00000007.png,00000008.png"\; state="\{\{state\}\}">W\; </figure-callout>}}_A\cdot i_{A2};\left(2\right)$$

where F _µA is the magnetizing force of the electromagnetic system of phase A of the transformer, determined by the magnetization curve F _µA ≡i _µA = ƒ (Ф _А ).

The input phase of the implementation of the equation of balance of the magnetomotive forces and the magnetization curve 22 (BRUBMSiKN) receives the phase currents expressed by voltage from the outputs of the blocks for the implementation of the equations magnetically coupled by the phase A flow of circuits 20 (BRUMPK1), 21 (BRUMPK2).

The output values are: phase A magnetic flux non-linearly proportional to the magnetization current, which is fed to the inputs of the blocks for implementing equations magnetically coupled by phase A flux of circuits 20 (BRUMPK1), 21 (BRUMPK2) and the input of the multi-channel analog-to-digital conversion 5 (BMACP), as well as the current magnetization, which is fed to the input of the multi-channel analog-to-digital conversion unit 5 (BMACP). The magnetization curve is set in the microprocessor unit 1 (BM) table or using piecewise linear or nonlinear approximation, for example:

$$F_{\mu A}\equiv i_{\mu A}=K_{\mu A}{F}_A^P;\left(3\right)$$

where K _µA is the dimension coefficient realized when moving to relative units of measure;

p is the exponent taken p = 3 or p = 5, although the most effective approximation of the nonlinear dependence F _µA ≡i _µA = ƒ (Ф _А ) is achieved at non-integer values of p.

The microprocessor unit 1 (BM), based on a given magnetization curve, controls the digital-to-analog converter of the unit for implementing the equation of balance of magnetomotive forces and the magnetization curve 22 (BRUBMSiKN), which implements the coefficient of nonlinear proportionality of the magnetization current and magnetic flux.

The instantaneous values of the phase voltages are fed to the inputs of the phase voltage generating unit 19 (BFFN) from the three-phase inputs of the computing unit of the transformer 14 (WBT). The microprocessor unit 1 (BM) controls the analog keys of the phase voltage generating unit 9 (BFN). Depending on the position of these switches, phase voltage variables are formed at the outputs of the phase voltage generating unit 19 (BFFN) taking into account the connection scheme of the windings.

From the outputs of the phase voltage generating unit 19 (BFFN), the phase voltage variables are fed to the inputs of the blocks for implementing the equations of the magnetically coupled phase A circuits 20 (BRUMPK1), 21 (BRUMPK2), to the inputs of the multi-channel analog-to-digital conversion 5 (BMACP) and to the inputs of the blocks the implementation of the equations of phase B 17 (BRUF B) and C 18 (BRUF C) of the transformer.

The blocks for implementing the equations of phase B 17 (BRUF B) and C 18 (BRUF C) solve equations similar to (1) and (2) and, as a result, form variable phase currents of the primary and secondary windings of the transformer, main magnetic fluxes and currents, expressed by voltages, at the outputs magnetization, which are fed to the inputs of the multi-channel analog-to-digital conversion unit 5 (BMACP). From the outputs of the blocks for implementing the equations of phase B 17 (BRUF B) and C 18 (BRUF C), the variable phase currents of the primary and secondary windings of the transformer are supplied to the corresponding phases of the three-phase outputs of the computing unit of transformer 14 (VBT).

From the three-phase outputs of the computing unit of the transformer 14 (VBT), the variable phase currents, expressed by voltages, are supplied to the voltage-current converter units 6 (BPNT1), 7 (BPNT2), 8 (BPNT3), which convert them into physical phase currents. Three-phase voltages, at the outputs of the blocks of voltage-current converters 6 (BPNT1), 7 (BPNT2), 8 (BPNT3), naturally formed as a result of flowing physical currents, are supplied to the three-phase inputs of the computing unit of transformer 14 (WBT).

The digitally-controlled longitudinal switching units 10 (BTsPrK1), 11 (BTsPrK1) physically connect / disconnect the device for modeling the combined power flow controller to external devices, for example, to other modeling devices or to physical equipment. The digitally controlled lateral switching blocks 12 (BTsPoK1) and 13 (BTsPoK2) carry out phase-to-phase faults and earth faults. The states of digital-controlled analog keys of digital-controlled blocks of longitudinal 10 (BTsPrK1), 11 (BTsPrK1) and transverse 12 (BTsPoK1), 13 (BTsPoK2) switching are controlled by microprocessor unit 1 (BM).

The unit of the static voltage converter 9 (BSPN) converts a three-phase AC voltage into three-level DC voltage, which is supplied to the DC outputs of the transformation and voltage conversion unit 2 (BTPN1).

The voltage is converted by switching digitally-controlled keys 26 (TsK1), 27 (TsK2), 28 (TsK3), 29 (TsK4), 30 (TsK5), 31 (TsK6) and digitally-controlled keys of the phase blocks of the static voltage converter B 24 (BFSPN2), C 25 (BFSPN3). The voltage conversion is controlled by a block of microcontrollers 1 (BM) in accordance with a predetermined algorithm, for example, in accordance with a pulse-width modulation algorithm [Nikolaev A.V. Development of the principles of control of a static compensator (STATCOM) and the study of its operation in AC and DC substations: Diss. for the degree of Cand. tech. sciences. - St. Petersburg: NIIPT, 2005. - 161 p., Pp. 61-63].

Three-level DC voltages generated at the outputs of voltage transformation and conversion unit 2 (BTPN1) are supplied to the inputs of the computing unit of capacitor banks 4 (VBKB).

The block for the implementation of the equations of the capacitor 32 (BRUK1) implements a continuous solution of the differential equations describing the processes in the first capacitor:

$$\{\begin{array}{l}{i}_{C\mathrm{one}}=\frac{-U_{C\mathrm{eleven}}+U_{C12}-U_{CC\mathrm{one}}}{R_{C\mathrm{one}}};\hfill \\ \frac{d{U}_{CC\mathrm{one}}}{dt}=\frac{\mathrm{one}}{C_{C\mathrm{one}}}{i}_{C\mathrm{one}},\hfill \end{array}\left(3\right)$$

where i _C1 is the current of the first capacitor;

u _C11 is the voltage at the first end of the first capacitor;

u _C12 is the voltage at the second end of the first capacitor;

u _CC1 is the capacitive voltage of the first capacitor;

C _C1 is the capacitance of the first capacitor;

R _C1 is the active resistance characterizing the active losses in the first capacitor of the DC circuit of the combined power flow controller.

The inputs of the block for the implementation of the equations of the capacitor 32 (BRUK1) receive the variables necessary for the solution:

voltage at the first end of the capacitor coming from the first DC output of the transformation and voltage conversion unit 2 (BTPN1);

the voltage at the second end of the first capacitor from the second DC output of the transformation and voltage conversion unit 2 (BTPN1).

The block for implementing the equations of the capacitor 32 (BRUK1) at the output generates the current of the first capacitor i _C1 , expressed by voltage.

The block for the implementation of the equations of the capacitor 33 (BRUK2) implements a continuous solution of the differential equations of the second capacitor similar to (3).

The inputs of the block for the implementation of the equations of the capacitor 33 (BRUK2) receive the variables necessary for the solution:

the voltage at the first end of the capacitor coming from the second DC output of the transformation and voltage conversion unit 2 (BTPN1);

the voltage at the second end of the first capacitor from the third DC output of the transformation and voltage conversion unit 2 (BTPN1).

The implementation unit of the equations of the capacitor 33 (BRUK2) at the output generates the current of the second capacitor i _C2 , expressed by voltage.

The blocks for implementing the equations of capacitors 32 (BRUK1), 33 (BRUK2) contain digital-to-analog converters with which the coefficients of equation (3) are realized. The digital-to-analog converters are controlled by the microprocessor unit 1 (BM).

From the outputs of the blocks for realizing the equations of capacitors 32 (BRUK1) and 33 (BRUK2), the mathematical variables of the currents represented by the voltage are supplied to the inputs of the zero point current generating unit 34 (BFTNT), which summarizes them.

As a result, formed at the outputs of the block for the implementation of the equations of the capacitor 32 (BRUK1), the block forming the zero current

34 (BFTNT) and the block for the implementation of the equations of the capacitor 33 (BRUK2), represented by voltage, the mathematical variables of the currents are fed to the inputs of the block of voltage-current converters 15 (BPNT4), which converts them into model physical currents.

The results of the continuous solution of differential equations of type (3) come from the blocks for realizing the equations of the capacitor 32 (BRUK1), 33 (BRUK2) into the block of multi-channel analog-to-digital conversion 5 (BMACP).

The multichannel analog-to-digital conversion unit 5 (BMACP) digitizes the variables arriving at its inputs and transfers them to the microprocessor unit 1 (BM), and from it via a computer network to a personal computer / server.

The microprocessor unit 1 (BM) implements the algorithm of a digital automatic control system for a combined power flow controller.

Thus, the device allows you to simulate a combined power flow controller with a power system model, simulate normal, emergency and post-emergency processes, as well as automatically and automatically change the parameters of a combined power flow controller model and display the simulation results on a personal computer.

Claims (1)

A device for modeling a combined power flow controller containing two blocks of static voltage converters connected to each other, characterized in that it is equipped with two identical voltage transformation and conversion units, in each of which three three-phase outputs of the transformer computing unit are connected to the inputs of three voltage converter units -current, the first and second three-phase inputs of the transformer computing unit are connected to the first and second converter units voltage-current, with the first and second blocks of digitally controlled transverse switching, with the first and second blocks of digitally controlled longitudinal switching, the outputs of which are three-phase outputs of the device, the third three-phase input of the transformer computing unit is connected to the third voltage-current converter unit and to the static voltage converter unit, the outputs of two blocks of static voltage converters of the first and second blocks of transformation and voltage conversion are connected to each other and to the output The device’s odes, as well as the inputs of the computing unit of the capacitor banks and the outputs of the voltage-current converter unit, whose inputs are connected to the outputs of the computing unit of the capacitor batteries, and the computing units of the transformers of the transformation and voltage conversion units and the computing unit of the capacitor batteries are connected to the multi-channel analog digital conversion, which is connected to the microprocessor unit, which is connected to a personal computer / server, with a computing unit com capacitor banks, with transformer computing units, with digitally controlled longitudinal switching blocks, with digitally controlled lateral switching blocks and with static voltage converters blocks of voltage transformation and conversion blocks.

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