RU2473109C1 - Power coefficient corrector - Google Patents

Abstract

FIELD: electricity.

SUBSTANCE: power coefficient corrector comprises a bridge rectifier, an output capacitor, an accumulating throttle-transformer, a clock pulse oscillator, a key field transistor, the first rectifying high-frequency diode, the first rectifying high-frequency diode, besides, the corrector additionally comprises one auxiliary and one output capacitor, the second and third rectifying high-frequency diodes.

EFFECT: higher efficiency and reliability of a device, reduction of its dimensions.

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Description

The invention relates to electrical engineering, in particular to power factor correction devices in AC voltage sources, and can be widely used in electronics power devices and in power supply lines.

A known single-phase AC to DC converter with a power factor corrector, including an input rectifier, a current sensor, a transistor, a inductor, a cut-off diode, a capacitor, in parallel with which loads and an output voltage sensor are connected, a control circuit with a reference voltage source, the output of which is connected to one input comparison circuit, the other input of which is connected to the output of the output voltage sensor, and the output of the comparison circuit through a correcting device and integrator with timing th input is connected to one input of a comparator, whose output is connected to the count input of the flip-flop, whose input is connected to the output of the master oscillator, the flip-flop output line through the driver transistor connected to the gate, inverted oscillator output is connected with the timing input of the integrator. Additionally, a rectified network voltage sensor and a second corrective device connected between the output of the first comparison circuit and the input of the comparator are introduced. The second comparison circuit is made of a three-input, the inputs of which are connected to the outputs of both voltage sensors and the supply voltage source. The output through the corrective device is connected to the input of the integrator and one of the inputs of the first comparison circuit, and the clock input of the integrator is connected to the output of the master oscillator. The collector of the transistor is connected to the positive terminal of the rectifier, the emitter of which is connected to its negative terminal through the inductor and current sensor. In parallel to the inductor, a circuit is connected from a series-connected capacitor and a cut-off diode (see the description of the RF patent for utility model No. 92261, IPC H02M 9/06, publication 03/10/2010).

A disadvantage of the known converter and corrector is the presence of 3 sensors (2 voltages and 1 current), leading to a complication of the control circuit. The presence of 3 comparators, an integrator, corrective devices leads to a decrease in the efficiency of the device due to energy dissipation on the control elements.

A charging device is known, including a secondary source interconnected with an input capacitor, a network voltage unit with a bridge rectifier and a diode bridge, a power factor corrector, which is made in the form of a control unit, inductance, a diode with a key, dividers on resistors, an overvoltage control unit, and lock key - open (see the description of the patent of the Russian Federation for utility model No. 50058, IPC H02J 7/00, publication 10.12.2005).

A disadvantage of the known charging device is the presence of voltage dividers, leading to additional energy losses, and the functional purpose of some nodes in the process of stabilization and correction of the current shape is not indicated.

A known power factor corrector (Fig. 1) comprising a network rectifier (1), a choke (2), a current sensor (3), a key (4), a key control circuit (5), a first transformer (6), a second transformer (9 ), voltage limiter (12), output resistive divider (13), first, second, third, fourth and fifth rectifier diodes (14-18), output capacitive filter (19), output buses (20, 21) for connecting the load ( see the description of the invention to the patent of the Russian Federation No. 2379743, IPC G05F 1/70, publication 01/20/2010).

A disadvantage of the known device is that to control the operation of the power factor corrector, three signals are required that are taken from the output of the device, which required the introduction of a resistive output voltage divider and a current sensor, two current transformers (input and output), a zener diode, which degrade the overall size and efficiency devices whose losses are more than two orders of magnitude compared to the input power of the chip.

The task of the invention is to simplify the corrector of the power factor in order to increase the efficiency and reliability of the device, as well as reduce its dimensions.

The invention is expressed in that the inventive power factor corrector comprises a bridge rectifier, an output capacitor, a storage choke transformer, a clock pulse generator, a key field effect transistor, a first high-frequency rectifier diode and additionally contains one auxiliary and one output capacitor, a second and third high-frequency rectifier diodes.

In order to minimize energy losses in the power corrector, the output voltage is controlled and the maximum current is limited only by the supply voltage of the control device, which is a constant part of the output voltage of the power factor corrector, it is started and stabilized without the use of additional elements by the power factor corrector itself.

The claimed invention allows to simplify the structure of the power factor corrector and increase its efficiency by eliminating resistive current sensors, input and output voltage dividers and a stabilized power source.

The invention is illustrated by drawings, where figure 1 shows a prototype corrector power factor according to the patent of Russian Federation No. 2379743, IPC G05F 1/70. publication 01/20/2010, and figure 2 shows the electric circuit diagram of the inventive power factor corrector.

The inventive power factor corrector comprises a bridge rectifier 1, a capacitor 2, a storage choke (transformer) 3, a clock pulse generator 4, a key field effect transistor 5, a first high-frequency rectifier diode 6, a first output capacitor 7, a second output capacitor 8, a second and third high-frequency rectifier diodes 9 and 10.

The difference of the claimed power factor corrector from the prototype is that it additionally contains an auxiliary capacitor 2 and an output conductor 8, a second and third rectifier high-frequency diodes 9 and 10, and it eliminates elements that degrade the overall dimensions and efficiency of the device: current sensor, both transformers , a voltage limiter, an output resistive divider and four rectifier diodes,

The power factor corrector operates as follows.

If the frequency f _{T of the} clock generator 4 is much higher than the frequency fc of the network (f _T / fc≈10 ³ ), then for one period of the clock frequency, T _T = 1 / f _T , the mains voltage practically does not change:

[U _s (t + T _T ) / U _s (t)] ≤f _T / f _s ≈0

The average value of the sawtooth current consumed from the network for one period of the clock frequency at a time τ _{T of the} open state of the key transistor (5) is determined by the ratio:

I _cf (T _T ) = τ _T U _s (t) / 2T _T L _dr = U _s (t) [k _T / 2L _dr ],

where I _cf (T _T ) is the average current value for the period of the clock frequency,

U _with (t) is the current value of the supply voltage,

L _dr - the inductance of the inductor 3,

k _T = τ _T / T _T - duty cycle fill factor.

Therefore, the average current over a period of clock pulses is proportional to the voltage of the supply network, because the inductance of the inductor is determined only by its design in the absence of core saturation.

The shape of the current consumed from the network is proportional to the instantaneous value of the network voltage at a constant duty cycle of the control pulses for half a period of the supply network.

The average value of the current drawn from the harmonic voltage network is also determined only by the duty cycle of the clock pulses and the amplitude of the network voltage:

I _cp (T _a) = k _T U _mc / πL _etc.

where U _ms is the amplitude value of the network voltage.

The maximum current strength in the load cannot go beyond the limits determined by the maximum value of the fill factor k _T = k _Tmax at the level of:

I _max = U _ms (t) [k _Тmax / 2L _dr ]

If the strength of the current consumed from the network is not equal to the current strength I _{n of the} load of the power factor corrector (KKM), then the voltage at the storage capacitor KKM changes:

ΔU _out = [I _av (T _s ) -I _n ] Δt / C _out

where ΔU _o - voltage change at the output capacitor,

Δt is the voltage change time,

With _o - the capacity of the output capacitor.

Those. when controlling KKM it is impractical to include high-voltage resistive voltage dividers and a resistive current sensor, losing energy on them:

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It is enough to monitor the output voltage of the KKM.

This allows you to simplify the CMC (see figure 2).

The corrector works as follows.

The input voltage (AC or DC) is supplied to the bridge rectifier 1, from it through a series-connected inductor 3 and a rectification diode 6 is supplied to a series-connected high-voltage 7 and low-voltage 8 capacitor, which perform the functions of the output voltage divider and energy storage device to supply the load. The voltage occurring on the capacitor 8 is used to power the device 4 for controlling the transistor 5. The transistor is connected by drain to the connection point of the inductor 3 (terminal 2) with the anode of the diode 6, and the source to the minus of the rectifier 1. After charging the capacitor 8 (in time <10 ms ) the generator 4 and the transistor 5 begin to work. The pulses arising on the drain of the transistor 5 are rectified by the diode 6 and charge the capacitors 7 and 8 to a voltage exceeding the maximum amplitude of the mains supply voltage. The pulse voltage arising on the inductor 3 (winding I, terminals 1-2), using the auxiliary winding II (terminals 3-4), the capacitor 2 and the rectifier diodes 9-10, charges the capacitor 8. The voltage of the capacitor 8 is a constant part of the output voltage , depending only on the ratio of the number of turns in the inductor windings and the residual voltage on the diodes 9-10, is used to power the control device 4 and to change the duty cycle of the pulses generated by the generator.

The claimed invention allows to increase the efficiency of the device, does not require resistive voltage dividers and a current sensor, which greatly simplifies the logic and structure of the circuit, reduces energy loss and increases the reliability of the device.

Claims (1)

A power factor corrector comprising a bridge rectifier connected in series, a storage choke-transformer, a first high-frequency rectifier diode, auxiliary and output capacitors, a clock generator, a key field-effect transistor; a key field-effect transistor with a storage choke-transformer and the first high-frequency rectifier diode, as well as with a bridge rectifier; a series-connected storage inductor-transformer, output capacitor, second and third rectifier high-frequency diodes and an output capacitor, characterized in that the output high-voltage capacitor is connected in series with the smoothing capacitor of the low-voltage rectifier, which provides start-up and power supply to the generator, and the duty cycle of the clock generator is controlled by voltage removed from the half-bridge rectifier power supply of the clock generator, which is constant part of the output voltage corrector that allows to eliminate heat losses from resistive divider output voltage corrector without loss of efficiency.

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