RU2454793C1 - Digital communications system - Google Patents

Abstract

FIELD: information technology.

SUBSTANCE: in a digital communication system, the count sign is not transmitted and instead of 7, all 8 codeword bits are used to transmit the count modulus, which reduces quantisation noise by 6 dB, thus increasing voice quality at the receiving side. The transmitting side includes a half-wave rectifier which transmits only positive counts at the output and a negative count restorer at the receiving side.

EFFECT: high quality of speech reconstruction owing to reduction of quantisation noise by 6 dB by increasing the number of bits per unit for transmitting the count modulus.

2 dwg

Description

The invention relates to the field of transmission and reception of digital signals described in various sources, for example in:

1. Shmytinsky V.V., Kotov V.K., Zdorovtsov I.A.

Digital information transmission systems in railway transport. - M .: Transport, 1995.

2. Tyurin V.L. Multichannel communication in railway transport. - M.: Transport, 1992.

3. Neyman V.I. Systems and networks for data transmission in railway transport. - M .: Route, 2005. - S.127-132.

By technical nature, the digital system PCM-30, described in the first source, which is for this reason taken as its prototype, is closest to the invention. Other sources describe analogues of the invention.

The prototype encoder on the transmitting side consists of a control device and a comparator connected in series, a digital register, a control signal conversion device, FES switching device, two reference signal conditioners (FES), the output of which is connected to the second input of the comparator, the first input of which receives the analogue count speech signal (PC). The control device is connected by its output to the control input of the comparator and the digital register, which is the output unit of the encoder. The encoder works according to the weighing method, for which 11 reference segments are used. In it, coding is combined with quantization and companding of signals. The nonlinear quantizing characteristic is quasi-logarithmic, which is obtained by replacing the smooth logarithmic curve with a broken line, consisting of 8 rectilinear segments-segments in the positive and negative regions, each of which is connected to two points of the smooth curve. The duration of each subsequent segment, starting from the 3rd, doubles in relation to the previous one. There is no compression within each segment. Each PC reference level in digital form is represented by 8 bits (bits), called a code word. The first bit carries information about the reference sign, bits from 2 to 4 determine the number of the segment within which the amplitude of the input sample is located, and the remaining bits from 5 to 8 determine the interval of linear quantization within this segment. The structure of the PCM-30 decoder on the receiving side coincides with the structure of the encoder except that:

- instead of the comparator with its connections, a differential amplifier is used, the output of one FES is connected to one input of it, and the output of another FES to the other input;

- there is no control unit;

- the digital signal is fed to the input of the digital register, and the output signal is removed from the output of the differential amplifier.

It can be seen that the ICM-30 encoder and decoder are complex, and the PC reference module is determined by 7 bits, not 8 bits, in which the quality of the restored speech meets the requirements of commercial telephone communications. At 7 digits, quantization noise is 6 dB higher than at 8 digits.

The main disadvantage of the prototype is increased by 6 dB the level of quantization noise compared to the required.

The technical result of the invention is to improve the quality of the restored speech by reducing the level of quantization noise by 6 dB, which is achieved by increasing by one the number of bits for transmitting the reference module.

The essence of the invention lies in the fact that in a digital communication system consisting on the transmitting side of an analog speech signal source (PC), a time sampler, a sample level compressor, a sample expander, a digital encoder, a parallel to serial converter, a pulse amplifier, a communication line as well as from a pulse generator, a time delay block of a pulse, a clock pulse generator, moreover, the pulse generator with its output is connected to a high-frequency (including) input of the direct sampling device But to the second input of the expander of samples - through the time delay unit, and the output of the clock generator is connected directly to the clock input of the code converter, and on the receiving side - from the receiver pulse generator, pulse regenerator, serial code to parallel converter connected in series to the communication line , a digital decoder, an expander of samples, a low-pass filter, a half-wave rectifier with an active load is additionally introduced on the transmitting side, through which the PC sampler output is connected to the compressor input, and on the receiving side, a sample envelope filter, a unipolar to bipolar pulse converter, a time sampler by a pulse generator connected to its second input, a time integrator connected to the output of the lower filter frequencies.

A significant difference of the invention is the transmission of only positive samples, and negative samples are restored on the receiving side. This made it possible not to transmit a reference sign, but to use its bit to transmit positive samples. In this case, the codeword is not 7, as in the prototype, but 8 bits, which makes the quantization noise reduced by 6 dB. The introduced elements realize what was said.

The invention is illustrated by drawings.

Figure 1 presents the structural diagram of the proposed digital communication system, and figure 2 is a timing diagram explaining its operation. Figure 1 indicates: 1 - source of an analog speech signal (PC), 2 - PC time sampler, 3 - pulse generator, 4 - half wave rectifier with active load, 5 - sample level compressor, 6 - sample duration expander, 7 - time delay unit, 8 - digital sample encoder, 9 - parallel to serial code converter, 10 - clock pulse generator, 11 - digital signal (CS) pulse amplifier, 12 - communication line, 13 - pulse amplifier, 14 - pulse generator , 15 - follower converter code in parallel, 16 - DS decoder, 17 - expander, 18 - envelope filter, 19 - block excluding the DC component of the signal, 20 - time sampler, 21 - sample pulse generator, 22 - pulse amplitude limiter amplifier, 23 - integrator by time, 24 - low-pass filter (low-pass filter). Entered elements are outlined with a dashed line.

The operation of the circuit of the proposed digital system is as follows.

On the transmitting side, the speech signal from block 1 is fed to the bass sampler input 2, on vh the input of which pulses of short duration are supplied from generator 3. The repetition rate of these pulses is determined by Kotelnikov's theorem and is equal to 8 kHz. From the output of block 2, bipolar samples are fed to the input of a half-wave rectifier 4 with an active load, which passes only positive samples to its output. These samples are compressed by the level in block 5, after which they are fed to the input of the sample expander, to the other input of which pulses are sent from the generator 3 through block 7 of the time delay for the duration τ. At the block output, there are rectangular-shaped samples of different amplitudes, but of the same duration τ, which are fed to the input of encoder 8. Here, the sample amplitude is converted to a digital 8-bit parallel code signal, which is fed to one input of the parallel code converter 9 into serial. To the second input of block 9, clock pulses from the generator 10 are supplied. From the output of block 9, the serial code digital processor enters through the amplifier 11 into the communication line 12. On the receiving side of the digital signal processor, the digital signal from the communication line passes through the pulse amplifier 13, the pulse generator 14 to the information input of the serial converter 15 code in parallel, the clock input of which receives pulses from block 14. From block 15, the CA goes to decoder 16, at the output of which there are PC readings. These samples expand in level in expander 17, compensating for the compression in the compressor on the transmitting side, and then they are fed to the negative pulse reducer, which were eliminated on the transmitting side by rectifier 4. The first reducer block circled by the dashed line is the filter 18 envelope of samples, at the output which unipolar n.ch. pulses, as shown in figure 2. Block 19, which is a large-capacity capacitor, eliminates the constant component of these pulses, which is why they are converted from unipolar to bipolar, as shown in figure 2 with a dashed line. These bipolar impulses arrive at low frequency. sampler input 20, on h the input of which is received by pulses from a generator 21 of the same frequency as from block 3. In block 20, negative pulses are restored, which, after amplification and limitation in amplitude in block 22, as shown in FIG. 2, arrive at the input of the integrator 23 in time. It recovers a PC with a stepped envelope, which is converted to a smooth one in the low-pass filter 24, which is the output unit of the receiver.

The technical and economic effect of the invention is to improve the quality of the restored speech at the output of the receiver by reducing the quantization noise by 6 dB, which is obtained by eliminating the transmission of negative samples and increasing the bit depth of the code word by one. The aforesaid is implemented by the introduced elements.

Claims (1)

A digital communication system consisting of a source of analogue speech signal (PC) in series, a time sampler, a signal level compressor, a sample expander, a digital encoder, a parallel to serial code converter, an amplifier, a communication line, and a pulse generator , block delay pulses in time, the clock generator, and the pulse generator with its output connected to the high-frequency input of the sampler directly and to the second the input of the extender of the duration of the samples through the time delay unit, and the output of the clock generator is connected directly to the clock input of the code converter, and on the receiving side, from the pulse amplifier, pulse regenerator, serial code to parallel converter, digital decoder, connected to the communication line, signal level expander, low-pass filter (low-pass filter), characterized in that a half-wave rectifier with active load, through which the output of the PC discretizer is connected to the compressor input, and on the receiving side, a sample envelope filter, a unipolar to bipolar pulse converter, a time sampler with a pulse generator connected to its second input, a time integrator, the output of which is connected to the low-pass filter, which is the output unit of the receiver.

Images