RU2451419C1 - Television method for detecting mobile objects and apparatus for realising said method - Google Patents

Abstract

FIELD: information technology.

SUBSTANCE: signal charges of neighbouring frames are accumulated in a photodetector successively for a time interval exceeding the duration of the broadcast television subframe (T_k), and during accumulation of signal charges of a first frame from neighbouring frames, nondestructive measurement of the level of the formed charge relief is performed with period T_k, in the interval of its last row, by performing non-scanning "charge-voltage" conversion. Video signal voltage is detected and its value is compared with threshold voltage based on the criterion of a predetermined signal-to-noise ratio, wherein the accumulation process of the first frame continues if the current comparison result is less than the threshold, or is stopped if the current comparison result is equal to or higher than the threshold.

EFFECT: increase in sensitivity through automatic selection of accumulation time of compared frames depending on background illumination of the controlled scene.

2 cl, 14 dwg

Description

The present invention relates to television and can be used in the construction of television devices made on the basis of a photodetector in the form of a matrix of devices with charge coupling (CCD matrix) to detect moving objects in its field of view.

The closest in technical essence to the claimed invention should be considered a television method for detecting moving objects [1], which consists in the fact that the light flux from the monitored scene is projected onto the target of the CCD matrix, the information charges of the television frames are sequentially accumulated on the targets of the CCD matrix during the time period, not exceeding the period T _to half-frame broadcast, the accumulated charges are transferred to adjacent frames separately in two memory sections CCD, are transferred in parallel from the memory sections these CCD matrices, the charges of adjacent frames stored there are line-by-line into two horizontal output registers of the photodetector, element-wise read in each of the two output registers the charges of the rows of adjacent frames with the implementation on each of the two outputs of the CCD matrix for each element of the charge-voltage transformation, are formed from video signals of adjacent frames, the video signal of the interframe difference, comparing the signal of the interframe difference with a threshold voltage, registering the excess of the threshold with the signal of the interframe difference as an event, equivalent to detecting a moving object in the field of view of a photodetector.

The prototype works with the accumulation cycle corresponding to the broadcast half-frame period T _k (20 ms). Therefore, in conditions of low background illumination and low contrast of the intruder object relative to the background, video signals of inter-frame difference are possible due to the limited sensitivity of this technical solution.

The objective of the invention is to increase the sensitivity by automatically selecting the accumulation time of the compared frames, depending on the background illumination of the monitored scene.

The problem is solved in that in the claimed television method for detecting moving objects, which consists in the fact that the light flux from the monitored scene is projected onto the target of a matrix of devices with charge-coupled (CCD matrix), sequentially accumulate information charges of television frames on the targets of the CCD matrix, transfer the accumulated the charges of each of the adjacent frames separately in two sections of the memory of the CCD matrix; in parallel, they transfer from the sections of the memory of the CCD matrix the charges of adjacent frames stored there in row two the horizontal output registers of the photodetector, the charges of the rows of adjacent frames with the implementation of the CCD matrix for each element of the charge-voltage conversion on each of the two outputs of the CCD are element-wise read out in each of the two output registers, the video signal of the inter-frame difference is formed from the video signals of the adjacent frames, the signal of the inter-frame difference is compared with a threshold voltage, registering a threshold exceeding by the signal of the interframe difference as an event equivalent to the detection of a moving object in the field of view of a photodetector ka, according to the invention operate accumulation information charges of adjacent frames in the photodetector sequentially during the same time interval greater than the duration of the broadcast television half-frame T _c, and in the process of accumulating information charges of the first of the adjacent frames is performed with a period T _c in the range of its of the last line, non-destructive measurement of the level of the formed charge relief by performing a charge-voltage non-reversal transformation, editing the voltage of the video signal and comparing its value with the threshold voltage according to the criterion of a pre-selected signal-to-noise ratio, while the accumulation of the first frame is continued when the current comparison result is less than the threshold, or completed if the current comparison result is equal to or exceeds the threshold.

The term “zero-voltage” charge-voltage transformation was proposed by the authors [2, p. 96] and means that the charge of the image signal can be realized without observing the basic rule of solid-state scanning, i.e. without resorting to the video signal as a result of the elementary transformation "charge-voltage", performed at the output of the horizontal register of the CCD matrix and tied to the coordinate of a specific pixel of the photodetector.

Comparative analysis with the prototype [1] shows that the inventive method is distinguished by the presence of new features, namely the presence of the following actions:

- implementation of a “long” accumulation of information charges of neighboring frames in the CCD matrix with automatic installation of the same exposure duration depending on the background illumination of the monitored scene;

- the process of accumulating the first of neighboring frames in separate "batches" of duration T _to ;

- non-destructive in nature measurement of the charge relief level on the target of the photodetector after each "portion" of accumulation.

The combination of known and new features is not known from the prior art, therefore, the claimed method meets the requirement of novelty.

The prototype device of the invention [1] contains a sequentially located and optically coupled lens and a target of a CCD matrix, consisting of a series of charge-coupled accumulation sections (targets), a first memory section, a first output register, a first charge-voltage conversion unit (CPS) , a separation electrode, a second section of memory and a second SEC, and the control inputs of the accumulation section, the first and second sections of memory, the separation electrode, the first and second output registers CCDs are connected to the corresponding outputs of the control voltage generator, consisting of a series-connected synchronizer and a set of level converters (set of controllers), consisting of separate controllers for each of the arrays of the CCD, the output of the first CPS of the CCD matrix is connected through the first video amplifier to the first input of the block subtraction, and the output of the second UBZN through the second video amplifier to the second input of the subtraction unit, the output of which is connected to the comparator, the second input of which is the threshold input to voltage, and the output is connected to the shaper of the alarm.

The problem in the inventive television device for detecting moving objects, designed to implement the claimed method, is solved by the fact that in the prototype device containing a sequentially located lens and a three-phase CCD matrix, consisting of a series of charge-coupled accumulation sections, the first memory section, the first output register , the first SPS, the separation electrode, the second memory section, the second output register and the second SPS, and the output of the first SPS of the CCD matrix p it is connected through the first video amplifier to the first input of the subtraction unit, and the output of the second BPZN is connected through the second video amplifier to the second input of the subtraction unit, the output of which is connected to the first comparator, the second input of which is a threshold voltage input, and the output is connected to the alarm driver, while the first , the second and third control inputs of the accumulation section, the first memory section, the second memory section, the combined first, second and third control inputs of the first and second output registers, as well as the control input d the separation electrode of the CCD matrix is connected to the corresponding outputs of the first control unit, the second control unit, the third control unit, the fourth control unit and the fifth control unit, respectively, and the control input of the second control unit is connected to the first output of the synchronizer, the second output of which is connected to the control input of the fourth control unit, a pulse shaper ( FI) and a series-connected charge measuring unit, a peak detector and a second comparator, the second input of which is a threshold voltage input, while the first input of the FI is connected to the third output synchronizer, and the second FI input - to the output of the second comparator, the first FI output - to the control input of the first control unit, the second FI output - to the control input of the third control unit, the third FI output - to the control input of the fifth control unit, the fourth FI output - to the first control input the CCD array accumulation section, the second control input of which is connected to the input of the charge measurement unit, the fifth output of the FI connected to the gate input of the second comparator, the sixth output of the FI connected to the reset input of the peak detector, and the seventh output of the FI connected to the gate input of the first a comparator.

Comparative analysis with the prototype shows that the claimed television device is characterized by the presence of new units: a pulse shaper (FI), a charge measuring unit, a peak detector and a second comparator, as well as connections with other blocks. The combination of known and new features is not known from the prior art, therefore, the claimed solution meets the requirement of novelty.

Increasing the sensitivity of the proposed technical solution is achieved by choosing the optimal accumulation time of two adjacent frames according to the results of non-destructive periodic measurements of the formed charge relief of the first frame directly on the target of the CCD. Therefore, this solution meets the requirement of inventive step.

Figure 1 shows a structural diagram of the inventive television device; figure 2 is a possible electrical circuit (in the FI) of the shaper of the intervals of accumulation; figure 3-4 - time diagrams explaining the operation of this shaper; figure 5-6 is a functional diagram of the shaper service signals (as part of the FI), necessary to perform non-destructive measurements of photo charges, and a timing chart explaining the operation of this shaper; 7-12 are timing diagrams explaining the operation of the claimed solution as a whole; on Fig - light characteristic of the CCD; on Fig is a structural diagram of a unit for measuring charge.

A television device for detecting moving objects (Fig. 1) contains a sequentially located lens 1 and a three-phase CCD matrix 2, consisting of successively connected by charge-coupling sections 2-1 accumulation, the first section 2-2 memory, the first output register 2-3, the first BPZN 2-4, the separation electrode 2-5, the second section 2-6 of the memory, the second output register 2-7 and the second BPZN 2-8; the inventive television device includes a first video amplifier 3, a second video amplifier 4, a subtraction unit 5, a first comparator 6, the second input of which is a threshold voltage input U _n1 , an alarm _driver 7, a synchronizer 8, a first control panel 9, a second control panel 10, a third control panel 11, the fourth control unit 12, the fifth control unit 13, FI 14, as well as the charge measuring unit 15, the peak detector 16 and the second comparator 17, the second input of which is the input of the threshold voltage U _n2 , the output of the voltage regulator 2-4 is connected through a video amplifier 3 to p the first input of the subtraction block 5, and the output of the BPZN 2-8 through the video amplifier 4 to the second input of the subtraction 5, the output of which is connected to the comparator 5, the output of which is connected to the shaper 7 of the alarm signal, while the first, second and third control inputs of section 2 -1, sections 2-2, sections 2-6, the combined first, second and third control inputs of the output registers 2-3 and 2-7, as well as the control input of the separation electrode 2-5 of the CCD matrix 2 are connected to the corresponding outputs of PU 9, PU 10, PU 11, PU 12 and PU 13, respectively, with the control input of PU 10 s is single with the first output of the synchronizer 8, the second output of which is connected to the control input of the control unit 12, while the first input of FI 14 is connected to the third output of synchronizer 8, and the second input of FI 14 to the output of comparator 17, the first output of FI 14 to the control input of PU 9, the second output of the FI - to the control input of the control unit 11, the third output of the FI 14 - to the control input of the fifth control unit 13, the fourth output of the FI 14 - to the first control input of section 2-1 of the CCD matrix 2, the second control input of which is connected to the input of block 15 charge measurement, and the fifth output of FI 14 is connected to the strobe ruyuschemu input of the comparator 17, the sixth output FI 14 - to the input "reset" of the peak detector 16, and the seventh output FI 14 - to the strobe input of the comparator 7.

The CCD matrix 2, like that of the prototype, has the organization of “personnel transfer” and contains three sections 2-1, 2-2 and 2-6 on one chip, two output registers 2-3 and 2-7, a separation electrode 2-5 and two BPS 2-4 and 2-8. Note that the domestic device A-1131 with an n-type channel and three-phase section and register control, designed specifically for television motion detectors, in order to isolate the difference between frames, potentially has the necessary circuit organization and can be considered a technological groundwork for the implementation of the invention. Information about the A-1131 device was published in [3].

The timing diagram of the control of the CCD matrix, which was used in the development of the device A-1131, and then on the basis of the prototype television device, is shown in Figs. 7 and 8.

Here are typical names of the signals presented in Fig.7:

figa - the first phase of the control section 2-1;

figb - the second phase of the control section 2-1:

figv - the third phase of the control section 2-1;

Fig.7g - the first phase of the control section 2-2;

figd - the second phase of the control section 2-2;

fige - the third phase of the control section 2-2;

Fig. 7g - control of the separation electrode 2-5.

The diagrams of the signals shown in Fig. 8 are made in the same time scale with the diagrams in Fig. 7, and for the convenience of using the diagrams of Fig. 8a repeats Fig. 7g.

List the designations of the signals in Fig. 8:

figa - control of the separation electrode 2-5;

figb - the first phase of the control section 2-6;

figv - the second phase of the control section 2-6;

Fig.8g - the third phase control section 2-6.

Details of the "pulse content" of these signals in the temporary sections "A" and "B" on an enlarged scale can be seen in Figs. 11-12.

Note that the three-phase control signals of the output register 2-3, coinciding with the three-phase control signals of the register 2-7, are no different from the similar control signals of the output register for the previously known two-section CCD matrix, and therefore their diagrams are not given in the materials of this application.

The synchronizer 8, as in the prototype, performs the functions of a clock generator and a shaper of the logical sequence of pulses required for the operation of the CCD matrix in the inter-frame subtraction mode with a period of 2T _to , at the pace of the television standard. Obviously, all the signals shown in Fig.7-8, in logical levels are formed in the synchronizer 8.

The pulse shaper FI 14, using the output signals of the synchronizer 8 as input control signals, provides the necessary logical control of the CCD in the inventive device. The timing diagram shown in FIGS. 9-10 illustrates the final pulse shaping performed in FIG. 14.

The “long” accumulation of adjacent frames of equal duration in the proposed solution is implemented in the FI 14 pulse shaper using a reversible counter that calculates the number of pulses following with a period of T _to , both in the summing mode and in the subtraction mode.

Consider the operation of a possible electrical circuit of the shaper of the intervals of accumulation on the example shown in figure 2. The decision was made on D1-D7 microcircuits. Note that in the RS-flip-flop (D6 chip), the state change is caused by the appearance of a logic level of 0 at one of its inputs. The timing diagram (figure 3) explains the operation of the entire circuit of the shaper.

присутствует высокий логический уровень, и в режиме вычитания, когда на входе

установлен низкий логический уровень.The counting sequence of pulses (see figv) is fed to the C-input of the reversible counter (chip D1). Assume for simplicity that a three-digit reversible counter is used. The diagrams 3d, 3d and 3d show the outputs of the counter, respectively, for the bits of units, twos and fours. Under these diagrams, in the leaders, are binary numbers corresponding to different states of the counter. Recall that the counter operates in the summation mode if the input

there is a high logic level, and in the subtraction mode, when at the input

low logic level set.

Assume that at time t _{0 the} second comparator 17 of the television device (see figure 1) is overturned. Then, a high voltage level will appear at the output of the comparator 17 (see Fig. 3a), which is fed to the second input of FI 14, and therefore to the control input of the accumulator interval shaper circuit.

переходит с высокого уровня на низкий (см. фиг.2б). В результате счетчик D1 после прихода на С-вход 5-го импульса переходит из состояния «100» в состояние «011», после прихода 6-го импульса - в состояние «010», а после 7-го импульса - в состояние «001». При этом на выходе элемента ИЛИ (D2), который выполняет логическое сложение трех разрядных сигналов счетчика D1, логическая 1 присутствует семь периодов Т_к (фиг.2ж). Когда на С-вход счетчика приходит 8-й импульс, он устанавливается в состояние «000» и удерживается в нем за счет прихода логической 1 на R-вход сброса данных с выхода элемента НЕ (D3). Одновременно RS-триггер (D6) переходит в состояние 0, а на его инверсном выходе появляется логическая 1. В результате счетчик D1 подготовлен к работе в режиме суммирования и после прихода 9-го импульса переходит в состояние «001», которое начинает отсчет нового цикла «вперед-назад».Therefore, the RS-flip-flop (D6) is set to state 1, a logic 0 is set at its inverse output, and the signal at the input

goes from high to low (see figb). As a result, the counter D1, after the 5th pulse arrives at the C-input, switches from state “100” to the state “011”, after the 6th pulse arrives, it switches to the state “010”, and after the 7th pulse it goes to the state “001” ". At the same time, at the output of the OR element (D2), which performs the logical addition of three bit signals of the counter D1, logical 1 there are seven periods of T _to (Fig.2g). When the 8th pulse arrives at the C-input of the counter, it is set to the state “000” and held in it due to the arrival of logical 1 at the R-input of data reset from the output of the element NOT (D3). At the same time, the RS-flip-flop (D6) goes into state 0, and logic 1 appears on its inverse output. As a result, the counter D1 is prepared for operation in the summing mode and after the arrival of the 9th pulse it goes into the state “001”, which starts a new cycle "back and forth".

It is obvious that the pulse signal at the output of the considered circuit (see FIG. 3g) contains the necessary information about the duration of the accumulation intervals T _n1 and T _n2 . Depending on the moment t _{0 of the} tipping of the comparator 17 in the inventive device, the countdown of the intervals T _n1 and T _n2 will take a longer or shorter time.

It should be noted that a situation is possible when, during the operation of the counter D1 in the summing mode, the pulse count is not interrupted, because there is no object movement in the control zone and, therefore, no violation is recorded. The resulting mode of operation of the shaper circuit is illustrated by timing diagrams in figure 4.

счетчика устанавливается уровень 0. Счетчик подготовлен к работе в режиме вычитания, а после прихода 8-го счетного импульса на его выходе устанавливается состояние «110» (см фиг.4г-4е). Счет «назад» завершается состоянием счетчика «000», а затем новый цикл работы отсчетов

и

(см. фиг.4ж).So, the comparator 17 does not work (see figa). Then, upon reaching the maximum number, in our example “111”, a logical 0 occurs at the output of the AND-NOT element (D7). As a result, the RS-trigger (D6) goes into state 1, and at the input

the counter is set to level 0. The counter is prepared for operation in the subtraction mode, and after the arrival of the 8th counting pulse, the state “110” is set at its output (see Figs. 4g-4e). The count "back" ends with the state of the counter "000", and then a new cycle of counting

and

(see FIG. 4g).

In this regard, it is necessary to indicate another design condition, namely, the choice of the required volume of the reverse counter (maximum number) is determined by the threshold illumination at the control object and the expected speed of the intruder.

As part of the FI 14 pulse shaper, the service signals necessary for performing periodic non-destructive measurements of the charge relief level in the CCD matrix are also implemented.

The block diagram of the shaper of these signals (see Fig. 5) contains a sawtooth voltage generator, a switch, and an element I. In this case, the line damping pulses (see Fig. 6a) are supplied to the first input of the shaper with a period T _s (see Fig. 6a), and the pulses are fed to the second input measuring line with a period of T _to , (see figv).

As a measuring line, it is advisable to choose the last line for the period T _to . The intermediate and output signals of the shaper are shown on the diagrams:

figb - output of the sawtooth voltage generator;

Fig.6g - output element And;

Fig.6d - the output of the switch.

A linear sawtooth voltage generator can be made according to a generator circuit based on two operational amplifiers (see, for example, [4, p. 257]), and a switch using analog keys of domestic K590 series microcircuits (see [5, p. 447]) .

The charge measurement unit 15 is designed to extract information on the charge distribution over the entire surface of the CCD matrix section 2-1 and contains (see Fig. 14) a current-voltage converter and a voltage amplifier connected in series.

The current to voltage converter can be performed on a single operational amplifier (see [6, p. 57]).

The peak detector 16 is designed to store the voltage proportional to the maximum level of the charge relief, which is measured by block 15. Before the start of the next measurement cycle, the detector is zeroed using a short-term positive pulse supplied to the “Reset” input. Block 16 can be made on the basis of two operational amplifiers (see, for example, [6, p. 300]).

The comparator 17 is designed to compare the level of the information signal from the output of the peak detector 16 and the threshold voltage U _n2 with an abrupt change in the output voltage when the information signal is greater than U _n2 . A feature of the comparator 17 is the comparison only if a high logic level is present at its gate input. This is necessary to eliminate false alarms of the comparator.

The lens 1, the CCD matrix 2, the first video amplifier 3, the second video amplifier 4, the subtraction unit 5, the alarm driver 7 and the PU 9-PU13 level converters do not differ in circuit design from the corresponding prototype blocks.

The first comparator 6, as in the prototype, compares the inter-frame difference signal from the output of the subtraction unit 5 with a threshold voltage U _n1 . A feature of the comparator 6 is the presence, like the comparator 17, of additional control at the input of the gating.

We will use for the subsequent description of the operation of the claimed television device for detecting moving objects by the time diagrams presented in Figs. 9-12.

The inventive device (see figure 1) works as follows.

The image of the monitored space is projected by the lens 1 onto the CCD sensor 2 accumulation section 2-1. The process of accumulation of photo charges in the CCD matrix in this solution has features, and therefore deserves detailed consideration.

For the sake of clarity, we assume that as a photodetector 2, a three-phase CCD with an n-type channel is used.

The pulse shaper FI 14 provides the beginning of this process after the arrival of the reverse counter of the first counting pulse. Moreover, during the forward course of the frame scan with a period of T _k , the bias that is high relative to the housing and matrix substrate acts in the first (see Fig. 9c) and second (see Fig. 9g) accumulation sections 2-1, which ensures potential wells under them photogeneration of information charges. Note that the signal on the first phase buses of section 2-1 is the sum of two components, namely, the signal from the output of the PU 9 (see Fig. 9a) and the signal from the output of FI 14 (see Fig. 9b). At this time, the low phase potential close to the potential of the CCD array pods is applied to the third phase buses of section 2-1 (see Fig. 9d), which excludes the formation of potential targets under the third electrodes of the photo target. In the interval of the last row of each period T _{k, the} potential at the first electrodes of section 2-1 decreases linearly (see Fig. 9c). As a result, in each element (pixel) of section 2-1, the process of transferring charges from potential wells under the first phase buses to potential wells under the second buses begins. Potential wells under the first phase electrodes are monotonously destroyed, and a current appears in the circuit of the second electrode of section 2-1, which is maximum at the first moment, and then monotonically drops. The amount of current in this external circuit is the sum of the currents of each pixel in section 2-1. Thus, the external current contains information on the charge distribution over the entire surface of section 2-1 of the CCD matrix obtained by the "non-development" method.

Block 15 performs the conversion of current into voltage, and peak detector 16, which is previously reset by a reset pulse (see Fig. 9g), remembers the maximum value of this voltage. Therefore, the output voltage of block 16 is proportional to the current level of the charge relief in section 2-1 of the CCD matrix.

If the voltage from the output of the peak detector 16 exceeds the threshold voltage U _{n2 of the} comparator 17, then the latter is overturned, and the process of accumulating photo charges in section 2-1 for the conditionally first information frame ends.

Assume that the voltage value from the output of block 16 corresponds to the level of intrinsic noise in the CCD matrix (see Fig. 13) and is less than the threshold voltage U _{n2 of the} comparator 17. Then, the comparator 17 saves the previous state, the reverse counter in FI 14 is the summation mode, and in section 2-1 of the CCD matrix, the accumulation process continues for at least one more period T _k , and during its last row, block 16 again measures the charge relief.

If the measurement result from the output of the peak detector 16 is again less than U _n2 , then the accumulation process in section 2-1 will continue for another period T _k , and then the measurement of the resulting charge array will be performed again.

It should be noted that a situation is possible where, due to the low illumination of section 2-1 of the CCD matrix, the result of the measurements of the charge relief turns out to be less than U _n2 up to the moment the reversible counter reaches the state of the maximum number. In this case, after the "maximum mark", the reverse counter goes into the subtraction mode, regardless of the state of the comparator 17.

Let according to the measurement results in the fourth cycle, as shown in Fig.9, the information signal exceeds the threshold voltage U _n2 . Then the comparator 17 overturns, and the process of accumulating conditionally the first frame ends. During the return stroke of the subsequent period T _k , charges of the 1st frame in the section are transferred. 2-2. Simultaneously with the comparator 17 overturning, the reverse counter is switched to the countdown mode, and as a result, the charge relief relief of the conditionally 2nd frame is accumulated in section 2-1 of the CCD matrix for the same time interval during which the 1st information frame was generated.

It should be noted that during the accumulation of the 2nd frame at the gate input of the comparator 17 (see Fig.9e) there is a low logic level that sets a low level at the output of the comparator regardless of the voltage value at the information input.

After the accumulation of the 2nd frame in section 2-1 is completed, its charge relief during the return stroke of the subsequent period T _{k is} transferred to section 2-2.

During the direct course of the first (from the moment the 2nd frame accumulation is completed) period T _{to the} charge packets of the 1st frame are transferred from section 2-2 through the first register 2-3 and the separation electrode 2-5 to section 2-6.

The control of the CCD matrix for carrying out charge transfer to section 2-6 is illustrated by time diagrams in FIG. 10 and its fragment “B” on an enlarged scale - in FIG. 12.

We give the name (designation) of each of these diagrams:

figa - gating control for the comparator 6;

figb - control of the separation electrode 2-5 of the CCD;

figv - the first phase of the control section 2-2;

Fig.10g - the second phase of the control section 2-2;

Fig.10dg - the third phase of the control section 2-2;

fig.10e - the first phase of the control section 2-6;

figure 10g - the second phase of the control section 2-6;

figs - the third phase of the control section 2-6.

Let us turn our attention to the charge relief of the previous 1st frame, which was previously transferred to section 2-6. It is stored there under the second phase buses until the transfer of the charge array of the 2nd frame to section 2-2 is completed. Note that the maximum storage time of the charges of the delayed frame is limited by the dark current density in the CCD and for modern devices without forced cooling is about one second (50Tk), which is quite enough for the practical implementation of the claimed television device.

The element-wise reading of the charge packets of the 1st and 2nd frames is performed in registers 2-7 and 2-3 at the same time in the interval of formation of the inter-frame difference (see Fig. 10). As a result, the video signal of the 1st frame from the output of the OUTPUT 2-8 and the video signal of the 2nd frame from the output of the OUTPUT 2-4 are supplied respectively through video amplifiers 4 and 3 to the inputs of the subtraction unit 5, which generates the video signal of the inter-frame difference.

In the case when there was a movement of the control object, a signal other than zero is displayed at the output of block 4. If this signal exceeds the set threshold voltage U _{n1 of the} first comparator 6, then the latter overturns. To eliminate false alarms of this comparator at its gate input, a high level is present only at the time the inter-frame difference is formed (see Fig. 10a).

Further, as in the prototype, the alarm driver 7 is set to a new logical state, providing sound and light registration upon registration of a moving object in the field of view of the television device.

In the proposed solution, the accumulation time of the photodetector is automatically adjusted to the background illumination at the controlled object; therefore, the signal-to-noise ratio отношении in the video signal of the delayed frame and the subsequent (direct) frame is always greater than unity. Ceteris paribus, this result guarantees a reduction in omission violations and an increase in the probability of detecting a moving object.

Currently, all the blocks of this solution are mastered or can be mastered by domestic industry, therefore, the proposed invention should be considered consistent with the requirement of industrial applicability.

INFORMATION SOURCES

1. Evgrafov G.N. and Skrylev A.S. Television camera on FPSS with analog frame memory. Abstracts of the IV conference "Charge-coupled devices and systems based on them" (Russia, Krasnodar Territory, Gelendzhik, September 27 - October 2, 1992). - Moscow, 1992 - 152 p.

2. Khromov L.I., Tsytsulin A.K., Kulikov A.N. Video informatics. Transfer and computer processing of video information. - M .: Radio and communications, 1991.

3. Skrylev A.S., Starovoitov V.I., Frost N.I. Photosensitive device with charge coupling A-1131 // Electronic industry. - 1991. - No. 7. - p. 83.

4. Falkenberry L. Application of operational amplifiers and linear ICs. / Translation from English. - M.: Mir, 1985.

5. Digital and analog integrated circuits: Reference book / S.V. Yakubovsky, L.I. Nisselson, V.I. Kuleshova and others. - M .: Radio and communications, 1990.

6. Peyton J., Walsh V. Analog electronics on operational amplifiers. / Translation from English. - M .: Binom, 1994.

Claims (2)

1. The television method for detecting moving objects, which consists in the fact that the light flux from the monitored scene is projected onto the target by a matrix of devices with charge coupling (CCD matrices), sequentially accumulate information charges of television frames on the targets of the CCD matrix, transfer the accumulated charges of each of the adjacent frames separately in two sections of the memory of the CCD array, in parallel, the charges of adjacent frames stored there are transferred from the sections of the memory of the CCD matrix line by line into two horizontal output registers of the photodetector, in each of the two output registers reads the charges of rows of adjacent frames element by element with the implementation of a CCD matrix for each element of the charge-voltage conversion at each of the two outputs, the video signal of the interframe difference is formed from the video signals of adjacent frames, the signal of the interframe difference is compared with a threshold voltage, registering the excess threshold signal of the inter-frame difference as an event equivalent to the detection of a moving object in the field of view of the photodetector, characterized in that they perform the accumulation of inf the charge of adjacent frames in the photodetector sequentially for a time interval exceeding the duration of the broadcast television half-frame T _k , and in the process of accumulating information charges of the first of the neighboring frames, with a period T _k in the interval of its last row, non-destructive measurement of the level of the formed charge relief by performing a non-destructive charge-voltage transformations, detect the voltage of the video signal and compare its value with the threshold voltage iem Browse preselected signal / noise ratio, the process continues accumulating the first frame, when the current comparison result is less than the threshold, or is completed when the current comparison result is equal to or exceeds the threshold. 2. A television device for detecting moving objects, comprising a sequentially located lens and a three-phase CCD matrix, consisting of a series of charge-coupled accumulation sections, a first memory section, a first output register, a first SPS, a separation electrode, a second memory section and a second SPS, the output the first SPS of the CCD matrix is connected through the first video amplifier to the first input of the subtraction block, and the output of the second SPS through the second video amplifier to the second input of the subtraction block One of which is connected to the first comparator, the second input of which is a threshold voltage input, and the output is connected to the alarm driver, while the first, second and third control inputs of the accumulation section, the first memory section, the second memory section, the combined first, second and third control the inputs of the first and second output registers, as well as the control input of the separation electrode of the CCD matrix, are connected to the corresponding outputs of the first control panel, second control panel, third control panel, fourth control panel and fifth control panel, respectively, p whereby the control input of the second control unit is connected to the first output of the synchronizer, the second output of which is connected to the control input of the fourth control unit, characterized in that a pulse shaper (FI) and series-connected charge measuring unit, a peak detector and a second comparator, the second input of which is threshold voltage input, while the first FI input is connected to the third synchronizer output, and the second FI input is to the output of the second comparator, the first FI output is to the control input of the first control unit, the second FI output is to the control input of the third PU, the third output of the FI to the control input of the fifth PU, the fourth output of the FI to the first control input of the accumulation section of the CCD matrix, the second control input of which is connected to the input of the charge measurement unit, the fifth output of the FI connected to the gate input of the second comparator , the sixth FI output is to the “Reset” input of the peak detector, and the seventh FI output is to the gate input of the first comparator.

Images