TW448683B - Multiple storage node active pixel sensors - Google Patents

Multiple storage node active pixel sensors Download PDF

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Publication number
TW448683B
TW448683B TW088112103A TW88112103A TW448683B TW 448683 B TW448683 B TW 448683B TW 088112103 A TW088112103 A TW 088112103A TW 88112103 A TW88112103 A TW 88112103A TW 448683 B TW448683 B TW 448683B
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Taiwan
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terminal
independent
transistor
storage
majority
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TW088112103A
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Chinese (zh)
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Richard B Merrill
Richard F Lyon
Jeffrey A Dickson
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Foveon Inc
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/50Control of the SSIS exposure
    • H04N25/57Control of the dynamic range
    • H04N25/58Control of the dynamic range involving two or more exposures
    • H04N25/587Control of the dynamic range involving two or more exposures acquired sequentially, e.g. using the combination of odd and even image fields
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/76Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/77Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
    • H04N25/771Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components comprising storage means other than floating diffusion
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/76Addressed sensors, e.g. MOS or CMOS sensors

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

An active pixel sensor disposed on a semiconductor substrate includes a photosensor, a reset transistor, a plurality of storage nodes and outputting means. The photosensor has a first terminal and a second terminal, wherein the first terminal is coupled to a first reference potential. The reset transistor has a first terminal coupled to the second terminal of said photosensor, a second terminal coupled to a reset potential, and a third terminal coupled to a reset line. The plurality of storage nodes are coupled to said second terminal of said photosensor, and the means for outputting a value from any of said plurality of storage nodes is coupled to the storage nodes.

Description

448683 五、發明說明(1) 發明背景 1, 發明範圍 本發明係有關於主動像素感測器及主動像素感測器陣 列。詳言之’本發明係有關於具有多數儲存節點之主動像 素感測器及應用,諸如靜止照相機,其利用一具有多數儲 存節點之主動像素感測器陣列。 2. 技藝背景 具有可隨機定址CMOS主動像素感測器之靜止照相機中, 如何實現依據有一長讀出間隔之短曝光間隔之問題存.在。 —種典型的主動像素區域陣列影像感測器在Hurwi tz等人 所著” 一種用於消費性靜態照相機之8 00](像素彩&CM〇s感 及J器—’ SPIE第3 01 9卷,第1 1 5 -4 24頁被提出,且包含多個 仃及列之像素感測器。大部份用於此形式感測器陣列曝光 之:般方法是經由列循環捲動以致各列之結合持續時間是 相同的’但可能比整體讀出間隔要短。此曝光控制之方法 破稱為電子式快門。 —此形式之電子式快門有兩個問題。第一,因為各列掃描 不同時間間隔’所以會有移動失真(m〇ti〇n artifact)® 換率動物體之形狀會失真)。帛二’此方案需要-非常高轉 具=j類比之數位轉換器(ADC)工具。例如,如果該陣列 ^ ΐ —百萬個像素,且讀出持續時間為1/100秒(大約是手 取=照相機之最大可接受度),則需要的轉換率為⑽ 狀能衫。因為具有需要精確度(10位元)之商用ADC之技藝 4大約是2G百萬取樣/秒,所以需要使用總共5個抓之為448683 V. Description of the invention (1) Background of the invention 1. Scope of the invention The present invention relates to an active pixel sensor and an active pixel sensor array. More specifically, the present invention relates to active pixel sensors and applications with a large number of storage nodes, such as still cameras, which utilize an active pixel sensor array with a large number of storage nodes. 2. Technical background In a still camera with a randomly addressable CMOS active pixel sensor, the question of how to achieve a short exposure interval based on a long readout interval exists. —A typical active pixel area array image sensor in Hurwitz et al. “A 00 for Consumer Still Cameras] (Pixel Color & CM Sense and J Device— 'SPIE No. 3 01 9 Volume, page 1 1 5 -4 24 is proposed, and it contains multiple pixel sensors with rows and columns. Most of them are used for this type of sensor array exposure: the general method is to scroll through the columns to each The combination duration of the columns is the same, but may be shorter than the overall readout interval. This method of exposure control is called electronic shutter.-There are two problems with this type of electronic shutter. First, because each column scans Different time intervals ', so there will be motion artifacts (the shape of the animal body will be distorted). 2)' This solution requires-very high rotation tool = j analogue digital converter (ADC) tool For example, if the array is ^ ΐ — million pixels and the readout duration is 1/100 second (approximately hand pick = camera's maximum acceptable level), the required conversion rate is ⑽ shape shirt. Because it has 4 techniques for commercial ADCs that require precision (10 bits) 2G is one million samples / second, so it is necessary to use a total of five to catch the

第5頁 44β 683_ 五、發明說明(2) 裝置以允許1/100秒之曝光。 因為需要克服與電子式快門有關之一些問題,不同的解 決方案已經在先前的技藝中被提出。其中一種解決方案見 於序號0 8 / 9 6 9, 3 83,標題為η適用於電子式照相機應用之 内部像素訊框儲存元件、陣列及電子式快門” ,1 9 9 7年1 1 月1 3日提出,且清楚地在此結合參考。不管上述計劃所說 明之電子式快門改良,它會花許多時間讀取一影像。如這 些連續問題之結果,來自影像器多數影像之快速連續擷取 是困難的*因為時間週期太短暫。 當將數位照相機的輸出與一底月照相機所產生的影像品 質比較時,容易被那些平常精通此技藝者所認識的另一個 問題是動態排列壓縮必須被改良。目前,動態排列能力之 限制造成明亮部份之燒毀,且一數位影像器中臨界曝光值 比較起來比底片的品質差。我們都知道,要改良相>!中影 像的品質,一壓縮方案應該增加影像器中有效的動態排列 至少十倍。這對影像中光亮部份是絕對真的。因為現在用 於技藝中使用非線性充電置像素電壓轉換之動態排列壓縮 方案,一種令人滿意的動態排列壓縮目前還沒有被完成。 一種具有快速連續擷取多數影像能力之照相機將會對保 證多個利益有幫助,是先前技藝所沒有提供的。第一,具 有不同焦距設定之多數影像可以被使用於重建一鮮明的影 像。第二,具有不同曝光設定或感光度之多數影像可以被 使用於重建一具有寬動態排列之影像。第三,多數影像可 以以它們之間之已知時間間隔擷取,其目的是測量影像内Page 5 44β 683_ V. Description of the invention (2) Device to allow 1/100 second exposure. Because of the need to overcome some of the problems associated with electronic shutters, different solutions have been proposed in prior art. One of the solutions is found in the serial number 0 8/9 6 9, 3 83, entitled η Internal pixel frame storage elements, arrays and electronic shutters suitable for electronic camera applications ", 1997 1 November 1 3 Proposed and clearly incorporated herein by reference. Regardless of the electronic shutter improvements described in the above plan, it will take a lot of time to read an image. As a result of these continuous problems, the rapid continuous acquisition of most images from the imager is Difficult * because the time period is too short. When comparing the output of a digital camera with the image quality produced by a full-month camera, another problem that is easily recognized by those skilled in this art is that dynamic permutation compression must be improved. At present, the limitation of the dynamic arrangement ability causes the bright part to be burned, and the critical exposure value in a digital imager is inferior to the quality of the negative. We all know that to improve the quality of the image in the phase >!, A compression scheme should Increase the effective dynamic arrangement in the imager by at least ten times. This is absolutely true for the bright parts of the image. Because it is now used in technology A dynamic permutation compression scheme using non-linear charging pixel voltage conversion, a satisfactory dynamic permutation compression has not yet been completed. A camera with the ability to capture most images quickly and continuously will help ensure multiple benefits, is Not provided by previous techniques. First, most images with different focal length settings can be used to reconstruct a sharp image. Second, most images with different exposure settings or sensitivity can be used to reconstruct a wide dynamic arrangement. Third, most images can be acquired at known time intervals between them, the purpose of which is to measure

448683 五、發明說明(3) 所擷取物體之速 使用於暫時托架 以來之擷取影像 之前及之後立即 光曝光影像及在 多數影像可以經 取。 本發明之一目 個影像之主動式 本發明的另一 取多個 發明摘 根據 存節點 照相機 被巧妙 量擷取 本發 節點, 此可以 電路可 能。 本發 節點, 影像之主 要說明 本發明, 之主動像 應用以快 地操作以 影像内物 明之第一 一個用於 將儲存於 以應用以 明之第二 多個連接 度。第四,以块速連 ,包含在M快門鬥η ":存之影像可以被 J開關"鈕被柢π + 。第五,影像可以在發下所來自最近 被取得,為的是描兩 m 電子式閃光器 自然光中曝光之县;推 」尤線的影像。閃 由分離的色濾波器擷取 口 。第六* ^色影像被擷 標是提供一具有多個储 像素感測器。 存節點用於擷取多 個目標是提供一且右之加 動像素感測器陣;有多個儲存節點用於掘 ΠίϊΪΙ於儲存像素感測器陣列之儲 f感m明°此F車列可以使用於靜離 速連續地擁取多個影像。此擷取影像可二 建構一新的影像或用於其他目的,諸如測 體之速度。 實施例中,主動像素感測器包含多個儲存 選擇多個儲存節點之列選擇線,及多個據 多個儲存節點中影像讀出之行輸出線。行 在儲存於多個儲存節點中影像上執行一功 實施例中,主動像素感測器包含多個儲存 多個儲存節點之列選擇線及據此可以將儲 448683 五、發明說明(4) 存於多個儲存節點中影像讀出之單—〜 列解碼電路可以連接列選挺^ 行輸出線° —霜之/ 儲存影像。連接列、择線以選擇儲存節點内其^ 本發明之第三及第四替代實施例 模式輸出,主動像素感測器 、中之一提供—電流 選擇多個儲存節點之影像選擇二號及::節點,多個用於 擇影像之單-列選擇線。纟像選擇G行輪出線上 使用排除第三實施例多個列選結合列選擇 本發明之第五實施例中,」,擇“唬之需求s 節:,多個列選擇線及多個行輸出:感測器包含多個儲存 本發明之第六實施例中, 節點,該節點連接—受單】^測器包含兩個健存 輪出之差動放大器。行電路 / 制以提供差動電流 在兩儲存節點上影像之間:理彳用於^接感測兩個儲存 於不同的目的。 ' "。差動讀出電路可以使用 附圖摘要說明 圖1是適用於根據本發明 器方塊圖^ 動像素感測Is實施例之影像 圖。疋已去具有單儲存節點之N-通道MOS應用之概要 圖3疋說明圖2所描述主動像素感測器操作之時序圖。 圖4是一適用於本發明之光感測器圖示。 圖5、6、7 ' 8、9及1 0是根據本發明第一至第六實施例 ,、有多個儲存節點之主動像素感測器概要圖。448683 V. Description of the invention (3) The speed of the captured object is used for the captured image since the temporary bracket Before and immediately after the light exposure image and most images can be taken. One of the inventions is an image-based initiative. Another of the inventions is to extract multiple inventions. According to the storage node, the camera is cleverly captured at the sending node. This may be possible. This node, the main description of the image, explains the present invention, the active image application is used to quickly operate the first one of the objects in the image to store the second plurality of connections in the application. Fourth, connect at a block speed, and the images contained in the M shutter bucket η ": can be pressed by the J switch " button 柢 π +. Fifth, the image can be taken from the station recently, in order to trace the exposure of two m electronic flashes in natural light; push the image of “You Line”. Flash is captured by a separate color filter. The sixth color image is captured to provide a sensor with multiple memory pixels. The storage node is used for capturing multiple targets to provide one and the right pixel sensor array; there are multiple storage nodes for digging the storage pixel sensor array in the storage pixel sensor array. This F train Can be used to capture multiple images continuously at static speed. This captured image can be used to construct a new image or used for other purposes, such as measuring the speed of an object. In an embodiment, the active pixel sensor includes a plurality of column selection lines for storing and selecting a plurality of storage nodes, and a plurality of output lines for reading out images from the plurality of storage nodes. In one embodiment, the image is stored in multiple storage nodes. In the embodiment, the active pixel sensor includes multiple column selection lines that store multiple storage nodes, and according to this, storage 448683 can be stored. V. Description of the Invention (4) Storage The order of image reading in multiple storage nodes— ~ The column decoding circuit can be connected to the column selection line ^ Row output line ° — Frost / Stored image. Connect columns and select lines to select the storage node output in the third and fourth alternative embodiments of the present invention, one of which is provided by an active pixel sensor—current selection of multiple storage nodes. Image selection No. 2 and: : Node, multiple single-column selection lines for selecting images. The image selection G row is used on the line out. The third embodiment is used to exclude multiple column selections. Combine the column selection in the fifth embodiment of the present invention. Output: The sensor contains a plurality of nodes that are stored in the sixth embodiment of the present invention. The node is connected to the receiver. The sensor includes two differential amplifiers that are stored in rotation. The circuit / system is provided to provide differential The current is between the images on the two storage nodes: it is used to sense the two storages for different purposes. '&Quot;. The differential readout circuit can be briefly explained using the drawings. Figure 1 is suitable for the device according to the present invention. Block diagram ^ Image diagram of the embodiment of moving pixel sensing Is. 概要 A summary of an N-channel MOS application with a single storage node. Figure 3 疋 A timing diagram illustrating the operation of the active pixel sensor described in Figure 2. Figure 4 is A diagram of a light sensor suitable for the present invention. Figures 5, 6, 7 '8, 9, and 10 are active pixel sensors with multiple storage nodes according to the first to sixth embodiments of the present invention. Overview diagram.

448683 五、發明說明(5) 圖Π A及1 1 B是根據本發明主動像素感測器操作之替代時 序圖。 較佳實施例之詳細說明 那些精通此技藝者了解下列本發明之說明只適用於說明 且不受任何形式之限制。本發明之其他實施例將輕易地自 我促成此精通技藝者。 圖1是一適用於本發明之主動像素影像器丨〇方塊圖。影 像器1 0中’主動像素感測器以行與列的方式配置於一像素 感測器陣列1 2中。要分析來自像素感測器陣列丨2之類比像 素資訊用於利用一類比至數位轉換器(ADC ) 1 4處理,一列 解碼器電路16,一行取樣電路18及一計數器2〇被使用。列 解碼器1 4對應一列致能信號2 2自-像素感測器陣列1 2選擇列 且自计數器20選擇信號。行取樣電路18亦由計數器2〇驅動 且包含一多工器,其將所描述之取樣行連接至對應來自計 數器20信號之ADC。 一典型的應用中,來自計數器2 〇之較高階位元被使用於 驅動列解碼器電路丨4且較低階位元被使用於驅動行取樣電 路2 0以在利用列解碼電路〗4選擇下一列之前容許來自像 素感測器陣列1 2中列之所有像素資訊之取出。適用於影像 器1 0之列解碼器、行取樣電路及計數器是精通此技藝者所 熟知’且在此將不詳細說明以避免過度補償本發明且因此 混〉有本發明。 現在參考圖2,其顯示一具有單一嵌入儲存元件之已知 主動像素感測器。此主動像素感測器3 〇是以N通道MOS電晶448683 V. Description of the invention (5) Figures Π A and 1 1 B are alternative timing diagrams for the operation of the active pixel sensor according to the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Those skilled in the art understand that the following description of the present invention applies only to the description and is not limited in any way. Other embodiments of the present invention will easily facilitate this skilled person on my own. FIG. 1 is a block diagram of an active pixel imager suitable for the present invention. The active pixel sensors in the imager 10 are arranged in a pixel sensor array 12 in rows and columns. To analyze the analog pixel information from the pixel sensor array 2 for processing using an analog-to-digital converter (ADC) 14, a column of decoder circuits 16, a row of sampling circuits 18, and a counter 20 are used. The column decoder 14 corresponds to a column of enable signals 2 2 and the self-pixel sensor array 12 selects a column and selects a signal from the counter 20. The line sampling circuit 18 is also driven by the counter 20 and includes a multiplexer that connects the described sampling line to an ADC corresponding to the signal from the counter 20. In a typical application, the higher-order bits from the counter 20 are used to drive the column decoder circuit 4 and the lower-order bits are used to drive the row sampling circuit 20 to select the column decoding circuit 4 One row previously allows all pixel information from the rows in the pixel sensor array 12 to be taken out. Column decoders, line sampling circuits and counters suitable for imagers 10 are well known to those skilled in the art 'and will not be described in detail here to avoid overcompensating the invention and therefore mixing the invention. Referring now to FIG. 2, there is shown a known active pixel sensor with a single embedded storage element. The active pixel sensor 3 is an N-channel MOS transistor.

448683448683

體實現、那些精通此技藝者將理解主動像素感測器3 〇可 以以p通道M〇S電晶體或P通道及N通道MOS電晶體之組合實 現。主動像素感測器3 0中,光二極體32具有一接地之正極 及一連f至N通道m〇s重置電晶體34源極之負極^ n通道M〇s 重置電Ba體34之汲極連接Vref且^通道M〇s重置電晶體34之 閘極連接圖1中以數字24標示之公用RESET線。reset線較 佳地被驅動至少在Vre f之上臨界點之一電壓以設定光二極 體32之負極為vref。 五、發明說明(6) 光二極體32之負極亦連接N通道MOS轉換電晶體36之第一 源極/_汲極。N通道M〇s轉換電晶體36之第二源極/汲極連接 儲存元件38之第—端子且亦連接N通道MOS讀出電晶體40之 M問極、。儲存元件38之第二端子連接顯示接地之參考電位。 通道MOS轉換電晶體36之閘極連接圖丄中以數字26標示之 公用XFR+線》N通道MOS轉換電晶體36第二源極〆汲極至儲存 =件38第一端子及N通道M〇s讀出電晶體4〇閘極之連接形成 —儲存節點42 通道M0S讀出電晶體4〇之汲極連接Vcc, 通迢MOS讀出電晶體4〇之源極連接N通道M〇s列選擇電晶Those who are proficient in this art will understand that the active pixel sensor 3 can be implemented as a p-channel MOS transistor or a combination of a P-channel and an N-channel MOS transistor. In the active pixel sensor 30, the photodiode 32 has a grounded positive electrode and a f to N channel m0s reset transistor 34 source negative electrode ^ n channel M0s reset battery Ba 34 The gate is connected to Vref and the gate of the reset transistor 34 is connected to the common RESET line indicated by the numeral 24 in FIG. 1. The reset line is preferably driven at least one voltage above a critical point above Vre f to set the anode of the photodiode 32 to vref. V. Description of the invention (6) The negative electrode of the photodiode 32 is also connected to the first source / _drain of the N-channel MOS conversion transistor 36. The second source / drain connection of the N-channel Mos switching transistor 36 is connected to the first terminal of the storage element 38 and is also connected to the M-terminal of the N-channel MOS readout transistor 40. The second terminal connection of the storage element 38 shows a ground reference potential. The gate connection of the channel MOS conversion transistor 36 is the common XFR + line marked with the number 26 in the figure》 N channel MOS conversion transistor 36 the second source, the drain to the storage = the first terminal of the component 38 and the N channel M0s. The readout transistor 40 gate connection is formed-storage node 42 channel M0S read transistor 40 drain terminal is connected to Vcc, and the source of NMOS readout transistor 40 is connected to the N channel M0s column to select the transistor. crystal

二44 = >及極。n通道m〇s列選擇電晶體44之閘極K〇w SELECT β ’匕們其中之一在圖i中是以數字28代表,且N通道m〇s 列選擇電晶體44之源極連接一行輸出線。 我們應邊理解,與儲存節點42有關的是1^通道M〇s轉換電 晶體36利用光二極體32之負極當一如下文所述之整合期間_ 已經結束時隔離儲存節點42進一步光充電之收集,N通道 M〇S #出電晶體4 〇感測堆積在儲存節點之電荷,且儲存Two 44 = > and extreme. One of the gates of the n-channel m0s column selection transistor 44 is Kο SELECT β '. One of them is represented by the number 28 in FIG. i, and the source of the n-channel m0s column selection transistor 44 is connected to one row. Output line. We should understand that the storage node 42 is related to the 1 ^ channel Mos conversion transistor 36 using the anode of the photodiode 32. When an integration period as described below Collect, N channel M〇S # 出 电 晶 4 〇 Sensing the charge accumulated in the storage node, and stored

448683 五、發明說明(7) 元件38储存電荷。再者,如同在同時期申請案序號 0 9/ 0 9 9,1 1 6,由Richard B. Merrill 及Richard F. Lyon 於1 998年6月17日所提出’具有代理人備忘錄第F〇v_〇1 3號 且被指定給本發明的同一指定人之標題為《具有模擬線路 放大之主動像素感測器(ACTIVE PIXEL SENSOR WITH BOOTSTRAP AMPLIFICATION)"中所描述,且在此被詳細說 明及參考’儲存元件3 8可以被省略且儲存於n通道μ〇s讀出 電晶體4 0閘極上之電荷或其他能夠電荷儲存之裝置可以被 使用。 - 為了要更了解主動像素感測器3 0之操作,圖3說明圖2中 所描述RESET、XFR及ROW SELECT信號時序圖。主動像素感 測器30被重置是利用同時打開N—通道M〇s重置電晶體34及付 通道M0S轉換電晶體36如所示RESET及XFR信號在50及52同 時在HIGH能階。然後在RESET 50之下降邊緣54關閉,以至 方;末自光一極體3 2之光電流累積開始。光電流累積 (integration)期間是以參考數字56標示。 當N通道M0S轉換電晶體36打開時,儲存單元38之電容量 增加至光一極體3 2在累積期間之電容量,因此增加電荷容 1及主動像素感測器3 0範圍。因為形成儲存元件3 8之閘 氧化電容比光二極體3 2之接面電容容易控制,所以此亦減 少像素輸出中電容變動所致之變化。 當累積完成時(由外部曝光控制)’ N通道m〇S轉換電晶體 36在XFR下降邊緣58關閉以隔離對應儲存元#<^卜g錆弁 電荷之電壓能階。其後不久,光二極體448683 V. Description of the invention (7) The element 38 stores electric charge. Furthermore, as in the same period of application number 0 9/0 9 9,1 1 6, the 'Memorandum of Attorney No. F0v' filed by Richard B. Merrill and Richard F. Lyon on June 17, 1998 _〇1 No. 3 and assigned to the same designator of the present invention is described in "ACTIVE PIXEL SENSOR WITH BOOTSTRAP AMPLIFICATION" ", and is described in detail herein and Reference 'storage element 38 can be omitted and the charge stored on the gate of the n-channel μs readout transistor 40 or other devices capable of charge storage can be used. -To better understand the operation of the active pixel sensor 30, Figure 3 illustrates the timing diagrams of the RESET, XFR and ROW SELECT signals described in Figure 2. The active pixel sensor 30 is reset by simultaneously turning on the N-channel M0s to reset the transistor 34 and the sub-channel M0S switching transistor 36 as shown. The RESET and XFR signals are at 50 and 52 at the high level. Then it closes at the falling edge 54 of the RESET 50 to the square; the accumulation of the photocurrent at the end of the photo-polar body 32 starts. The photocurrent integration period is indicated by reference numeral 56. When the N-channel MOS conversion transistor 36 is turned on, the capacitance of the storage unit 38 is increased to the capacitance of the photodiode 32 during the accumulation period, so the range of the charge capacity 1 and the active pixel sensor 30 is increased. Since the gate oxide capacitor forming the storage element 38 is easier to control than the junction capacitance of the photodiode 32, this also reduces the variation due to the capacitance variation in the pixel output. When the accumulation is completed (controlled by external exposure), the N-channel mS switching transistor 36 is closed at the XFR falling edge 58 to isolate the voltage level of the corresponding storage element # < ^ 卜 g 锖 弁 charge. Soon thereafter, the photodiode

448683 五、發明說明(8) 再次打開N通道MOS重置電晶體34重置至參考電壓,如 RESET上升邊緣6〇所指示。此動作將防止光二極體32在讀 出過程中繼續累積且可能溢出過量的電荷進入基板,這樣 可能會影響儲存元件38上信號之完整。 N通道MOS轉換電晶體3 6關閉後,讀出程序開始。當一如 圖3中所示r 〇 w S E L E C Τ信號脈衝被加到一主動像素感測器' 30 tN通道m〇S列選擇電晶體44閘極上時,在一列中之各個 主動像素感測器被讀取。主動像素感測器3 〇之操作中,一 與在儲存節點42上所發現電壓有關之電壓被n通道M〇s.讀出 電晶體40感測且當N通道MOS列選擇電晶體44打開時被加在 行輸出線。X F R信號停留在低點一直到所有的列已經被讀 出或另一個循環被初始。 一種適用於本發明之光二極體被發明於同時期之美國申 6月案序號09/065,939,Richard B. Merrill 於1998 年4 月 24曰提出,具有代理人備忘錄號且被指定給 本發明的同一指定人之標題為"在使用三井結構之主動像 素細胞中之色彩分離(COLOR SEPARATION IN AN ACTIVE pixel CELL IMAGING ARRAY USING A TRIPLE-WELL STRUCTURE)",且在此清楚地共同參考。在此所發明之光 —極體具有一種三井(triple-well)結構,其在光二極體 中提供三個搭接(〇 v e r 1 a p p i n g)之光偵測器。下文所說明 本發明主動像素感測器實施例中,各個這些搭接光偵測器-可以連接主動像素感測器十多個儲存節點之不同一個。 適用於本發明之另一個光感測器7 0說明於圖4中。光感448683 V. Description of the invention (8) Turn on the N-channel MOS reset transistor 34 again to reset to the reference voltage, as indicated by RESET rising edge 60. This action will prevent the photodiode 32 from continuing to accumulate during readout and may overflow excessive charge into the substrate, which may affect the integrity of the signal on the storage element 38. After the N-channel MOS switching transistor 36 is turned off, the readout process is started. When an r 0w SELEC T signal pulse is applied to an active pixel sensor '30 tN channel m 0S column selection transistor 44 gate as shown in FIG. 3, each active pixel sensor in a column Was read. In the operation of the active pixel sensor 3 0, a voltage related to the voltage found on the storage node 42 is sensed by the n-channel M0s. The readout transistor 40 senses and when the N-channel MOS column selection transistor 44 is turned on Is added to the line output line. The X F R signal stays low until all columns have been read or another cycle is initiated. A photodiode suitable for the present invention was invented in the same period of the United States Application June 09 / 065,939, Richard B. Merrill filed on April 24, 1998, has an agent memo number and is assigned to this The title of the same designator of the invention is " COLOR SEPARATION IN AN ACTIVE pixel CELL IMAGING ARRAY USING A TRIPLE-WELL STRUCTURE ", and is clearly incorporated herein by reference. The light-polar body invented here has a triple-well structure that provides three overlapping (0 v e r 1 a p p i n g) light detectors in the photodiode. In the embodiment of the active pixel sensor of the present invention described below, each of these overlapping photodetectors can be connected to one of more than ten storage nodes of the active pixel sensor. Another optical sensor 70 suitable for use in the present invention is illustrated in FIG. Light-sensitive

第12頁 448683 五、發明說明(9) 測1§70包含第·一及第一光二極體72及74。第一及第-光二 極體72及74是以環形的方式配置’第—光二極體Η提供一 低敏感區域與較大的第二光二極體74之高敏感區域比較。 因為第一及第二光二極體72及74具有相同的幾何中心,當 指疋#號為線性時’他們將取樣影像之平均入射光子流。 由光感測器7 0所提供的一種動態範圍壓縮優點是第一及第 二光一極體7 2及7 4將在相同的時間間隔中取樣光電流。精 通此技藝者將非常容易理解此特性是非常有用的,例如, 在閃光曝光中。 光感測器70中,第一及第二光二極體72及74各個將產生 光電流以均衡它的區域。具有近來在處理技術之進步,主 動區域^開口及光二極體可以被做得夠小以提供—非常大 之光電机比例’例如用於6微米X 6微米的像素大約5 0 : 1 jl/- ' 、_ °目前我們注意的是光二極體72及74各個可以連 接至:文將s兒明之各自獨立之多個儲存節點。 ^ 本發明’諸如圖1中所說明之影像器丨〇之主動像素 感測器可以句人,y i Q i ^ 匕含多個儲存節點,所以一各自具有多個儲存Page 12 448683 V. Description of the invention (9) Test 1 § 70 includes the first and first photodiodes 72 and 74. The first and second photodiodes 72 and 74 are arranged in a circular manner. The first photodiode Η provides a low-sensitivity area compared to the larger high-sensitivity area of the second photodiode 74. Because the first and second photodiodes 72 and 74 have the same geometric center, when the finger # is linear, they will sample the average incident photon flux of the image. One of the advantages of dynamic range compression provided by the photo sensor 70 is that the first and second photodiodes 72 and 74 will sample the photocurrent at the same time interval. Those skilled in the art will easily understand that this feature is very useful, for example, in flash exposures. In the photo sensor 70, each of the first and second photodiodes 72 and 74 will generate a photocurrent to equalize its area. With recent advances in processing technology, the active area ^ openings and photodiodes can be made small enough to provide—very large photomotor ratios', such as for a pixel of 6 microns x 6 microns approximately 50: 1 jl /- ', _ ° At present we notice that each of the photodiodes 72 and 74 can be connected to a plurality of independent storage nodes of Wen Jiang Erming. ^ In the present invention, an active pixel sensor such as the imager illustrated in FIG. 1 can be sentenced, y i Q i ^ contains multiple storage nodes, so each has multiple storage nodes

節點 .V 七文加Μ '、敦剛器陣列可以使用於擷取超過單一影像。具 有多個儲存筋_ _ np p點之儲存像素感測器之數種實施例在下文將The node .V seven text plus M ', the rigid array can be used to capture more than a single image. Several embodiments of the storage pixel sensor with multiple storage ribs __np p points are described below.

斤曰麻农 又說明之儲存像素感測器實施例是以N通道MOS 电日日篮貫現。m , 、 那些精通此技藝者將理解下文之儲存像素感 ί則器將可以D ,— 乂其他Ρ通道MOS電晶體或Ν通道及Ρ通道MOS電 晶體的纟且合實現。 見在參考圖5-1〇,其顯示根據本發明之具有多個儲存節Jin Nong explained that the embodiment of the storage pixel sensor is implemented as an N-channel MOS battery. Those who are proficient in this art will understand that the storage pixel sense below will be able to be implemented by D, other P-channel MOS transistors or the combination of N-channel and P-channel MOS transistors. See reference to Fig. 5-1, which shows a plurality of storage sections according to the present invention.

第13頁 4 48683 五、發明說明(ίο) 點之主動像素感測器之六個實施例概要圖。在各個圖5 _ 1 〇 所描述像素感測器1 〇 〇 - 1到丨0 0 „ 6之實施例中,儲存像素感 測器100包含具有一接地正極及一連接N通道重置電晶 體104源極之負極之光二極體1〇2。n通道MOS重置電晶體 1 04之閘極及沒極分別連接至一RESET信號與Vref。 再者’圖5-9各個包含多個儲存節點1〇6〜1至1〇6_η。第 一健存節點106-1連接儲存元件ios—!之第一端子,N通道 MOS轉換電晶體1 1〇-1之第一源極/汲極及n通道M〇s讀出電 晶體1 1 2- 1之閘極。第η個儲存節點丨〇 6 _n連接儲存元奔 108-n之第一端子’ N通道M〇s轉換電晶體丨丨〇—n之第一源極 //及極及N通道MOS讀出電晶體ιΐ2-η之閘極。光二極體1〇2 之負極亦連接N通道MOS轉換電晶體1 1 〇-1及11 o-n之第二源 極/沒極。N通道MOS轉換電晶體丨lo—i及丨丨〇 —η之閘極分別 連接XFR1與XFRn信號。儲存元件108-1及108-η各具有連接 至一如所示接地之固定電位的第二端子。 圖9中所描述之主動像素感測器丨〇 〇 _ 5實施例中,描述額 外的儲存節點1 〇 6 - n / i及1 〇 6 - (η - j)以示範多個儲存節點可 以在ROW SELECT1至R〇W SELECT i與行輸出線丨至」·之間形 成矩陣。儲存節點l〇6_n/:i連接儲存元件1〇8_n/i之第一 端子’ N通道M0S轉換電晶體11〇_η/ι之第一源極/汲極及N 通逼MOS s賣出電晶體1 1 2-n / i之閘極。儲存節點丨〇6_ (n_ ]-) 2接儲存元件l〇8-(n-j)之第一端子,N通道M〇s轉換電晶 體1 i〇-(n-j)之第一源極/汲極及N通道肋3讀出電晶體 U2-(n-j)之閘極。光二極體1〇2之負極亦連接n通道M〇s轉Page 13 4 48683 V. Summary of the six embodiments of the active pixel sensor of the invention description point. In the embodiment of each of the pixel sensors 100-1-1 to 0-0 described in FIG. 5_10, the storage pixel sensor 100 includes a grounded positive electrode and a connected N-channel reset transistor 104. The source and the cathode of the photodiode 102. The n-channel MOS reset transistor 104 is connected to a RESET signal and a Vref respectively. Furthermore, each of FIG. 5-9 contains a plurality of storage nodes 1 〇6 ~ 1 to 106_η. The first storage node 106-1 is connected to the first terminal of the storage element ios— !, the first source / drain of the N-channel MOS conversion transistor 1 1-0, and the n-channel. M〇s reads the gate of transistor 1 1 2- 1. The nth storage node 丨 〇6 _n is connected to the first terminal of storage element 108-n ′ N channel M0s conversion transistor 丨 丨 —n The first source // and the gate of the N-channel MOS readout transistor ιΐ2-η. The negative pole of the photodiode 102 is also connected to the N-channel MOS conversion transistor 1 1 〇-1 and 11 on the first Two source / non-polar. The gates of N-channel MOS switching transistors 丨 lo-i and 丨 丨 〇-η are connected to XFR1 and XFRn signals respectively. The storage elements 108-1 and 108-η each have a connection to as shown Ground Fixed potential second terminal. In the active pixel sensor described in FIG. 9 in the embodiment, additional storage nodes 1 0 6-n / i and 1 0 6-(η-j) are described. Demonstrate that multiple storage nodes can form a matrix between ROW SELECT1 to Row SELECT i and row output lines 丨 to ”·. The storage node 106_n /: i is connected to the first terminal of the storage element 108_n / i ', the first source / drain of the N-channel M0S conversion transistor 11〇_η / ι and the N pass-through MOS s sells electricity Gate of crystal 1 1 2-n / i. Storage node 丨 〇6_ (n _)-) 2 is connected to the first terminal of the storage element 108- (nj), the N-channel M0s conversion transistor 1 i0- (nj) is the first source / drain and The N-channel rib 3 reads out the gate of the transistor U2- (nj). The negative pole of the photodiode 102 is also connected to the n channel M0s.

第14頁 448683 五、發明說明(11) 一~ 換電晶體110-Wi 之第二源極/汲極。N通道 MOS轉換電晶體110-n/i及u〇_(n —].)之閘極分別連接 XFRn/i 及 XFR(n- j)信號。儲存元件 1〇8_n/i&1〇8_(n_」·)各 具有連接至一如所示接地之固定電位的第二端子。 圖10中,因為一差動讀出電路被設置於主動像素元件 1 0 0 - 6中’所以只有兩個儲存節點丨〇 6 _ 1及丨〇 6 _ 2被描述。 第一儲存節點106-1連接儲存元件jos—i之第.一端子,1^通 道M0S轉換電晶體1 1 〇-1之第一源極/汲極及n通道讀出 電晶體112-1之閘極^儲存節點1〇6_2連接儲存元件1〇8_2 之第一端子,N通道M0S轉換電晶體丨10 — 2之第一源極/汲極 及N通道M0S讀出電晶體112-2之閘極。光二極體1〇2之負極 亦連接N通道M0S轉換電晶體1 ι〇__ι及ι1〇_2之第二源極/汲 極。N通道M0S轉換電晶體iio-i及ιι〇_2之閘極分別連接 XFR1及XFRn信號。儲存元件log—1及1〇8_2各具有連接至一 如所示接地之固定電位的第二端子。 主動像素感測器11 0 - 1至1 1 〇 - 6之操作中,主動像素感測 器被重置且電荷以一種類似上文於圖2中所描述之方式堆 積。然而,我們應該理解此操作之執行可以與上文圖2中 所數不同’在其中儲存於各儲存節點上影像之整合期間可 以利用將XFR1至XFRn信號分別加到N通道M0S轉換電晶體 110-1及110-n之閘極而不同,不同的持續時間及不同的次 數。用於此一應用,替代圖1中所描述單一公用XFR線的將 是XFR1至XFRn公用轉換線。圖11A及iiB中,描述用於根據 本發明主動像素感測器之RESET ' XFR1及XFRn信號替代時Page 14 448683 V. Description of the invention (11) 1 ~ The second source / drain of the transistor 110-Wi. The gates of the N-channel MOS switching transistors 110-n / i and u〇_ (n —].) Are connected to XFRn / i and XFR (n-j) signals, respectively. The storage elements 108-n / i & 108- (n_ "·) each have a second terminal connected to a fixed potential to ground as shown. In FIG. 10, because a differential readout circuit is provided in the active pixel element 100-6, only two storage nodes 丨 〇 6 _ 1 and 丨 〇 6 _ 2 are described. The first storage node 106-1 is connected to the first terminal of the storage element jos-i, the first source / drain of 1 ^ channel M0S conversion transistor 1 1 〇-1 and the n-channel readout transistor 112-1 Gate ^ storage node 10-6_2 is connected to the first terminal of storage element 108-8_2, the N-channel M0S conversion transistor 丨 the first source / drain of 10-2 and the gate of N-channel M0S readout transistor 112-2 pole. The negative pole of the photodiode 102 is also connected to the second source / drain of the N-channel MOS conversion transistor 1 ι__ι and ι1〇_2. The gates of the N-channel M0S conversion transistors iio-i and ιι_2 are connected to XFR1 and XFRn signals, respectively. The storage elements log-1 and 10-8_2 each have a second terminal connected to a fixed potential to ground as shown. During the operation of the active pixel sensor 110-1 to 1 10-6, the active pixel sensor is reset and the charges are accumulated in a manner similar to that described above in FIG. 2. However, we should understand that the implementation of this operation can be different from that shown in Figure 2 above. During the integration of the images stored on each storage node, XFR1 to XFRn signals can be added to the N-channel M0S conversion transistor 110- The gates of 1 and 110-n are different, different durations and different times. For this application, the XFR1 to XFRn common conversion line will be used instead of the single common XFR line described in FIG. In FIGS. 11A and iiB, the descriptions of the RESET 'XFR1 and XFRn signals used for the active pixel sensor according to the present invention are described.

第15頁 44β 683 五 '發明說明(12) ' 2圖但疋,單一公用X F R線依然可以使用。此為特別的 k點例如,當被使用於主動像素感測器争之光二極體是 如圖4中所描述之環形光二極體70。 圖11A中,當XFR1信號HIGH時,RESE1Mf號在下降邊緣 1>50做一轉換以開始儲存節點1〇6叼上電荷之堆積。當χρκι k號在下降邊緣1 5 2做一轉換時,儲存節點丨〇 6 _ i上電荷之 堆積停止。然後RESET信號在上升邊緣154做一轉換重置光 二極體102之負極的電壓。然後XFR1信號在上升邊緣156做 一轉換。當RESET信號在下降邊緣ι58做一轉換時,儲存節 點106-n上電荷之堆積開始。#XFRn信號在下降邊緣16〇做 —轉換時,儲存節點1 〇 6 — η上電荷之堆積停止β 圖11Β中’當XFR1及XFRn信號-HIGH時,RESET信號在下降 邊緣170做一轉換以開始儲存節點1〇6 —1及1〇6 —2上電荷之 堆積。當XFR1信號在下降邊緣丨72做一轉換時’儲存節點 1 0 6 -1上電荷之堆積停止,且儲存節點丨〇 6_n上電荷之堆積 繼續直到XF R η信號在下降邊緣1 7 4做一轉換。 圖5所描述主動像素感測器1 〇 〇 _ 1實施例中,出現於儲存 節點10 6-1至106-η之電壓各自在分離的行輸出線上利用相 同的列選擇信號被讀出。因此,Ν通道MOS讀出電晶體 112-1至112-11之没極連接至Vcc,且各Ν通道MOS讀出電晶 體1 12-1至Π 2-n之源極分別連接N通道MOS列選擇電晶體 114_1至114-n之汲極。N通道MOS列選擇電晶體114-1至 1 14-n之閘極各連接相同的SELECT信號,且N通道MOS 列選擇電晶體11 4 - 1至1 1 4 - η之源極分別連接至行輸出線Page 15 44β 683 V 'Explanation of the invention (12)' 2 Figures But alas, a single public X F R line can still be used. This is a special k-point. For example, when used in an active pixel sensor, the light diode is a ring light diode 70 as described in FIG. 4. In FIG. 11A, when the XFR1 signal is HIGH, the RESE1Mf number makes a transition at the falling edge 1 > 50 to start the accumulation of charge on the storage node 106a. When χρκιk is converted at the falling edge 1 52, the accumulation of charges on the storage node 丨 〇 6 _ i stops. The RESET signal then performs a transition on the rising edge 154 to reset the voltage of the negative pole of the photodiode 102. The XFR1 signal then undergoes a transition on the rising edge 156. When the RESET signal makes a transition at the falling edge ι58, the accumulation of charge on the storage node 106-n starts. #XFRn signal 16 at the falling edge—at the transition, the storage of charge on storage node 1 〇6—η stops β. Figure 11B 'When XFR1 and XFRn signals-HIGH, the RESET signal makes a transition at the falling edge 170 to start The accumulation of charges on storage nodes 10-6-1 and 10-6-2. When the XFR1 signal makes a transition at the falling edge 72, the accumulation of charge on storage node 1 0 6 -1 stops, and the accumulation of charge on storage node 1 06_n continues until the XF R η signal makes a 1 on the falling edge 1 7 4 Conversion. In the embodiment of the active pixel sensor 100 illustrated in FIG. 5, the voltages appearing at the storage nodes 10 6-1 to 106-η are each read out on the separate row output lines using the same column selection signal. Therefore, the terminals of the N-channel MOS readout transistors 112-1 to 112-11 are connected to Vcc, and the sources of each N-channel MOS readout transistor 1 12-1 to Π 2-n are connected to the N-channel MOS column respectively. The drains of the transistors 114_1 to 114-n are selected. The gates of the N-channel MOS column selection transistors 114-1 to 1 14-n are connected to the same SELECT signal, and the sources of the N-channel MOS column selection transistors 11 4-1 to 1 1 4-η are connected to the rows, respectively. Output line

第16頁 448683 五、發明說明(13) ------ 116-1 至li6~n 。 主動像素感測器1 0 0 - 1操作中,在第一及第二行輪出 上影像讀出時,分別連接11 6_1至1 1 6-n之行電路(未顯八 可以使用於選擇一在儲存節點106-1至l〇6-η上斛趄也"不) 存影像。再者’行電路可以使用於執行一些同時在餘存广 像上之一些功能,諸如執行兩影像之線性組合。 衫 圖6所描述主動像素感測器100_2實施例中,出現於健存 節點1 0 6- 1至1 0 6 -η之電壓分別在相同的行輸出線上利用子 ROW SELECT1至ROW SELECTn信號被讀出。因此,各Ν通道 M0S讀出電晶體112-1至112-η之汲極連接至vcc,且各|^通 道M0S讀出電晶體1 1 2-1至1 1 2-n之源極分別連接n通道M〇s 列選擇電晶體1 2 0 - 1至1 2 0-n之汲極。各N通道m〇s列選擇電 晶體120-1至120-11之閘極分別連接至1?训3£;]1£(:了1至1?仰 SELECTn信號’且N通道M0S列選擇電晶體120-1至120-n之 源極連接至單一行輸出線118。 主動像素感測器1 0 0 - 2之操作中,儲存在儲存節點丨〇 6 _ J 上之影像將對應HIGH ROW SELECT1信號被讀出,且儲存在 儲存節點106-η上之影像將對應HIGH ROW SELECTn信號被 讀出。我們了解圖丨中所描述之影像器丨〇將尚包含附加解 碼電路用於提供ROtf SELECT1至ROW SELECTn信號。 圖7中所描述主動像素感測器〗〇 〇 — 3實施例中,出現在於 儲存節點106-1至106-η之電壓在對應[maGE SELECT1至 IMAGE SELECTn信號之單一行輸出線122上分別被讀出,分 別被加到N通道Μ 0 S影像選擇電晶體1 2 4 - 1至1 2 4 - η上及一Page 16 448683 V. Description of the invention (13) ------ 116-1 to li6 ~ n. In the active pixel sensor 1 0 0-1 operation, when the image is read out on the first and second lines, the 11 6_1 to 1 1 6-n line circuits are connected respectively. No image is stored on storage nodes 106-1 to 106-η. Furthermore, the 'line circuit' can be used to perform some functions on the surviving wide image at the same time, such as performing a linear combination of the two images. In the embodiment of the active pixel sensor 100_2 described in FIG. 6, the voltages appearing at the healthy nodes 1 0 6- 1 to 1 0 6 -η are read on the same row output line using the sub-ROW SELECT1 to ROW SELECTn signals, respectively. Out. Therefore, the drains of each N-channel M0S readout transistor 112-1 to 112-η are connected to vcc, and the source of each | ^ channel M0S read-out transistor 1 1 2-1 to 1 1 2-n is connected respectively The n-channel Mos column selects the drains of the transistors 1 2 0-1 to 1 2 0-n. The gates of each N-channel m0s column selection transistor 120-1 to 120-11 are connected to 1 and 3 respectively;] 1 £ (: 1 to 1? SELECTn signal 'and N-channel M0S column selection transistor The sources of the crystals 120-1 to 120-n are connected to a single row output line 118. In the operation of the active pixel sensor 1 0 0-2, the image stored on the storage node 丨 〇6 _ J will correspond to HIGH ROW SELECT1 The signal is read out, and the image stored on the storage node 106-η will be read out corresponding to the HIGH ROW SELECTn signal. We know that the imager described in Figure 丨 will also include additional decoding circuits for providing ROtf SELECT1 to ROW SELECTn signal. Active pixel sensor described in FIG. 7 In the embodiment, the voltage at the storage nodes 106-1 to 106-η appears in a single row output line corresponding to the [maGE SELECT1 to IMAGE SELECTn signal. 122 are read out and added to the N channel M 0 S image selection transistors 1 2 4-1 to 1 2 4-η and 1

第17頁 448683 五、發明說明(14) ----- ROW SELECT信號上。因此,n福音vmc上*n 儿丄 ej此 Ν逋道M0S讀出電晶體112-1至 112-ri之汲極各連接至Vcc,且Ν通道M〇s讀出電晶體丨ι2^ 至1 12-n之源極分別連接至N通道M〇s影像選擇電晶體丨241 至124-n之汲極。N通道M〇s影像選擇電晶體up!至13〇1 之閘極分別連接至IMAGE SELECn至IMAGE S£LECTn信號。 N通道M0S影像選擇電晶體^卜!至13〇_11之源極連接至{^通 道M0S列選擇電晶體126之汲極。N通道M〇s列選擇電晶體 126之問極連接至R0W SELECT信號,且N通道M0S列"電 晶體1 2.6之源極連接至一行輸出線1 2 2。 主動像素感測器1 〇 〇 - 3之操作中,儲存於儲存節點丨〇 6 _ i 上之景>像將對應HIGH ROW SELECT信號及HIGH IMAGE SELECTl^fs號被讀出,且儲存於—儲存節點1 〇 6 - n上之影像將 對應 HIGH ROW SELECT 信號及HIGH IMAGE SELECTn信號被 讀出。我們應該了解圖1中所描述之影像器丨〇將尚包含公 用 IMAGE SELECT1 至 IMAGE SELECTn 線。公用 IMAGE SELECT1至IMAGE SELECTn信號結合ROW SELECT信號之使用 可省略掉使用第二實施例所需附加列解碼之需要。 圖8中所描述主動像素感測器1 〇〇-4實施例中,出現在於 儲存節點106-1至1 06-n之電壓在分別對應IMAGE SELECT1 至IMAGE SELECTn信號及一 ROff SELECT信號之單一行輸出 線1 28上以電流模式被讀出。因此,N通道M0S讀出電晶體 112-1至U2-n之汲極被連接在一起,且連接至N通道M0S列 選擇電晶體1 30之源極。N通道M0S讀出電晶體1 1 2-1至 112-η 之源極分別連接至 IMAGE SELECT1 至 IMAGE SELECTnPage 17 448683 V. Description of the invention (14) ----- ROW SELECT signal. Therefore, on the n gospel vmc, the n-channel M0S readout transistors 112-1 to 112-ri are connected to Vcc, and the N-channel M0s readout transistor 2 ^ to 1 The 12-n source is connected to the N-channel Mos image selection transistor 241 to 124-n, respectively. The gates of the N channel M0s image selection transistors up! To 1301 are connected to the IMAGE SELECn to IMAGE S £ LECTn signals, respectively. N-channel M0S image selection transistor ^ Bu! The source to 13〇_11 is connected to the drain of the {^ channel M0S column selection transistor 126. The N-channel M0s column selection transistor 126 is connected to the R0W SELECT signal, and the N-channel M0S column " transistor 1 2.6 source is connected to a row of output lines 1 2 2. During the operation of the active pixel sensor 100--3, the scene stored on the storage node 丨 〇_ _ i will be read out corresponding to the HIGH ROW SELECT signal and the HIGH IMAGE SELECT1 ^ fs number, and stored in — The image on storage node 1 0 6-n will be read out corresponding to HIGH ROW SELECT signal and HIGH IMAGE SELECTn signal. We should understand that the imager described in Figure 1 will still contain the public IMAGE SELECT1 to IMAGE SELECTn lines. The use of the common IMAGE SELECT1 to IMAGE SELECTn signals in combination with the ROW SELECT signal can omit the need for additional column decoding required by the second embodiment. In the embodiment of the active pixel sensor 100- 4 described in FIG. 8, the voltages appearing at the storage nodes 106-1 to 106-n correspond to a single row of the IMAGE SELECT1 to IMAGE SELECTn signals and an ROff SELECT signal, respectively. The output lines 128 are read out in a current mode. Therefore, the drains of the N-channel M0S readout transistors 112-1 to U2-n are connected together and connected to the source of the N-channel M0S column selection transistor 1-30. N-channel M0S readout transistor 1 1 The sources of 2-1 to 112-η are connected to IMAGE SELECT1 to IMAGE SELECTn, respectively

第18頁 448683 五、發明說明(15)Page 18 448683 V. Description of the invention (15)

信號。N通道MOS列選擇電晶體130之閘極連接R〇w SELECT 信號,且N通道MOS列選擇電晶體130之汲極連接一行輸出 線 128。 主動像素感測器1 0 0 - 4之操作中,行輸出線丨2 8連接n通 道M0S列選擇電晶體1 3 0之汲極。為了要產生代表行輸出線 128上儲存影像之電流,儲存於儲存節點— 1之影像將被 LOW WAGE SELECT1信號選擇,且儲存於儲存節點1〇61之 影像將被LOW IMAGE SELECTn信號選擇。行輸出線丨28上電 流模式輸出是由IMAGE SELECT1至IMAGE SELECTn信號控 制°行輸出線1 2 8輸出必須保持偏壓至足夠高之電壓,其 非選擇N通道M0S讀出電晶體112-1至112-η不開始向後傳 導。再者’我們應該了解IMAGE—SELECT1 至IMAGE SELECTn k號之電壓驅動器必須能夠接收所有來自選擇列之行電 流。 圖9中所描述主動像素感測器丨〇 〇 — 5實施例中,出現在儲 存節點106-1至1〇6〜n/i之電壓分別在行輸出線132-1至 132-j上利用R0W SELECT1信號被讀出,且出現在儲存節點 106-(n-j)至106-π之電壓分別在行輸出線上 利用ROW SELECT i信號被讀出。因此,各n通道M0S讀出電 晶體1 1 2-1至1 1 2-n之汲極連接至Vcc,且N通道M0S讀出電 晶體1 1 2-1至1 12〜n之源極分別連接”通道M0S列選擇電晶體 134-1至134-η之汲極。n通道M 0S列選擇電晶體134-1至 134-n/i之閘極各連接R〇w SELECT1信號,Ν通道M0S列選擇 電晶體134-(n—j )至134-η之閘極各連接ROW SELECTi信signal. The gate of the N-channel MOS column selection transistor 130 is connected to the RW SELECT signal, and the drain of the N-channel MOS column selection transistor 130 is connected to a row of output lines 128. In the operation of the active pixel sensor 1 0-4, the row output line 丨 2 8 is connected to the n channel M0S column selection transistor 1 3 0 drain. In order to generate the current of the stored image on the line output line 128, the image stored in the storage node — 1 will be selected by the LOW WAGE SELECT1 signal, and the image stored in the storage node 1061 will be selected by the LOW IMAGE SELECTn signal. Line output line 丨 28 current mode output is controlled by IMAGE SELECT1 to IMAGE SELECTn signal ° Line output line 1 2 8 output must be maintained biased to a sufficiently high voltage, its non-selection N channel M0S read transistor 112-1 to 112-η does not begin to conduct backwards. Furthermore, we should understand that the voltage drivers IMAGE-SELECT1 to IMAGE SELECTn k must be able to receive all the currents from the rows of the selected column. In the embodiment of the active pixel sensor described in FIG. 9-5, the voltages appearing at the storage nodes 106-1 to 106-n / i are utilized on the row output lines 132-1 to 132-j, respectively. The R0W SELECT1 signal is read out, and the voltages appearing at the storage nodes 106- (nj) to 106-π are read out respectively on the row output lines using the ROW SELECT i signal. Therefore, the drain of each n-channel M0S readout transistor 1 1 2-1 to 1 1 2-n is connected to Vcc, and the source of the N-channel M0S readout transistor 1 1 2-1 to 1 12 ~ n is respectively The “connection” channel M0S column selects the drains of transistors 134-1 to 134-η. The n-channel M 0S column selects the transistors 134-1 to 134-n / i and the gates of each channel are connected to the RW SELECT1 signal, and the N channel M0S The gates of the column selection transistors 134- (n-j) to 134-η are connected to each other.

第19頁 448 683 五、發明說明(16) ------ 號。N通道MOS列選擇電晶體134-1至i34-rn kn—j)之源極連 接第一行輸出線132-1,且N通道MOS列選擇電晶體134 — n/. 至1 3 4 - j之源極連接行輸出線1 3 2 - j。 η 1 主動像素感測器100-5之操作中,儲存於任何儲存節點 10 6-1至l〇6-n内之電荷對應被加至儲存節點1〇6_ι至ι〇6_η 被耦合之N通道MOS列選擇電晶體134-1至ι34_η之問極之 R⑽SELECT1至ROW SELECTi信號應用被讀出,且^利用 測儲存節點1 0 6 - 1至1 0 6 - η被耦合之行輸出線丨3 2〜1至 《 132-j。例如,要選擇一在儲存節點1G6 —i上所提供之儲存 影像’ROW SELECT1信號將被維持aC〇LUMN⑽^^丨線 138-1將被選擇。當多數的儲存節點被使用時,多個r〇w SELECT線及多個行輸出線之間儲存節點丨〇 6一 1至i 〇 6 之矩 陣化減少附加列及行線需求數目。我們亦應該了解替代圖 1中所描述單一公用XFR線,其將有XFR1至”心公用轉換 線。 圖1 0所描述主動像素感測器1 0 0 _ 6實施例中,出現在儲 存節點1 0 6 - 1及1 6 0 - 2上之電壓利用相同的列選擇信號被讀 出當作行輸出線140-1及140-2上之差動信號。因此,!^通 道M0S列選擇電晶體136及N通道M0S讀出電晶體112-1至 112-2被組合成一差動放大器,所以N通道M〇s讀出電晶體 1 12-1至1 12-2之源極各連接至N通道M〇s列選擇電晶體丨36 之汲極’ N通道M0S讀出電晶體1 1 2_i至1 1 2-2之汲極分別連 接至第一及第二行輸出線140-1極140-2,N通道M0S列選擇 電晶體1 3 6之源極連接至一行偏壓線1 3 8,且N通道Μ 0 S列選Page 19 448 683 V. Description of Invention (16) ------ No. The source of the N-channel MOS column selection transistor 134-1 to i34-rn kn-j) is connected to the first row of output lines 132-1, and the N-channel MOS column selection transistor 134 — n /. To 1 3 4-j The source is connected to the row output lines 1 3 2-j. η 1 In the operation of the active pixel sensor 100-5, the charge stored in any storage node 10 6-1 to 106-n is correspondingly added to the storage node 106_ι to ι〇6_η coupled N channel The R⑽SELECT1 to ROW SELECTi signals of the MOS column selection transistors 134-1 to ι34_η are read out, and the measured output nodes 1 0 6-1 to 1 0 6-η are coupled to the row output lines 丨 3 2 ~ 1 to "132-j. For example, to select a storage image provided on the storage node 1G6-i, the ROW SELECT1 signal will be maintained, and the aCOLUMN⑽ ^^ 丨 line 138-1 will be selected. When most storage nodes are used, a matrix of storage nodes between multiple RW SELECT lines and multiple row output lines 〇 061-1 to 〇 6 reduces the number of additional columns and rows and lines required. We should also understand that instead of the single common XFR line described in FIG. 1, it will have XFR1 to “heart common conversion line.” The active pixel sensor 1 0 0 _ 6 described in FIG. 10 appears in storage node 1 The voltages on 0 6-1 and 1 6 0-2 are read out using the same column selection signals as differential signals on row output lines 140-1 and 140-2. Therefore,! ^ Channel M0S column selection transistor The 136 and N-channel M0S readout transistors 112-1 to 112-2 are combined into a differential amplifier, so the sources of the N-channel M0s readout transistors 1 12-1 to 1 12-2 are each connected to the N-channel M0s column selection transistor 丨 36 Drain 'N channel M0S readout transistor 1 1 2_i to 1 1 2-2 The drains are connected to the first and second row output lines 140-1 to 140-2 The source of the N-channel M0S column selection transistor 1 3 6 is connected to a row of bias lines 1 3 8 and the N-channel M 0 S column is selected

第20頁 ^48 683 五、發明說明(π) 擇電晶體1 36之聞極連接至一SELECT信號。 主動像素感測器1 00-6之操作中,N通道M0S讀出電晶體 112^1至1 12-2及N通道M0S列選擇電晶體13Θ形成一差動放 大器,所以當ROW SELECT信號變成HIGH時,N通道M〇s列選 擇電晶體136打開,且在儲存節點1〇6 —}及16〇_2上之差動 1號在行輸出yo-1及14〇-2上被讀出。儲存節點1〇61及 〇-2之差動讀出可以以不同的方式使用。例如,差動讀 出可以使用於讀出一黑暗訊框夕 ?L之不同關係。在此方法中, 相互雜訊可以被移除,只剩下韭 i — 卜非相互關係的像素雜訊《差 動讀出亦可以使用於當成一闲 用於债測影像改變之處理写。 這種改變偵測在諸如保安照相拖击糾 ^ ^ 』# 機中特別有用,且用於#用 在"藍-螢幕"之自動物件貞測中 、 ,^ t 、 我們應該理解設置在根攄 此實施例主動像素感測器中之產& t 士 ^ . * 差動讀出電路亦可以被設置 在一仃電路中。將差動讀出電 訊框在領測改變之前及之後被置在一仃電路中將允許 當本發明之實施例及應用已细4 ° ^ 輕被顯示及說明,對精通此 技藝者而言比上文所提及的更夕片 精逍此 發明之觀念應該是明顯的。目此二改在此可月&疋不違背本 神外,本發明將不受限制。此除…請專利範圍之精Page 20 ^ 48 683 V. Description of the Invention (π) The sensor of the transistor 1 36 is connected to a SELECT signal. In the operation of the active pixel sensor 1 00-6, the N-channel M0S read transistor 112 ^ 1 to 1 12-2 and the N-channel M0S column select transistor 13Θ form a differential amplifier, so when the ROW SELECT signal becomes HIGH At this time, the N-channel Mos column selection transistor 136 is turned on, and the differential No. 1 on the storage nodes 106- and 16-2 is read out on the row outputs yo-1 and 14〇-2. Differential readout of storage nodes 1061 and 0-2 can be used in different ways. For example, differential reading can be used to read a different relationship between a dark frame and L. In this method, the mutual noise can be removed, leaving only the pixel noise i—Bufei's interrelated pixel noise, “differential readout, can also be used as a spare for processing and writing of debt measurement image changes. This kind of change detection is particularly useful in security cameras such as dragging and correcting ^ ^ ”# machines, and is used for #automatic object tracking in“ Blue-Screen ”, we should understand the setting in Based on the production of the active pixel sensor in this embodiment, the differential readout circuit can also be set in a single circuit. Placing the differential readout telecommunication frame in a circuit before and after the change of the measurement will allow the embodiment and application of the present invention to be detailed 4 ° ^ is lightly displayed and explained, for those skilled in this art than The concept of the invention of the more advanced film mentioned above should be obvious. It is possible that the present invention will not be violated, and the invention will not be restricted. In addition, please ...

Claims (1)

448 683 六、申請專利範圍 1. 一種排列在_ Ψ w丄 ^ +導體基板上之主動像素感測器,包 含: 之光感測器,該第一端子 .一具有第—端子及第二端 連接至第一參考電位: 一具有第—她2 子連接—番署 子連接該光感測器該第二端子、第二端 體;及 位且第三端子連接一重置線之重置電晶 多個連接言玄# π , 2如申2 ΐ ί Ϊ感測器該第二端子之儲存節點。 含連接該多個儲在^ 種主動像素感測器,尚包 值之裝置。 即點用於輸出來自任何該多數儲存節點 3.如申请專利範圍第1項之—絲 、 含多個轉換線,复中 —種主動像素感測器,尚包 自獨立的多數轉換電tc的多數儲存節點利用各 :供电日日體具有連接該光感她 連接与Γ女^ 我弟一端子之第一端子、 Μ各自獨立的多數儲存節點 _ 立的多數轉換線之第三端子。‘第一柒子及連接各自獨 4 ‘如申請專利範圍第 — 各自猎w μ笔# π + 種主動像素感測器,其中 竭立的多數儲存節 連接用於鈐Ψ Φ ή ν 利用各自獨立的多數讀出電晶體 何該多數儲存節點值之裝[該讀出 具有連接該各自獨立的多數儲存節點之第一端子、 儲亡"—電位之第二端子及連接用於輸出纟自任何該多數 健存郎點值裝置之第三端子。 5.如辛請專利範圍第i項之一種主動像素感測器,尚包448 683 VI. Application for patent scope 1. An active pixel sensor arranged on a _ Ψ w 丄 ^ + conductor substrate, including: a light sensor, the first terminal; a first terminal and a second terminal Connected to the first reference potential: one with the first—the second child connection—the fan department connected the light sensor, the second terminal, and the second terminal body; and the third terminal is connected to a reset line with a reset cable A plurality of crystals are connected to the xuan # π, 2 Rushen 2 ΐ ί Ϊ sensor storage node of the second terminal. Includes devices that are connected to the multiple active pixel sensors and still contain value. The point is used to output from any of the majority of storage nodes. 3. For example, in the scope of patent application No. 1 — silk, containing multiple conversion lines, complex — an active pixel sensor, still includes independent majority conversion electrical tc Most storage nodes use each: the power supply sun and the sun have a first terminal connected to the light sensor and a first terminal of the female, and a third terminal of the majority of the conversion lines that are independent of each other. '第一 柒 子 和 连接 各自 独 independently 4' such as the scope of the patent application-each hunting w μ 笔 # π + active pixel sensors, where most of the storage nodes are connected for 钤 Ψ Φ ν ν use each independent The majority of the readout transistor should be installed in the majority of storage node values. [The readout has a first terminal connected to the respective independent majority storage node, a second terminal connected to the potential, and a connection for output. The third terminal of the majority Jian Lang point device. 5. An active pixel sensor as described in item i of the patent, 448683 六、申請專利範圍 含多個儲存元件,各個各自獨立的該儲存元件具有連接各 自獨立的該儲存節點之第一端子及連接第二參考電位之第 二端子。 6. 如申請專利範圍第2項之一種主動像素感測器,其中 該用於輸出一值之裝置包含: 多個行輸出線; 一列選擇線:及 多個列選擇電晶體,各個各自獨立之列選擇電晶體具 有連接該多個儲存節點其中一個之第一端子、連接該多個 行輸出線其中一個之第二端子及連接該列選擇線之第三端 子。 7. 如申請專利範圍第6項之一-種主動像素感測器,尚包 含多個轉換線,其中各個各自獨立之該多數節點利用各自 獨立的轉換電晶體連接該光感測器之該第二端子,該轉換 電晶體具有連接該光感測器該第二端子之第一端子、連接 各自獨立的該多數儲存節點之第二端子及連接各自獨立的 該多數轉換線之第三端子。 8. 如申請專利範圍第6項之一種主動像素感測器,其中 各個各自分離之該儲存節點利用一各自分離之多數讀出電 晶體連結各自分離之該多數列選擇電晶體該第一端子,該 讀出電晶體具有連接該各自分離之該儲存節點之第一端 子,連接第二電位之第二端子及連接該各自分離之該多數 列選擇電晶體該第一端子之第三端子。 9. 如申請專利範圍第6項之一種主動像素感測器,尚包448683 6. Scope of patent application Contains multiple storage elements, each of which is independent of the storage element having a first terminal connected to the independent storage node and a second terminal connected to a second reference potential. 6. An active pixel sensor according to item 2 of the patent application scope, wherein the device for outputting a value includes: a plurality of row output lines; a column selection line: and a plurality of column selection transistors, each of which is independent of each other. The column selection transistor has a first terminal connected to one of the plurality of storage nodes, a second terminal connected to one of the plurality of row output lines, and a third terminal connected to the column selection line. 7. If one of the 6th category of the patent application-an active pixel sensor, still includes a plurality of conversion lines, each of which is independent of the majority node is connected to the first of the light sensor using the independent conversion transistor. Two terminals. The conversion transistor has a first terminal connected to the light sensor and the second terminal, a second terminal connected to the independent majority storage node, and a third terminal connected to the independent majority conversion line. 8. For example, an active pixel sensor according to item 6 of the application, wherein each of the storage nodes separated by a separate majority of readout transistors is connected to the separated columns of the majority to select the transistor and the first terminal, The readout transistor has a first terminal connected to the storage node separately, a second terminal connected to a second potential, and a third terminal connected to the first terminal of the plurality of column selection transistors. 9. If an active pixel sensor of item 6 of the scope of patent application, 第23頁 448683 六、申請專利範圍 含多個儲存元件,各個各自獨立之該儲存元件具有連接一 各自獨立之該儲存節點之第一端子及連接第二參考電位之 第二端子。 1 〇.如申請專利範圍第2項之一種主動像素感測器,其中 用於輸出值之該裝置包含: 多個列選擇線; 一行輸出線;及 多個列選擇電晶體,各個該列選擇電晶體具有連接其 中之一該多個儲存節點之第一端子,連接該行輸出線之第 二端子及連接其中之一該多數列選擇線之第三端子。 1 1.如申請專利範圍第1 0項之一種主動像素感測器,尚 包含多個轉換線,其中各個各自—獨立的該多個儲存節點利 用一各自獨立的多個轉換電晶體之該第二端子連接該光感 侧器之該第二端子,該轉換電晶體具有連接該光感側器之 該第二端子之第一端子,連接該各自獨立的該多個儲存節 點之第二端子及連接一各自獨立的多個轉換線之第三端 子。 1 2.如申請專利範圍第1 0項之一種主動像素感測器,其 中各個各自分離之該儲存節點利用一各自分離之多數讀出 電晶體連結各自分離之該多數列選擇電晶體該第一端子, 該讀出電晶體具有連接該各自分離之該儲存節點之第一端 子,連接第二電位之第二端子及連接該各自分離之該多數 列選擇電晶體該第一端子之第三端子。 1 3.如申請專利範圍第1 0項之一種主動像素感測器,尚Page 23 448683 6. Scope of patent application Contains multiple storage elements, each of which is independent of the storage element having a first terminal connected to a respective independent storage node and a second terminal connected to a second reference potential. 10. The active pixel sensor according to item 2 of the scope of the patent application, wherein the device for outputting comprises: a plurality of column selection lines; a row of output lines; and a plurality of column selection transistors, each of which selects the column. The transistor has a first terminal connected to one of the plurality of storage nodes, a second terminal connected to the row of output lines, and a third terminal connected to one of the plurality of column selection lines. 1 1. An active pixel sensor according to item 10 of the patent application scope, further comprising a plurality of conversion lines, each of which is a separate storage node using a plurality of independent conversion transistors. The two terminals are connected to the second terminal of the light sensor, the conversion transistor has a first terminal connected to the second terminal of the light sensor, a second terminal connected to each of the plurality of storage nodes, and A third terminal connected to a plurality of independent conversion lines. 1 2. An active pixel sensor according to item 10 of the scope of patent application, wherein each of the storage nodes separated by a separate majority of readout transistors is connected to the separated columns of the majority to select the transistor the first A terminal, the readout transistor has a first terminal connected to the storage node separately, a second terminal connected to a second potential, and a third terminal connected to the first terminal of the plurality of column selection transistors. 1 3. An active pixel sensor according to item 10 of the patent application scope. 第24頁 448683 六、申請專利範圍· " ----— __ 包含多個儲存元件,各個各自獨立的該= 各自獨立的該儲存節點之第一端子乃=錯存儿件具有連接 第二端子。 連接第二參考電位之 1 4.如申請專利範圍第2項之一種主 該用於輸出一值之裝置包含: 像素感測器,其中 一列選擇線; 一行輸出線; 多個影像選擇線; 一列選擇電晶體,其具有遠接姑t 子、連接該行輸出線之第二端子及第線之第-端 多個影像選擇電晶體,各個該影像 牌t 中之一該多個儲存節點之第一端子、 日3脱具有連接其 該第三端子之第二端子及連接苴中 電日日體 之第三端子。 中之-該多個影像選擇線 15.如申請專利範圍第14項之一種主動 中各個各自獨立的多數儲上利用 各自獨立的夕數轉換電晶體連接該光感測器該第二端子, 忒轉換電晶體具有連接該光感測器該第二端子之 子、連接該各自獨立的多數儲存節點之第二端子及連接各 自獨立的多數轉換線之第三端子。 1 6如申請專利範圍第14項之—種主動像 該儲存節點利用-各自分離之多數讀出 子數影像選擇電晶體該第-端 曰體具有連接該各自分離之該儲存節點之第Page 24 448683 6. Scope of patent application " -------- __ Contains multiple storage elements, each of which is independent = the first terminal of the storage node which is independent of each other is = the wrongly stored piece has a second connection Terminal. 1 connected to the second reference potential 4. The device for outputting a value as described in item 2 of the scope of patent application includes: a pixel sensor, in which one column of selection lines; one row of output lines; multiple image selection lines; one column The selection transistor has a plurality of image selection transistors, which are remotely connected to the second terminal, the second terminal connected to the output line of the row, and the first end of the second line. The one terminal and the three terminals have a second terminal connected to the third terminal thereof and a third terminal connected to the CLP Solar Corporation. Zhongzhi-the plurality of image selection lines 15. As one of the items in the scope of application for patent No. 14, each of the independent majority storages uses the independent night-time conversion transistors to connect the light sensor and the second terminal, 忒The conversion transistor has a son connected to the light sensor and the second terminal, a second terminal connected to the independent majority storage node, and a third terminal connected to the independent majority conversion line. 16 As in item 14 of the scope of the patent application-an active image, the storage node uses a majority of reads that are separated from each other to select the transistor. The -terminal has a first connection to the storage node that is separated from each other. 448683 六、申請專利範園 一端子,連接第二電位之第二端子及連接該各自分離之該 多數影像選擇電晶體該第一端子之第三端子。 1 7.如申請專利範圍第1 6項之一種主動像素感測器,尚 包含多個儲存元件,各個各自獨立的該儲存元件具有連接 各自獨立的該儲存節點之第一端子及連接第二參考電位之 第二端子。 1 8.如申請專利範圍第4項之一種主動像素感測器,其中 該用於輸出一值之裝置包含: 一列選擇線; 一行輸出線; 多個影像選擇線,各個各自獨立的影像選擇線連接各 自獨立的該讀出電晶體之該第三端子;及 一列選擇電晶體,其具有連接該列選擇線之第—端 子、連接該行輸出線之第二端子及連接各個該多個讀出電 晶體該第二端子之第三端子。 1 9.如申請專利範圍第1 8項之一種主動像素感測器,尚 包含多個轉換線 > 其中各個各自獨立的多數儲存節點利用 各自獨立的多數轉換電晶體連接該光感測器該第二端子, 該轉換電晶體具有連接該光感測器該第二端子之第一端 子、連接該各自獨立的多數儲存節點之第二端子及連接各 自獨立的多數轉換線之第三端子。 2 0.如申請專利範圍第丨8項之一種主動像素感測器,尚 包含多個儲存元件,各個各自獨立的該儲存元件具有連接 各自獨立的該儲存節點之第一端子及連接第二參考電位之448683 VI. Patent application: One terminal, the second terminal connected to the second potential, and the third terminal connected to the first terminal of the majority selected image transistor. 1 7. An active pixel sensor according to item 16 of the patent application scope, further comprising a plurality of storage elements, each of which is independent of the storage element having a first terminal connected to the independent storage node and a second reference. The second terminal of the potential. 1 8. An active pixel sensor according to item 4 of the scope of patent application, wherein the device for outputting a value includes: a row of selection lines; a row of output lines; multiple image selection lines, each of which is an independent image selection line The third terminal connected to the independent readout transistor; and a column of selection transistors having a first terminal connected to the column selection line, a second terminal connected to the row output line, and each of the plurality of readouts The third terminal of the second terminal of the transistor. 19. An active pixel sensor according to item 18 of the scope of patent application, which still includes a plurality of conversion lines > wherein each of the independent majority storage nodes uses the independent majority of conversion transistors to connect the light sensor to A second terminal, the conversion transistor has a first terminal connected to the light sensor and the second terminal, a second terminal connected to the independent majority storage node, and a third terminal connected to the independent majority conversion line. 20. An active pixel sensor according to item 8 of the patent application scope, which further includes a plurality of storage elements, each of which is independent of the storage element having a first terminal connected to the storage node and a second reference connected to the storage node. Of potential 第26頁 #48683 六、申請專利範圍 第二端子。 2 1.如申請專利範圍第2項之一種主動像素感測器,其中 該用於輸出一值之裝置包含: 多個行輸出線; 多個列選擇線;及 多個列選擇電晶體,各個各自獨立之列選擇電晶體具 有連接該多個儲存節點其令一個之第一端子、連接該多個 行輸出線其令一個之第二端子及連接該多個列選擇線之第 三端子。 2 2.如申請專利範圍第2 1項之一種主動像素感測器,尚 包含多個轉換線,其中各個各自獨立的多數儲存節點利用 各自獨立的多數轉換電晶體連接該光感測器該第二端子, 該轉換電晶體具有連接該光感測器該第二端子之第一端 子、連接該各自獨立的多數儲存節點之第二端子及連接各 自獨立的多數轉換線之第三端子。 2 3.如申請專利範圍第2 1項之一種主動像素感測器,其 中各個各自分離之該儲存節點利用一各自分離之多個讀出 電晶體連結該多數其中之一列選擇電晶體該第一端子,該 讀出電晶體具有連接該多個其中之一儲存節點之第一端 子,連接第二電位之第二端子及連接該多個其中之一列選 擇電晶體該第一端子之第三端子。 2 4.如申請專利範圍第2丨項之一種主動像素感測器,尚 包含多個儲存元件,各個各自獨立的該儲存元件具有連接 各自獨立的該儲存節點之第一端子及連接第二參考電位之P.26 # 48683 6. Scope of patent application Second terminal. 2 1. An active pixel sensor according to item 2 of the patent application scope, wherein the device for outputting a value comprises: multiple row output lines; multiple column selection lines; and multiple column selection transistors, each Each of the independent column selection transistors has a first terminal connected to the plurality of storage nodes, a second terminal connected to the plurality of row output lines, and a third terminal connected to the plurality of column selection lines. 2 2. An active pixel sensor according to item 21 of the patent application scope, further comprising a plurality of conversion lines, wherein each of the independent majority storage nodes uses the independent majority of conversion transistors to connect the light sensor to the first Two terminals, the conversion transistor has a first terminal connected to the light sensor and the second terminal, a second terminal connected to the independent majority storage node, and a third terminal connected to the independent majority conversion line. 2 3. An active pixel sensor according to item 21 of the scope of patent application, wherein each of the storage nodes separated by a plurality of readout transistors separately connected to one of the majority selects the transistor the first Terminal, the readout transistor has a first terminal connected to one of the plurality of storage nodes, a second terminal connected to a second potential, and a third terminal connected to the first terminal of the plurality of column selection transistors. 2 4. An active pixel sensor according to item 2 of the patent application scope, which further includes a plurality of storage elements, each of which is independent of the storage element having a first terminal connected to the storage node and a second reference connected to the storage node. Of potential 第27頁 448683 六、申請專利範圍 第二端子 25. 如申請專利範圍 該用於輸出一值之裝 項之一種主動像素感測器,其中 一列選擇線; 包含: 一行偏壓線; 第一及第二行輪出線, 子 一列選擇電晶體,曰 、連接該行偏壓線之/、具' 有連接該列選擇線之第一端 其中該多個儲存私第二端子及第三端子; 點 ’該第一儲存節點=1包含第一儲存節點及第二儲.存節 ,第二端子連接該第j有第一端子連接該第一儲存節 電晶體該第三端子=該^行輪出線且第三端子連接列選擇 值之裝置,且該第二^ 二讀出.電晶體連接該用於輪出— 儲存節點,第二端^連=節點以具有第一端子連接該第二 列選擇電晶體該第三端子该第,行輪出線且第三端子連接 輸出一值之裝置。 之該第二讀出電晶體連接該用於 26, 如申請專利範圍第25 、 包含多個轉換線,其中各久之一種主動像素感測器,尚 各自獨立的多數轉換電晶 j獨立的多數儲存節點利用 該轉換電晶體具有連接該^,接該光感測器該第二端子, 子、連接該各自獨立的多X數器該第二端子之第—端 自獨立的多數韓振# 堵存節點之第_ # u 27如申線之第三端子。弟—鈿子及連接各 .如申凊專利範圍第25 的該儲存元件具有連Page 27 448683 VI. Patent application scope Second terminal 25. If the scope of patent application is for an active pixel sensor for outputting a value item, one column of selection lines includes: one row of bias lines; the first and The second row turns out of the line, and the sub-column selects the transistor. That is, the bias line connected to the row has a first end connected to the column selection line, among which the plurality of storage private terminals and the third terminal; Point 'The first storage node = 1 includes the first storage node and the second storage node. The second terminal is connected to the jth terminal, and the first terminal is connected to the first storage transistor. The third terminal = the line is rotated out. Line and the third terminal is connected to the device with the selected value, and the second ^ is read out. The transistor is connected to the wheel for storage — the storage node, and the second terminal is connected to the node to have the first terminal connected to the second column. Select the third terminal of the transistor, the first terminal of the transistor, and the third terminal connected to a device that outputs a value. The second readout transistor is connected to 26. For example, the scope of application for patent No. 25 includes a plurality of conversion lines, one of which is an active pixel sensor. The independent majority of the conversion transistors are independent. The node uses the conversion transistor to have a connection to the ^, to the light sensor and the second terminal, and to the respective independent multi-counter. The second terminal of the second terminal is independent of the majority of Han Zhen # The #_ 27 of the node is the third terminal of the application line. Younger sister-in-law and connection. For example, the storage element of claim 25 has a connection 第28頁 包3夕個儲存元件,各個各自-種主動像素感測器,尚 448683 六、申請專利範圍 各自獨立的該儲存節點之第一端子及連接第二參考電位之 第二端子。 2 8. —種排列於一半導體基板上之主動像素感測器,包 含: 一具有第一端子及多個第二端子之光感測器,該第一 端子連接第一參考電位; 一具有第一端子連接該光感測器該多數至少一個第二 端子,第二端子連接一重置電位且第三端子連接一重制線 之重置電晶體;及 多個儲存節點,各個該多個儲存節點連接該光感測器 一各自獨立之該第二端子。 2 9.如申請專利範園第2 8項之-一種主動像素感測器,尚 包含連接該多個用於自該多個之中任何儲存節點輸出一值 之儲存節點之裝置。 3 0.如申請專利範圍第2 8項之一種主動像素感測器,尚 包含多個轉換線,其中各個各自獨立的多數儲存節點以一 各自獨立的多數轉換電晶體連接該光感測器該多個其中之 一第二端子,該轉換電晶體具有連接該光感測器該多個其 中之一第二端子之第一端子、連接該各自獨立的多數儲存 節點之第二端子及連接各自獨立的多數轉換線之第三端 子。 3 1.如申請專利範圍第2 9項之一種主動像素感測器,其 中各個各自獨立之多個儲存節點以一各自獨立的多個讀出 電晶體連接自該多個儲存節點任何一個輸出一值之該裝Page 28 includes three storage elements, each of which is an active pixel sensor, still 448683. 6. Scope of patent application The first terminal of the storage node and the second terminal connected to the second reference potential are independent of each other. 2 8. An active pixel sensor arranged on a semiconductor substrate, comprising: a light sensor having a first terminal and a plurality of second terminals, the first terminal being connected to a first reference potential; One terminal is connected to the light sensor, the plurality of at least one second terminal, the second terminal is connected to a reset potential, and the third terminal is connected to a reset transistor of a reproduction line; and a plurality of storage nodes, each of the plurality of storage nodes Each of the light sensors is connected to the second terminal independently. 29. The active pixel sensor according to item 28 of the patent application park, which further comprises a device for connecting the plurality of storage nodes for outputting a value from any of the plurality of storage nodes. 30. An active pixel sensor according to item 28 of the patent application scope, further comprising a plurality of conversion lines, wherein each of the independent majority storage nodes is connected to the light sensor with a separate majority conversion transistor. One of a plurality of second terminals, the conversion transistor has a first terminal connected to the one of the plurality of second terminals, a second terminal connected to each of the plurality of independent storage nodes, and each connected independently The third terminal of most conversion lines. 3 1. An active pixel sensor according to item 29 of the scope of patent application, wherein each of the plurality of independent storage nodes is connected to each of the plurality of storage nodes by a plurality of independent readout transistors, respectively. Worth the load 第29頁 448 683 六、申請專利範圍 一 置:該=出電晶體戽有連接該各自獨立之該多個儲存節點 之第一端子’連接第二電位之第二端子及連接自該多個儲 存節點任何一個輪出一值之該裝置之第三端子。 3 2.如申清專利圍第2 8項之一種主動像素感測器,尚 包含多個儲存7L件’各個各自獨立的該儲存元件具有連接 各自獨立的該儲存節點之第—端子及連接第二參考電位之 第二端子。 3 3.如申請專利範圍第29項之一種主動像素感測器,其 中該用於輸出一值之裝 多個行輸出線: 一列選擇線;及 多個列選擇電晶體,各個 有連接該多個儲存節點其中一 行輸出線其中一個之第二端子 子。 各自獨立之列選擇電晶體具 個之第一端子、連接該多個 及連接該列選擇線之第三端 34如巾請專利範圍第33項之一種主動像素感測器 包含多個轉換線,其中各個各自獨立的多 ° 各自獨立的多數轉換電晶體連接該光感測 子:點:; 二巧::轉換電晶體具有連接該光感測器該其d 一鈿子之第一端子’連接該各自獨立的多數儲 二端子及連接各自獨立的多數轉換線之第三卩點之第 35.如申請專利範圍第33項之。 晶體連結-各自分離之該多數列選擇電晶ί;;數=電Page 29 448 683 6. The scope of the patent application is set: the = output transistor does not have a first terminal connected to the respective independent storage nodes, a second terminal connected to a second potential, and a connection from the plurality of storage The third terminal of the device is rotated by any one of the nodes. 3 2. An active pixel sensor as claimed in item 28 of Shenqing Patent, which still contains multiple storage 7L pieces. Each of the storage elements has its own first-terminal and connection-side connected to the storage nodes. Second terminal of two reference potentials. 3 3. An active pixel sensor according to item 29 of the scope of patent application, wherein the plurality of row output lines for outputting a value are: one column selection line; and a plurality of column selection transistors, each of which is connected to the multiple A second terminal of one of the storage nodes in one of the output lines. An independent pixel selection transistor has a first terminal, a plurality of connection terminals, and a third end 34 connected to the selection line of the column. For example, an active pixel sensor according to item 33 of the patent includes a plurality of conversion lines. Each of them is independent of each other, and a plurality of independent conversion transistors are connected to the light sensor: point :; dip :: the conversion transistor has a first terminal which is connected to the light sensor, and its d pin. The thirty-fifth point of the third terminal of the independent majority of the second storage terminal and the independent majority of the conversion lines is as described in item 33 of the scope of patent application. Crystal connection-the majority of the columns separated from each other are selected; crystal; number = electricity 第30頁 448683 六、申請專利範圍 該讀出電晶體具有連接該各自分離之該儲存節點之第一端 子,連接第二電位之第二端子及連接該各自分離之該多數 列選擇電晶體該第一端子之第三端子。 36.如申請專利範圍第33項之一種主動像素感測器,尚 包含多個儲存元件,各個各自獨立的該儲存元件具有連接 各自獨立的該儲存節點之第一端子及連接第二參考電位之 第二端子。 3 7.如申請專利範圍第29項之一種主動像素感測器,其 中用於輸出值之該裝置包含: 多個列選擇線; 一行輸出線;及 多個列選擇電晶體,各個該列選擇電晶體具有連接其 中之一該多個儲存節點之第一端子,連接該行輸出線之第 二端子及連接其中之一該多數列選擇線之第三端子。 3 8.如申請專利範圍第37項之一種主動像素感測器,尚 包含多個轉換線,其中各個各自獨立的多數儲存節點以一 各自獨立的多數轉換電晶體連接該光感測器其中之一該第 二端子,該轉換電晶體具有連接該光感測器該其中之一第 二端子之第一端子,連接該各自獨立的多數儲存節點之第 二端子及連接各自獨立的多數轉換線之第三端子。 3 9.如申請專利範圍第37項之一種主動像素感測器,其 中各個各自分離之該儲存節點以一各自分離之多數讀出電 晶體連結一各自分離之該多數列選擇電晶體該第一端子, 該讀出電晶體具有連接該各自分離之該儲存節點之第一端Page 30 448683 VI. Scope of patent application The readout transistor has a first terminal connected to the storage node which is separated from each other, a second terminal connected to the second potential and a plurality of selected transistors which are connected to the separated columns. Third terminal of one terminal. 36. An active pixel sensor according to item 33 of the patent application scope, further comprising a plurality of storage elements, each of which is independent of the storage element having a first terminal connected to the independent storage node and a second reference potential第二 terminal。 The second terminal. 3 7. An active pixel sensor according to item 29 of the patent application scope, wherein the device for outputting comprises: a plurality of column selection lines; a row of output lines; and a plurality of column selection transistors, each of which selects The transistor has a first terminal connected to one of the plurality of storage nodes, a second terminal connected to the row of output lines, and a third terminal connected to one of the plurality of column selection lines. 3 8. An active pixel sensor according to item 37 of the patent application scope, further comprising a plurality of conversion lines, wherein each of the independent majority storage nodes is connected to the light sensor by an independent majority conversion transistor. A second terminal, the conversion transistor having a first terminal connected to the one of the second terminals of the light sensor, a second terminal connected to the respective independent majority storage nodes, and a second terminal connected to the respective independent conversion lines Third terminal. 3 9. An active pixel sensor according to item 37 of the scope of patent application, wherein each of the storage nodes separated by a separate majority of readout transistors is connected to a separate column of the majority selection transistor and the first A terminal, the readout transistor has a first end connected to the storage nodes which are respectively separated 第31頁 448683 六、申請專利範圍 子’連接第二電位之第二端子及連接該各自分離之該多數 列選擇電晶體該第一端子之第三端子3 4 0 ·如申清專利範圍第3 7項之一種主動像素感測器,尚 包含多個儲存元件,各個各自獨立的該儲存元件具有連接 各自獨立的該儲存節點之第一端子及連接第二參考電位之 第二端子。 4 1.如申請專利範圍第2 9項之一種主動像素感測器,其 中該用於輸出~值之裝置包含: 一列選擇線; 一行輸出線; 多個影像選擇線; τ列選擇電晶體,其具有連-接該列選擇線之第—端 子、連接該行輸出線之第二端子及第三端子·,及 多個影像選擇電晶體,各個該影像選擇電晶體具有1 多個其中之一儲存節點之第一端子’連接該列選擇電a ^ 該第三端子之第二端子及連接該多個其中之一影傻二sa _ , _ t選擇線 4 2 ‘如申請專利範圍第41項之一種主動像素感測器 、, 包含多個轉換線,其中各個各自獨立的多數儲存〜D ’尚 即點a 各自獨立的多數轉換電晶體連接該光感測器並中+ 入一 二端子,該轉換電晶體具有連接該光感測器該其中 々弟 端子之第一端子,連接該各自獨立的多數儲存節之一第 端子及連接各自獨立的多數轉換線之第三端子即. 點之第 4 3 ·如申請專利範圍第4 1項之一種主動像+戌,a, 承攻碉器,其Page 31 448683 VI. Patent application scope 'The second terminal connected to the second potential and the third terminal connected to the separate column selected transistor the third terminal of the first terminal 3 4 0 An active pixel sensor according to item 7, further comprising a plurality of storage elements, each of which has a first terminal connected to the storage node and a second terminal connected to the second reference potential. 4 1. An active pixel sensor according to item 29 of the scope of patent application, wherein the device for outputting a value comprises: a row of selection lines; a row of output lines; a plurality of image selection lines; a τ column selection transistor, It has a first terminal connected to the column selection line, a second terminal and a third terminal connected to the row output line, and a plurality of image selection transistors, each of which has one of more than one The first terminal of the storage node is connected to the column to select electricity a ^ the second terminal of the third terminal and to connect one of the plurality of shadowy two sa _, _ t selection line 4 2 'as in the scope of patent application No. 41 An active pixel sensor includes a plurality of conversion lines, each of which is stored in an independent majority. D ′ is the point a. The independent majority of the conversion transistors are connected to the light sensor, and one or two terminals are connected. The conversion transistor has a first terminal connected to the photo sensor and a younger terminal thereof, a first terminal connected to each of the independent majority storage nodes, and a third terminal connected to each of the independent majority conversion lines.4 3 · If an active image + 像, a of the scope of patent application, item 41, 第32頁Page 32 448 683 六、申請專利範圍 ' --- _各個各自分離之該儲存節點以—各自分離之多 晶體連接-各自分離之該多數影像選擇電晶體該第—端 子端ΪΙίίΊ有連接該各自分離之該儲存節點之第 ^ ^ 弟一私子及連接該各自分離之姑 夕數影像選擇電晶體該第—端子之第三端子。 〇Λ 44.如申請專利範圍第43項之—種主動素 包J多個儲存元件,各個各自獨立的該儲存元件且有連南拉 第二:Ϊ的該儲存節點之第-端子及連接第二參考電位之 45_如申請專利範圍第31項之一種 中該用於輸出—值之裝置包含: 其 7列選擇線; _ —行輸出線; ά π f個影像選擇線,各個各自獨立的影像選擇@ i i —幻及靖出電晶體之該第三端子;及 子、:= 其具有連接該列選擇線之第-端 晶體該第-Χ嫁=線之第二端子及連接各個該多個讀出電 46.如申;直Λ第三端子° ' 包含多個轉:圍第45項之-種主動像素感測器,尚 各自獨立:Ϊ 中各個各自獨立的多數儲存節點以- 二端子,電晶體連接該光感測器其中之-該第 二端子之^ 晶體具有連接該光感測器該其中之一第 二端子及連接ίΓ ’連接該各自獨立的多數储存節點之第 逆钱各自獨立的多數轉換線之第三端子。448 683 VI. Application for patent scope '--- _Each storage node that is separated from each other is connected by a separate polycrystal-the majority of the images are selected separately. The first terminal of the terminal is connected to the separated The third terminal of the first terminal of the storage node and the third terminal of the first terminal of the transistor are connected to the respective separated images. 〇Λ 44. According to item 43 of the scope of the patent application-an active element package J, a plurality of storage elements, each of which is independent of the storage element and has a naming second: a terminal of the storage node and a connection 45_ of the two reference potentials. The device for output-value as described in item 31 of the scope of the patent application includes: its 7-column selection line; _-row output line; π f image selection lines, each independently Image selection @ ii — the third terminal of the magic and Jing out transistor; and: == it has the first terminal connected to the column selection line, the second terminal of the -x = = line and each connected to the multiple Readout 46. Rushen; straight Λ third terminal ° 'contains multiple turns: an active pixel sensor around item 45, still independent of each other: each of the independent majority of storage nodes in Ϊ with-2 Terminal, the transistor is connected to one of the light sensors-the second terminal of the crystal has a second terminal connected to the light sensor, one of the second terminals, and connected to the respective first and second storage nodes. The third terminal of each independent majority of conversion lines 第33頁 4 48 68 3 六、申請專利範圍 — 4 7.如申:月專利範圍第45項之一種主動像素感測器,尚 包含多個儲存元件,各個各自獨立的該儲存元件具有連接 各自獨^的該餘存節點之第一端子及連接第二參考電 第二端子。 48·如申請專利範圍第29項之一帛主動像素感測器,其 中該用於輸出一值之裝置包含: 多個行輸出線; 多個列選擇線; 多個列選擇電晶體,各個列選擇電晶體具有連接該多 個其中之:儲存節點之第一端子,連接該多個其中之一行 輸出線之第二端子及連接各個該多個其中之一列選擇線之 第三端子。 — 49,如申請專利範圍第48項之一種主叙後主β 包含多個轉換線,其中各個各自獨立:多像數 各自獨立的多數轉換電晶體連接該光感測器其卩‘一占 二端子,該轉換電晶體具有連接μ ^則器該n 二端子之第-端子,連接該各自胃立的 ς 二端子及連接各自獨立的多數轉換線之第三ώ什即·點之弟 5 0.如申請專利範圍第48項之一種主動傻%子。 中各個各自分離之該儲存節點利用—各自八、'測器’其 電晶體連結該多數其中之一列選擇電晶體:f之多個須出 瓶' 第一,今女 讀出電晶體具有連接該多個其中之-儲存節點之端以 子’連接第二電位之第二蠕子及連接該多個其中之一列選 擇電晶體該第一端子之第三端子。Page 33 4 48 68 3 VI. Scope of patent application — 4 7. Rushen: An active pixel sensor of item 45 of the monthly patent scope still includes multiple storage elements, each of which is independent of each other The first terminal of the remaining node and the second terminal connected to the second reference circuit. 48. The active pixel sensor according to item 29 of the scope of patent application, wherein the device for outputting a value includes: multiple row output lines; multiple column selection lines; multiple column selection transistors, each column The selection transistor has a first terminal connected to the plurality of: storage nodes, a second terminal connected to one of the plurality of row output lines, and a third terminal connected to each of the plurality of column selection lines. — 49. For example, after the main description of item 48 of the scope of the patent application, the main β includes multiple conversion lines, each of which is independent: a plurality of independent conversion transistors with multiple image numbers are connected to the light sensor, and one of them is two. The terminal, the conversion transistor has the first-terminal connected to the n two terminals of the μ device, the second terminal connected to the respective terminals, and the third terminal connected to the independent majority of the conversion lines. . Such as the scope of an application for patent 48, a kind of active fool. Each of the storage nodes that are separated from each other uses-each, "testers" whose transistors are connected to one of the majority to select a transistor: a number of f must be out of the bottle. First, the current read transistor has a connection to the One of the plurality of storage nodes is connected to the second worm of the second potential with a sub- ', and the third terminal of the first terminal of the plurality of selection transistors is connected to one of the plurality of columns. 第34頁 448683 六、申請專利範圍 勹含多個儲Y專-利乾圍第4 8項之一種主動像素感測器,尚 ^自獨立的二兀件,各個各自獨立的該儲存元件具有連接 第二端子。 子即點之第一端子及連接第二參考電位之 t ^ ^ ^ ^ ^ ^ ^ A 一列選擇線;乂 l含: 一行偏壓線; 第一及第二行輪出線; 子 點 點 一列選擇電晶體,其 連接該行偏壓線之坌 、擇線之第-端 其申访夕,魘為之4二端子及第三端子; 、ο夕個儲存節點包含第^ 一儲存筋g_ 該第一儲存節點以目=3桊儲存即點及弟二儲存節 第二端子連接_第2—端子連接該第—儲存節 電晶體該第i端Ϊ3;編線且第三端子連接列選擇 值之裝置…第讀出電晶體連接該用於輪出- 倚存節點,第:節點以具有第-端子連接該第二 列選擇電晶體咳第-遮早5亥第一行輸出線且第三端子連接 輪出—值之裝ΐ第 該第二讀出電晶體連接該用於 包5: Λ',專利範圍第52項之一種主動像素感測器,尚 各自獨Γ線,纟中各個各自獨立的多數儲存節點以-_山獨立的多數轉換電晶體連接該光感測器其中 〜&子之第一端孑,連接該各自獨立的多數儲存節點之第Page 34 448683 VI. Patent application scope: An active pixel sensor that contains multiple storage Y-Liganwei items 48, from independent two elements, each of the independent storage elements has a connection第二 terminal。 The second terminal. The first terminal of the sub-point and the t ^ ^ ^ ^ ^ ^ ^ ^ A line of selection lines; 含 l contains: one line of bias lines; the first and second lines are rounded out; the sub-points are one line Select the transistor, which is connected to the line of the bias line of the row, the first end of the selected line, and the second terminal and the third terminal; and the storage node includes the first storage rib g_ The first storage node is connected to the storage point of the 3rd storage node and the second terminal of the second storage node. The second terminal is connected to the first storage transistor and the i terminal is 3; the wire is selected and the third terminal is connected to the selected value. Device ... The first readout transistor is connected to this wheel-out node, and the first node is connected to the second column with the first terminal to select the transistor. The first output line of the first terminal and the third terminal Connection wheel-out device—the second readout transistor is connected to the active pixel sensor for package 5: Λ ', the 52nd item in the patent scope, which has its own independent line, and each of them is independent. Most of the storage nodes are connected to the light sensor with a -_ independent independent majority of conversion transistors. mp; the first end of the child, connected to the independent majority of storage nodes 第35頁 二=子,該轉換電晶體具有連接該光感測器該其中之二 448 b c ο 六、申請專利範圍 二端子及連接各自獨立的多數轉換線之第三端子。 54.如申請專利範圍第52項之一種主動像素感測器,尚 >包含多個儲存元件,各個各自獨立的該儲存元件具有連接 各自獨立的該儲存節點之第一端子及連接第二參考電位之 第二端子。 5 5. —種操作主動像素感測器之方法,該主動像素感測 器具有一光感測器、一重置電晶體、多個連接該光感測器 之儲存節點及連接該多個儲存節點用於自任何一個該多個 儲存節點輸出一值之裝置,該方法包含下列步驟: 打開重置電晶體以在該光感測器上配置重置電位; 自該光感測器以第一持續時間轉換充電至多個中第一 個儲存節點;且 —. 自該光感測器以第二持續時間轉換充電至多個中第二 個儲存節點。 5 6.如申請專利範圍第55項之一種操作主動像素感測器 之方法,其中該第一持續時間開始與該第二持續時間一 致° 5 7.如申請專利範圍第5 5項之一種操作主動像素感測器 之方法,其中該第二持續時間開始是在該第一持續時間已 經結束之後。Page 35 Two = sub, the conversion transistor has two of them connected to the light sensor 448 b c ο 6. Patent application scope Two terminals and a third terminal connected to the independent majority of the conversion line. 54. An active pixel sensor according to item 52 of the scope of patent application, which still includes multiple storage elements, each of which is independent of the storage element having a first terminal connected to the independent storage node and a second reference The second terminal of the potential. 5 5. —A method of operating an active pixel sensor, the active pixel sensor has a light sensor, a reset transistor, a plurality of storage nodes connected to the light sensor, and a plurality of storage nodes A device for outputting a value from any one of the plurality of storage nodes. The method includes the following steps: turning on a reset transistor to configure a reset potential on the photo sensor; Time-shifted charging to the first storage node of the plurality; and-. Switching from the light sensor to the second storage node of the plurality of storage nodes for a second duration. 5 6. A method of operating an active pixel sensor according to item 55 of the scope of patent application, wherein the first duration begins to coincide with the second duration ° 5 7. An operation of item 55 of the scope of patent application The active pixel sensor method, wherein the second duration begins after the first duration has ended. 第36頁Page 36
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