RU2309524C2 - Two-sided pulse-width modulator for bridge inverter - Google Patents

Abstract

FIELD: automatic control, possible use for bridge inverters with two-sided pulse-width modulation.

SUBSTANCE: in the bridge inverter to generate output voltage it is enough to control condition of key elements of working diagonal only, and on modulation period, to control enabling and disabling of one of key elements, preventing occurrence of through currents, for even load of key elements an alternating method is suggested for disabling key elements of working diagonal.

EFFECT: prevented through currents in key elements of bridge inverter, possible even loading thereof, reduced dynamic losses when switching key elements.

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Description

The invention relates to automatic control and is intended for bridge inverters with two-sided pulse-width modulation.

A device for controlling an inverter is known, in which a pulse-width modulator is used to generate control signals switching pulse elements, in which identical 180-electron-shifted modulators are formed. hail. width-modulated signals, as well as direct and inverse signals of the sign of polarity of the output voltage, which are formed with a delay sufficient to lock the included key elements, control signals for each key element of the inverter are formed from the width-modulated signals and signals of the sign of polarity [1].

The well-known pulse-width modulator allows you to control the inverter by means of two-sided unipolar for a period modulation without end-to-end currents and with a switching frequency two times lower than the frequency of the modulation of the supply voltage. To eliminate the through-current mode in this modulator, the corresponding signal sign of the output voltage allows the inclusion of only the required key elements.

The disadvantage of this modulator is the need to generate signals of the sign of the output voltage, the delay in the formation of which distorts the output voltage when changing its polarity.

Of the known solutions, the closest to the proposed technical essence is a two-sided pulse-width modulator containing one modulation node for each rack of a block of key elements of a bridge inverter and having two control inputs for separately controlling the inclusion of positive and negative polarity voltage on the block of key elements , as well as a third control input for controlling the disconnection of the on voltage, each modulation node consists of an RS-trigger and has a control input by switching on, the trip control input and output, the RS-input of the RS-trigger is connected to the control input of the modulation unit, the S-input of the RS-trigger is connected to the control input of the modulation unit, the output of the RS-trigger is connected to the output of the modulation unit, the control input is the first the modulation node is connected to the first control input of the modulator, the control input on the second modulation node is connected to the second control input of the modulator, the control input off the first modulation node is connected to the third control input m undulator, disconnecting the second node modulation control input coupled to the third control input of the modulator via a logical NOT element [2].

The well-known two-sided pulse-width modulator allows you to control the output voltage of the bridge inverter by unipolar during the period of modulation of the supply voltage, while in the block of key elements of the bridge inverter switch the key elements of only one rack.

The disadvantage of this modulator is the need for protection against the through currents of the key elements of the bridge inverter, uneven loading of the key elements of the bridge inverter, as well as high dynamic losses, since all key elements of one of the racks of the bridge inverter participate in each switching.

The purpose of the invention is the elimination of through currents in the key elements of a bridge inverter, their uniform loading and the reduction of dynamic losses for switching key elements.

This goal is achieved by the fact that in a two-sided pulse-width modulator, containing one modulation node for each rack of key elements of a bridge inverter, which has two inputs for separately controlling the inclusion of positive or negative polarity voltage key elements on the output, an input for controlling the switching-on of turned-on voltage , each modulation node of which consists of an RS-trigger, an additional synchronization input, a pulse divider by two, and a logic element NOT, and each Two control inputs, two synchronizing inputs, a second RS-flip-flop, two logical elements 2I and two logical elements 2OR, the R-input of the first RS-trigger are connected to the output of the first logical element 2OR, the R-input of the second RS-trigger is additionally introduced into the modulation node connected to the output of the second logic element 2 OR, the first input of the first logic element 2 OR, connected to the output of the first logic element 2I, the first input of the second logic element 2 OR connected to the output of the second logic element 2I, the first input of the first logic 2I is connected to the first synchronization input of the modulation unit, the second input of the first logic element 2I is connected to the second control input of the modulation unit, the first input of the second logic element 2I is connected to the second synchronization input of the modulation unit, the second input of the second logic element 2I is connected to the fourth control input modulation node, S-input of the first RS-trigger and the second input of the second logic element 2 OR connected to the first control input of the modulation node, S-input of the second RS-trigger and the second input of about the logic element 2 OR connected to the third control input of the modulation node, the output of each RS-trigger is connected to the corresponding output of the modulation node, the first control input of the first modulation node and the third control input of the second modulation node are connected to the control input of the positive polarity of the modulator supply voltage, the first control the input of the second modulation node and the third control input of the first modulation node are connected to the control input of switching on the negative polarity of the supply voltage the controller, the second control input of the first modulation node and the fourth control input of the second modulation node and the input of the logic element are NOT connected to the power supply control input, the second control input of the second modulation node and the fourth control input of the first modulation node are connected to the output of the logic element NOT, the first input synchronization of the first and second modulation nodes are connected to the direct output of the pulse divider by two, the second synchronization input of the first and second modulation nodes are connected to inverse the output of the pulse divider into two channels, the input of the pulse divider into two is connected to the synchronization input of the modulator, the outputs of the modulation nodes are the outputs of the modulator.

The essence of the invention lies in the fact that in the bridge inverter to generate the output voltage it is enough to control the state of the key elements of only the working diagonal, and during the modulation period to control the on and off of one of the key elements, which eliminates the possibility of through-currents, for uniform loading of the key elements proposed alternately way to disable the key elements of the working diagonal.

The drawing shows a diagram of a two-sided pulse-width modulator of a bridge inverter.

делителя импульсов на два 3, вход делителя импульсов на два 3 соединен с входом С модулятора.A pulse-width modulator has three control inputs F (+), F (-) and F (0), a synchronization input C, four outputs Y _1B , Y _1H , Y _2B , Y _2H , contains two modulation nodes 1 and 2, a divider pulses per two 3 and logic element NOT 4, each modulation node consists of two RS-triggers 5, 6, two logic elements 2 AND 7, 8 and two logic elements 1 OR 9, 10, the output of logic element 9 is connected to the S-input RS-flip-flop 5, the output of logic element 10 is connected to the S-input of the RS-flip-flop 6, the output of the RS-flip-flop 5 is connected to the output В of the modulation unit, the output of the RS-flip-flop 6 is connected to the output Н у of modulation evil, the first input of logic element 9 is connected to the output of logic element 7, the first input of logic element 10 is connected to the output of logic element 8, the first input of logic element 7 is connected to input F _{c1 of} the modulation node, the second input of logic element 7 is connected to input F _y2 of the modulation node, the first input of the logic element 8 is connected to the input F _{c1 of} the modulation node, the second input of the logic element 8 is connected to the input F _{y4 of} the modulation node, the S-input of the RS-trigger 5 and the second input of the logic element 10 are connected to the input F _{y1 of} the modulation node ii, the S-input of the RS-flip-flop 6 and the second input of the logic element 9 are connected to the input F _{у3 of} the modulation node, the output B of the modulation node 1 is connected to the output Y _{1H of the} modulator, the output H of the modulation node 1 is connected to the output Y _{1H of the} modulator modulation 2 is connected to the output Y _{2B of the} modulator, the output H of the modulation node 2 is connected to the output Y _{2H of the} modulator, the input F _{y1 of} the modulation node 1 and the input F _{y2 of} the modulation node 2 are connected to the input F (+) of the modulator, the input F _{y3 of} the modulation node 1 and the input F _y3 of modulation node 2 is connected to the input F (-) of the modulator, the input F _y2 of modulation node 1, the input F _y4 of modulation node 2 and logic gate 4 is connected to modulator input F (0), input F _y4 of modulation node 1 and input F _y2 of modulation node 2 are connected to output of logic element 4, input F _c1 of modulation nodes 1 and 2 is connected to output C _{2 of} the pulse divider by two 3, the input F _c2 of the modulation nodes 1 and 2 is connected to the output

a pulse divider by two 3, the input of a pulse divider by two 3 is connected to the input C of the modulator.

- сигналы управляющие отключением напряжения питания положительной и отрицательной полярности, формируются блоком управления мостового инвертора и логическим элементом 4 модулятора; С₂ и

- сигналы для разрешения отключения напряжения питания, формируются делителем импульсов на два 3 из сигнала синхронизации С, формируемого блоком синхронизации мостового инвертора; выходные сигналы Y_1B, Y_2H широтно-импульсного модулятора управляют состоянием ключевых элементов мостового инвертора, формирующих напряжение положительной полярности, а сигналы Y_1H, Y_2B - отрицательной полярности, при этом сигналы Y_1B, Y_1H управляют состоянием ключевых элементов первой стойки мостового инвертора, а сигналы Y_2B, Y_2H - второй (индекс указывает адрес выходного сигнала), установка в нуль RS-триггера 5 осуществляется сигналом

формируемым логическими элементами 7 и 9, а RS-триггера 6 - сигналом

формируемым логическими элементами 8 и 10, установка RS-триггера 5 в состояние лог.1 осуществляется сигналом F_y1, установка RS-триггера 6 в состояние лог.1 осуществляется сигналом F_y3, делитель импульсов на два 3 осуществляет деление синхроимпульсов С на два, прямой и инверсный сигналы результата деления поступают на входы F_c1, F_c3 узлов модуляции, входной сигнал F(+) поступает на вход F_y1 узла модуляции 1 и на вход F_y3 узла модуляции 2, F(-) поступает на вход F_у3 узла модуляции 1 и на вход F_y1 узла модуляции 2, что обеспечивает сдвиг на 180 эл. град. сигналов Y_1B, Y_2H, управляющих переключением ключевых элементов, формирующих положительное напряжение или сигналов Y_1H, Y_1B, формирующих отрицательное напряжение.A single-sided pulse-width modulator operates as follows: F (+) and F (-) - input signals controlling the inclusion of positive and negative polarity of the supply voltage, are formed by the control unit of the bridge inverter; F (0) and

- the signals controlling the disconnection of the supply voltage of positive and negative polarity are generated by the control unit of the bridge inverter and the logic element 4 of the modulator; C ₂ and

- signals for enabling the disconnection of the supply voltage, are formed by a pulse divider into two 3 from the synchronization signal C generated by the synchronization block of the bridge inverter; the output signals Y _1B , Y _{2H of the} pulse-width modulator control the state of the key elements of the bridge inverter forming a voltage of positive polarity, and the signals Y _1H , Y _2B control the negative polarity, while the signals Y _1B , Y _1H control the state of the key elements of the first rack of the bridge inverter and the signals Y _2B , Y _2H are the second (the index indicates the address of the output signal), the RS-trigger 5 is set to zero by the signal

formed by logic elements 7 and 9, and RS-trigger 6 - a signal

formed by logic elements 8 and 10, the installation of the RS-flip-flop 5 to the state log.1 is carried out by the signal F _y1 , the installation of the RS-flip-flop 6 to the state log.1 is carried out by the signal F _y3 , the pulse divider by two 3 divides the clock pulses C into two, direct and the inverse signals of the division result are fed to the inputs F _c1 , F _c3 of the modulation nodes, the input signal F (+) goes to the input F _{y1 of} the modulation node 1 and to the input F _{y3 of} the modulation node 2, F (-) goes to the input F _{y3 of} the modulation node 1 and the input F _y1 node modulation 2, which provides a shift of 180 e. hail. signals Y _1B , Y _2H , controlling the switching of the key elements forming a positive voltage or signals Y _1H , Y _1B , forming a negative voltage.

Thus, the control of the key elements of the bridge inverter by two modulation nodes with two RS flip-flops in each made it possible to generate the output voltage by switching (at each moment of switching) only one of the key elements of the inverter, which eliminates the possibility of through currents, and the introduction of a pulse divider into two the process of disconnecting key elements allowed to evenly distribute the load between the key elements.

Literature

1. USSR author's certificate No. 1603509, Н02М 7/48, 10.30.1990.

2. RF patent No. 2223529, G05В 13/02, G05F 1/56, Н03R 7/08, 02/10/2004.

Claims (1)

A double-sided pulse-width bridge inverter modulator containing one modulation node per rack of a block of key elements of a bridge inverter, which has two inputs for separately controlling the inclusion of positive or negative polarity voltage block of the key element block, an input for controlling the switching-off of the turned-on voltage, each modulation node which consists of an RS-flip-flop, characterized in that a synchronizing input, a pulse divider into two and a logical element NOT are additionally introduced, in each modulation node, two control inputs, two synchronizing inputs, a second RS-flip-flop, two 2I gates and two 2-gates are introduced, the R-input of the first RS-trigger is connected to the output of the first 2-OR gates, the R-input of the second RS- the trigger is connected to the output of the second logic element 2 OR, the first input of the first logic element 2 OR is connected to the output of the first logic element 2I, the first input of the second logic element 2 OR is connected to the output of the second logic element 2I, the first input is about the logic element 2I is connected to the first synchronization input of the modulation node, the second input of the first logic element 2I is connected to the second control input of the modulation node, the first input of the second logic element 2I is connected to the second synchronization input of the modulation node, the second input of the second logic element 2I is connected to the fourth control the input of the modulation node, the S-input of the first RS-trigger and the second input of the second logic element 2 OR are connected to the first control input of the modulation node, the S-input of the second RS-trigger and the second input q of the first logic element 2 OR connected to the third control input of the modulation node, the output of each RS-trigger connected to the corresponding output of the modulation node, the first control input of the first modulation node and the third control input of the second modulation node are connected to the control input of the positive polarity of the modulator supply voltage, the first the control input of the second modulation node and the third control input of the first modulation node are connected to the control input of the negative voltage polarity modulator, the second control input of the first modulation node and the fourth control input of the second modulation node and the input of the logic element are NOT connected to the control input of the power supply disconnection, the second control input of the second modulation node and the fourth control input of the first modulation node are connected to the output of the logic element NOT, the first the synchronization input of the first and second modulation nodes are connected to the direct output of the pulse divider by two, the second synchronization input of the first and second modulation nodes are connected inverted output divider pulses to the two channels, the input pulses at two divider is connected to the input of the modulator timing modulation nodes modulator outputs are outputs.