RU2268485C2 - Device for classification of digital signals order - Google Patents

Abstract

FIELD: computer science, possible use for determining random values distribution law and can be used for engineering of digital signals processing devices for classification of series of digital data on basis of available standard series.

SUBSTANCE: device has analog-digital converter, two memory block, n comparators, decoder, n counters.

EFFECT: simplified construction, maintenance and manufacture of device, increased speed of operation.

6 dwg

Description

The invention relates to computer technology, is intended to determine the law of distribution of random variables and can be used in digital signal processing devices to classify a sequence of digital data according to an available reference sequence.

A device [1] is known that contains an analog-to-digital converter, the information input of which is the input of the device, and the control input is connected to the first output of the control unit, and the output of the combinational adder is connected to the first information input of the memory unit, the second information input of which is connected to the output of the analog digital converter, the control input is with the second output of the control unit, and the output of the memory unit is connected to the input of the combinational adder.

The disadvantages of this device are complexity and low speed, since the implementation of the algorithm requires a large number of sequential operations.

The closest in technical essence to the claimed invention is a statistical analyzer selected as a prototype [2], containing an analog-to-digital converter, a comparison unit, registers, a memory unit, a counter, in addition, the device contains a synchronizer, adder, demultiplexer, OR elements.

The disadvantages of this device are functional complexity and, as a consequence, low speed.

The aim of the invention is to simplify the device and increase its speed.

This goal is achieved by the fact that in the known device containing an analog-to-digital converter, a comparison unit, a first memory unit, counters, the ADC input is an input of the device, according to the invention, a second memory unit, n comparators and a decoder are introduced, and the number of counters is increased and equal to the number comparators, the first inputs of the comparators are connected to the output of the analog-to-digital converter, the second inputs of the comparators are connected to the output of the first memory block, the outputs of the comparators are connected to the inputs of the decoder ora, whose outputs are connected to inputs of the counters, outputs of the counters are connected to inputs of the storage unit.

The novelty of the technical solution lies in the presence in the claimed device of new circuit elements: a second memory unit, n comparators and a decoder.

Thus, the invention meets the criterion of "novelty."

The analysis of known technical solutions in the studied and related fields allows us to conclude that the introduced functional units are known. However, their introduction into a device for classifying a sequence of digital signals with the indicated relationships gives it new properties. The introduced functional units interact in such a way that they simplify the device and increase its speed.

Thus, the invention meets the criterion of "Inventive step", as it for a specialist does not explicitly follow from the prior art.

The invention can be used in digital systems of descrambled and demultiplexing, in particular in digital satellite communication systems.

Thus, the invention meets the criterion of "Industrial applicability".

Figure 1 presents the structural electrical diagram of the device; figure 2 and 3 are tables explaining the operation of the device; Figures 4 and 5 show an example of constructing a conceptual model for sample distributions; 6 shows a method for generating code.

The device for classifying the sequence (Fig. 1) contains an analog-to-digital converter 1, a memory unit 2, n comparators 3, a decoder 4, n counters 5, a memory unit 6. The input of the analog-to-digital converter 1 is the input of the device, the first inputs of the comparators 3 are connected to the output of the analog-to-digital converter 1, the second inputs of the comparators 3 are connected to the output of the memory unit 2. The outputs of the comparators are connected to the inputs of the decoder 4, the outputs of which are connected to the inputs of the counters 5. The outputs of the counters 5 are connected to the inputs of the memory unit 6, from the output of which the found probability is read in accordance with the table in figure 3.

A device for classifying a sequence of digital signals (figure 1) works as follows. Prior to receipt of a classified sequence at the device input, reference values of quantities related to the distribution law are entered into the memory unit 2, the correspondence with which is determined. After digitization in an analog-to-digital converter 1, the analog sequence is fed to the first inputs of the comparators 3, the second inputs of which consistently receive reference values from the memory unit 2. If the investigated value exceeds the reference, the comparator generates 1, otherwise - 0. The number n of comparators and the number n of counters is determined by the length of the studied digital sequence. The outputs of the comparators are connected to the inputs of the decoder 4, the conversion table of which is shown in figure 2 (for example, 6 input values in sequence).

The counters 5 sequentially count, for one cycle, processing one transform value of the decoder 4, corresponding to one value of the original sequence. Accordingly, to process the entire sequence of n elements, n clock cycles are required to calculate all the bits (counters) of the output value, which, after conversion in the memory block 6, determines the probability of classifying the sequence as a known class.

The outputs of the decoder are connected to the inputs of the counters 5, performing bitwise counting of the results of the sequence evaluation.

The outputs of the counters are connected to the inputs of the memory unit 6, the conversion table of which is shown in figure 3 (for example, 6 input values in sequence).

Many practical tasks of detection, recognition, classification, identification in various fields of science and technology come down to statistical testing of hypotheses. The most powerful criteria are based on statistics of measures of mismatch of distribution densities, defined as functions of the likelihood ratio of Kullback, χ-square, Pitman.

However, the practical application of these statistics is associated with the following difficulties:

- lack of analytical models for the distribution of statistics for small samples;

- high computational costs required for statistics;

- the need to meet the requirements of dividing the variation series into the number of intervals (not less than 8-10) and the number of elements in the intervals (not less than 50-60), which is not always possible with small sample sizes.

The assignment of a sequence to a known class is carried out by sequentially comparing the input values and the values corresponding to the known distribution law and stored in the memory unit 2.

The theoretical basis for the legitimacy of the transformation table, which is shown in figure 3, is a conceptual model of the canonical representation of pairs of distributions and statistics of measures of mismatch of distribution densities using this model, described in [3].

через другой закон

, или проекцию закона

на закон

.The conceptual model is an expression of one distribution law

through another law

, or projection of the law

to law

.

A graphic image and a key for constructing a conceptual model based on sample data are shown in Fig. 4.

The expressions for calculating the statistics of mismatch measures according to Kullback (ΔI, ΔI *), chi-square (Δχ ² ), Pitman (Δp) using the conceptual model have the form

where n ₁ and n ₂ are the volumes of the first and second samples; Jν ₁ = 1 for ν ₁ ≠ 0 and Jν ₁ = 0 for ν _i = 0; ν ₁ is the number of elements of the second sample located between the (i-1) th and i-th order statistics of the variational series of the first sample.

If you define a sequence of values ν ₁ , ν ₂ , ..., ν ₆ as a code for a specific conceptual model, then for the given example (Figs. 4, 5), the code is defined as 101231.

A method for generating the code is shown in FIG. 6, which shows a general variation series for the example in question. On the X axis, the symbol "x" denotes the values of the elements of the first sample and the symbol "•" - the values of the second sample.

Due to the additivity of the statistics functions, their values will be the same for all kinds of permutations. For example, conceptual models with codes 110231; 231110; 312110 etc. will have the same statistic values. The number of all possible conceptual models with the same statistic value is determined by the number of permutations in the code and is represented by the formula

The concept of a numerical value of a code is defined as a number with (n ₁ +1) digit and the base of positions n ₂ , i.e. as a code sorted in descending order of significant digits, starting with the most significant digit.

Studies have shown the existence of a relationship between the values of the ordered code and statistics calculated for the conceptual model. At the same time, models with a large numerical value of codes correspond to large values of statistics.

In this paper, in the decision criteria, instead of the statistics determined by formulas (1) - (4), it is proposed to use the corresponding numerical values of the codes by which decision thresholds are found.

A prerequisite for decision making is knowledge of the distribution of statistics. Based on the foregoing, a decision-making criterion based on codes is proposed, which allows us to abandon calculations according to the above formulas (1) - (4).

Thus, the device for classifying the sequence of digital signals determines the distribution law of random variables by sorting and correlating them into the intervals of the reference samples, which eliminates the addition, multiplication, division, etc., and requires significantly lower computational costs, therefore, improves performance device and simplifies it by eliminating computing units.

For the technical implementation of the device for classifying the sequence of digital signals, a foreign-made analog-to-digital converter type AD9054ABST-200 was used, the decoder, comparators and counters were implemented on XC2S50 reprogrammable logic integrated circuits with XILINX company XC17S50 structure memory, T27C512 read-only memory devices.

The present invention allows the determination of the law of distribution of random variables to classify a sequence of digital data according to the available reference sequence.

Information sources

1. Auth. St. USSR No. 830399, class G 06 F 15/36, 1979.

2. Auth. St. USSR No. 1310842, class G 06 F 15/36, 1986.

3. L.N. Borisoglebskaya. Code based decision making criterion in detection and recognition tasks. M., Telecommunications, No. 7, 2001, p. 27-33.

Claims (1)

A device for classifying a sequence of digital signals containing an analog-to-digital converter, a first memory unit designed to store reference values of the values of the corresponding distribution law, counters, the input of an analog-to-digital converter is the input of the device, characterized in that a second memory unit is inserted into it for storing probability values in accordance with the reference distribution law, n comparators and a decoder, and the number of counters is increased and According to the number of comparators, the first inputs of the comparators are connected to the output of the analog-to-digital converter, the second inputs of the comparators are connected to the output of the first memory block, the outputs of the comparators are connected to the inputs of the decoder, the outputs of which are connected to the inputs of the counters, the outputs of the counters are connected to the inputs of the second memory block.

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