RU2265229C2 - Circuit for processing signal from strain-resistive sensor - Google Patents

Abstract

FIELD: measuring equipment.

SUBSTANCE: circuit has support voltage source, analog-digital converter, measuring amplifier, zero shift correction circuit, circuit for analyzing pressure on strain-resistive sensor.

EFFECT: possible correction of zero shift of measuring amplifier under effect from outer destabilizing factors.

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Description

The invention relates to the field of electrical engineering can be used and analog-to-digital converters.

Closest to the technical solution to the proposed one is a circuit for processing a signal from a thin-film pressure sensor containing a pressure sensor, a reference voltage source, an ADC, a filter made on a capacitor and two resistors, a measuring amplifier made on two operational amplifiers (OA) [1].

The disadvantage of this device is the presence of an error caused by a zero drift of the measuring amplifier.

The objective of the invention is to improve the accuracy of conversion.

This object is achieved by the fact that in the signal processing circuit from the load cell, containing, the ADC, the first reference voltage source, a measuring amplifier (DUT), consisting of the first and second op-amps, two resistors that act as a shoulder in the bridge connection with the load cell, and the voltage with the first source of the reference voltage is supplied to the input of two resistors and to the input of the strain gauge, the voltage from the strain gauge is supplied to the non-inverting input of the first op-amp, and the voltage from two resistors is fed to the non-inverting input of the second op-amp measuring amplifier, a third op-amp is additionally introduced into the measuring amplifier, a zero drift correction circuit containing the fourth and fifth op-amps, a key, a resistor and a capacitor, a strain gauge analyzer circuit containing a second and third reference voltage source, a first and second comparator, and -NOT, logical element OR, logical element AND and timer.

The outputs of the first and second op-amps are connected respectively to the non-inverting and inverting input of the third op-amp, the output of the third op-amp is the output of the measuring amplifier and connected to the analog input of the ADC and the inverting input of a comparator made on the fourth op-amp, the non-inverting input of which is connected to the common bus, the output of the fourth op-amp through the key is connected to the input of the resistor, from the output of which the voltage charges the capacitance of the capacitor and enters the non-inverting input of the fifth op-amp, the output of which is connected through the resistor to the non-invert uyuschim input of the third op-amp instrumentation amplifier. The positive voltage from the second reference voltage source is supplied to the non-inverting input of the first comparator, and the voltage from the output of the third op-amp by the measuring amplifier is supplied to the inverting input of the first op-amp, the negative voltage from the third reference voltage source is supplied to the inverting input of the second comparator, and to the non-inverting input of the second comparator voltage from the output of the third op-amp of the measuring amplifier, the outputs of the first and second comparator are connected to the inputs of the logical AND-NOT element, the output of which is connected to the input of the OR logic element, to the other input of which pulses of zero drift correction are received, the output of the OR logic element is connected to the input of the AND logical element, the other input of which is connected to the timer output, and the output of the AND element is connected to control key input.

The drawing shows a functional diagram of the signal processing from the strain gauge. The device contains a load cell 1, a reference voltage source 3, two resistors 2, a measuring amplifier 4, consisting of 5, 9, 13 op-amp, 6, 7, 10, 11, 12, 14 resistors, a zero drift correction circuit 31, consisting of 15, 21 OA, 16, 17, 19, 22 of the resistor, key 18, and capacitor 20, and the analyzer circuit pressing the strain gauge 32, consisting of 23, 24 of the reference voltage source, 25, 30 of the comparator, AND-NOT-26 logic gates, OR -27, I-28, as well as timer 29, and ADC 33.

The voltage from the first source of the reference voltage is supplied to two resistors 2 and to the input of the strain gauge 1, the voltage from two resistors is supplied to the non-inverting input of the op-amp 5, the voltage from the strain gauge is supplied to the inverting input of the op-amp 9. The output from the op-amp 5 through resistor 10 is connected to the inverting input of the op-amp 13, and the output from the op amp 9 through a resistor 11 is connected to the non-inverting input of the op amp 13. Resistors 6, 7, 8, 10, 11, 12, 14 affect the overall gain of the measuring amplifier 4. The output voltage from the op amp 13 is fed to the input of the ADC 33 , and the inverting input of the OS 15, circuits zero drift correction 31, the output from the OS 15 is connected to the input of the voltage divider 16, 17, the voltage from which is supplied to the input of the key 18, from the output of the key the correction voltage is supplied to the input of the resistor 19, from the output of which the correction voltage is supplied to the capacitor 20 and to the non-inverting the input of the op-amp 21, from the output of the op-amp 21, the correction voltage through the resistor 22 is supplied to the non-inverting input of the op-amp 13 of the measuring amplifier 4. And the output of the op-amp 13 is connected to the inverting input of the comparator 25 and the non-inverting input of the comparator 30. Positive voltage with the reference voltage source 23 is supplied to the non-inverting input of the comparator 25, and the negative voltage from the reference voltage source 24 is supplied to the inverting input of the comparator 30. The outputs from the comparators 25 and 30 are connected respectively to the inputs of the AND-NOT-26 logic element, the output of which is connected to the input logical element OR-27 to another input of the logical element OR-27, impulses of zero drift correction are received. The output from the logical OR-27 is connected to one of the inputs of the logical element And 28, to the other input of the logical element And 28 receives a negative pulse from the timer 29 for a duration of 20 seconds.

The signal processing circuit from the load cell works as follows. When power is applied to either circuit, timer 29 generates a negative pulse lasting 20 seconds. During this time, all transients occurring in the measuring amplifier 4 will be established provided that the load sensor 1 is not pressed at this time. When the load sensor 1 is not pressed, the voltage at the inputs of the measuring amplifier (DUT) 4 will be the same, and the output voltage (DUT) 4 is equal to the voltage of zero drift (DUT) 4. This voltage is supplied to the input of the comparators 25, 30, and the voltage from the reference voltage sources 23, 24 is supplied to the other inputs of the comparators 25, 30, this voltage is set slightly higher than the voltage of zero drift (DUT) 4 at the same time de comparators 25.30 there will be a logical unit that goes to the input of the AND-26 logic element, from the output of which a logical zero goes to the input of the OR gate 27, allowing the passage of correction pulses that go to the other input of the OR gate 27, from the output whose correction impulses pass through the AND 28 logic element and are supplied to the control input of the key 18, which made it possible to correct the zero drift (DUT) 4, when the load cell 1 is not pressed. When the load cell 1 is pressed, the voltage from the load cell 1 ism changes due to a change in the resistance of the strain gauge 1. At the same time, a voltage difference appears at the inputs (DUT) 4, which is multiplied by the gain (DUT) 4, from the output of which a positive or negative voltage goes to the inputs of the comparators 25, 30 and, as soon as the voltage is more than the reference voltage coming from the sources of the reference voltage 23, 24, one of the comparators 25, 30 will work, the output of which is a logical zero, fed to the input of the logical element AND-NOT 26, the output of which is a logical unit, fed to the input log 27 chemical elements or disallow the passage of the zero drift correction pulses arriving at the other input of OR 27. The correction pulse duration can be varied in the range from 10 ms to 14 ms with a repetition period of 4 seconds. At the output of the OS 15 the voltage will be + 15V, or -15V, which is fed to the input of the voltage divider on the resistors 16, 17 and then to the input of the key 18, from the output of which the voltage goes to the input of the resistor 19, from the output of which the voltage goes to the capacitor 20, and the non-inverting input of the op-amp 21, the output of which is connected to the non-inverting input of the op-amp 13. The resistor 19 and the capacitor 20 are calculated by the formula 1.

τ = RC

Knowing the voltage that comes from the divider 16, 17, and the duration of the correction pulses with a constant capacitor 20 equal to 32 μF, we determine the value of the resistor 19 based on the voltage value to which we will charge the capacitor 20. Thus, the introduction of new elements , the third op-amp, the zero-drift correction circuit, consisting of the fourth and fifth op-amp, key, resistor and capacitor, as well as the analyzer of pressing the strain gauge, consisting of the second and third voltage reference sources, the first and second computers Ator, AND gates, NOT, OR, AND and timer, allows you to increase the accuracy of signal processing with tezodatchika.

Sources of information

1. Pat. Germany No. 19531386, G 01 L 9/04 (prototype).

2. B.C. Gutnikov. Integrated electronics in measuring devices. Energoatomizdat, 1988

3. B.G. Fedorkov. V.A. Taurus. DAC and ADC chips. Energoatomizdat, 1990

Claims (1)

The signal processing circuit from the strain gauge, containing the first reference voltage source, the ADC, a measuring amplifier consisting of the first and second operational amplifiers (OA), two resistors that act as a shoulder in the bridge connection with the strain gauge, and the voltage from the first reference voltage source is input two resistors and to the input of the strain gauge, the voltage from the strain gauge goes to the non-inverting input of the first op-amp, and the voltage from two resistors goes to the non-inverting input of the second op-amp spruce (DI), characterized in that the third op-amp is introduced into the measuring amplifier, the zero-drift correction circuit, consisting of the fourth and fifth op-amps, the key, resistor and capacitor, the analyzer circuit for pressing the strain gauge, consisting of the second and third sources of reference voltage, the first and the second comparators, the AND gate, the OR gate, the AND gate, and the timer, the outputs of the first and second op-amps are connected respectively to the non-inverting and inverting inputs of the third op-amp, the output of the third op-amp is the output measuring amplifier and is connected to the analog input of the ADC and the inverting input of a comparator made on the fourth op-amp, the non-inverting input of which is connected to a common bus, the output of the fourth op-amp is connected via a key to the input of the resistor, from the output of which voltage charges the capacitor capacitance and goes to the non-inverting input of the fifth op-amp the output of which through a resistor is connected to the non-inverting input of the third op-amp of the measuring amplifier, the voltage from the second reference voltage source is supplied to the non-inverting input first comparator, and the inverting input of the first comparator receives voltage from the output of the third op-amp of the measuring amplifier, the voltage from the third source of the reference voltage goes to the inverting input of the second comparator, and the voltage from the output of the third op-amp of the measuring amplifier, the outputs of the first and second comparators are connected to the inputs of the AND gate, the output of which is connected to the input of the OR gate, to the other input of which a pulse correcting the zero drift, the output of NAND gate OR is connected to an input of the AND gate, the other input of which is connected to the timer output, and the output of the AND gate is connected to the control input of the key.